MatCat
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baf56330a3
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Refacotred ISA opcodes
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2021-04-10 11:47:52 -07:00 |
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MatCat
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dfd3736e70
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Refacotred ISA opcodes
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2021-04-10 11:46:57 -07:00 |
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MatCat
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14ebbbd9e8
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More instructions, more docs, more yay
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2021-04-10 01:08:33 -07:00 |
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MatCat
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6168e57ab1
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Fixed bug in return code
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2021-04-09 02:11:29 -07:00 |
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MatCat
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a76e01aca1
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Refactoring of the display and some 24 bit instructions
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2021-04-09 01:39:21 -07:00 |
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MatCat
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a572229c87
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Working on ISA documentation
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2021-04-07 23:14:37 -07:00 |
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MatCat
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d21c723894
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Working on ISA documentation
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2021-04-07 23:07:32 -07:00 |
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MatCat
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875a69fad6
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Fixed some code in ram drawer
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2021-04-07 01:58:33 -07:00 |
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MatCat
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1a61c1d43b
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Added line controller to RAM
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2021-04-07 01:51:21 -07:00 |
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MatCat
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44cdd9c219
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Added cycle count to interval runs
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2021-04-07 01:29:12 -07:00 |
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MatCat
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108b967a87
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Added a bunch of new indirect and absolute instructions
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2021-04-07 00:54:31 -07:00 |
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MatCat
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0e06cfc332
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Colorized registers as well, RED is WRITE, GREEN is direct read (for SP and PC green is Incremenet UP, for SP blue is increment DOWN). Darker color is Low byte, brighter is High byte
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2021-04-06 00:20:40 -07:00 |
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MatCat
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a3f5382437
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Memory now follows the location, shows red when writing to RAM and GREEN when reading, yellow when the address bus just happens to be sitting on the address but not actively reading or writing.
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2021-04-05 23:49:23 -07:00 |
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MatCat
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3943201db1
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Added many instructions and some UI improvements
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2021-04-05 02:49:12 -07:00 |
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MatCat
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50260f060e
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Added reset button
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2021-04-04 03:40:30 -07:00 |
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MatCat
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3d050b8b55
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Added a bunch of branching instructions, some stack instructions, and added stack example to the demo
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2021-04-04 03:26:28 -07:00 |
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MatCat
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f67b5c3e64
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Added interface and demo code to run
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2021-04-04 02:16:38 -07:00 |
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MatCat
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bf769d0855
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Added microcode compiler
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2021-04-03 20:36:17 -07:00 |
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MatCat
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f116826575
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First Commit
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2021-04-03 19:06:56 -07:00 |
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