A variable with the PARAMETER attribute may not appear in a DATA statement.
gcc/fortran/ChangeLog:
PR fortran/49278
* data.c (gfc_assign_data_value): Reject variable with PARAMETER
attribute in DATA statement.
gcc/testsuite/ChangeLog:
PR fortran/49278
* gfortran.dg/parameter_data.f90: New test.
gcc/ChangeLog:
PR middle-end/98266
* gimple-array-bounds.cc (inbounds_vbase_memaccess_p): New function.
(array_bounds_checker::check_array_bounds): Call it.
gcc/testsuite/ChangeLog:
PR middle-end/98266
* g++.dg/warn/Warray-bounds-15.C: New test.
* g++.dg/warn/Warray-bounds-18.C: New test.
* g++.dg/warn/Warray-bounds-19.C: New test.
* g++.dg/warn/Warray-bounds-20.C: New test.
* g++.dg/warn/Warray-bounds-21.C: New test.
This works since the recent r11-7102, but we didn't have a test for
a template-argument context.
gcc/testsuite/ChangeLog:
PR c++/96268
* g++.dg/cpp2a/nontype-class41.C: New test.
This adds support for c++23 mode to modules, and enables such testing.
PR c++/99436
gcc/cp/
* name-lookup.c (get_cxx_dialect_name): Add cxx23.
gcc/testsuite/
* g++.dg/modules/modules.exp (MOD_STD_LIST): Add 2b.
We didn't specifically check for a module-decl inside a header unit.
That leads to a confusing diagostic. Fixed thusly.
gcc/cp/
* lex.c (module_token_filter::resume): Ignore module-decls inside
header-unit.
* parser.c (cp_parser_module_declaration): Reject in header-unit.
gcc/testsuite/
* g++.dg/modules/pr99468.H: New.
The rs6000_emit_le_vsx_* functions assume they are not passed an Altivec
style "& ~16" address. However, some of our expanders and splitters do
not verify we do not have an Altivec style address before calling those
functions, leading to an ICE. The solution here is to guard the expanders
and splitters to ensure we do not call them if we're given an Altivec style
address.
2021-03-08 Peter Bergner <bergner@linux.ibm.com>
gcc/
PR target/98959
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_permute): Add an assert
to ensure we do not have an Altivec style address.
* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): Disable if passed
an Altivec style address.
(*vsx_le_perm_store_<mode>): Likewise.
(splitters after *vsx_le_perm_store_<mode>): Likewise.
(vsx_load_<mode>): Disable special expander if passed an Altivec
style address.
(vsx_store_<mode>): Likewise.
gcc/testsuite/
PR target/98959
* gcc.target/powerpc/pr98959.c: New test.
Class template partial specializations need to be in the
specialization hash, but not all of them. This defers adding
streamed-in entities to the hash table, in the same way I deferred
adding the instantiation and specialization lists for 99170.
PR c++/99285
gcc/cp/
* cp-tree.h (match_mergeable_specialization)
(add_mergeable_specialization): Adjust parms.
* module.cc (trees_in::decl_value): Adjust
add_mergeable_specialization calls.
(trees_out::key_mergeable): Adjust match_mergeable_specialization
calls.
(specialization_add): Likewise.
* pt.c (match_mergeable_specialization): Do not insert.
(add_mergeable_specialization): Add to hash table here.
gcc/testsuite/
* g++.dg/modules/pr99285_a.H: New.
* g++.dg/modules/pr99285_b.H: New.
In this bug combine forms the (R)SHRN(2) instructions with an invalid shift amount.
The intrinsic expanders for these patterns validate the right shift amount but if the
final patterns end up being matched by combine (or other RTL passes I suppose) they
still let the wrong const_vector through.
This patch tightens up the predicates for the instructions involved by using predicates
for the right shift amount const_vectors.
gcc/ChangeLog:
PR target/99437
* config/aarch64/predicates.md (aarch64_simd_shift_imm_vec_qi): Define.
(aarch64_simd_shift_imm_vec_hi): Likewise.
(aarch64_simd_shift_imm_vec_si): Likewise.
(aarch64_simd_shift_imm_vec_di): Likewise.
* config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Use
predicate from above.
(aarch64_shrn<mode>_insn_be): Likewise.
(aarch64_rshrn<mode>_insn_le): Likewise.
(aarch64_rshrn<mode>_insn_be): Likewise.
(aarch64_shrn2<mode>_insn_le): Likewise.
(aarch64_shrn2<mode>_insn_be): Likewise.
(aarch64_rshrn2<mode>_insn_le): Likewise.
(aarch64_rshrn2<mode>_insn_be): Likewise.
gcc/testsuite/ChangeLog:
PR target/99437
* gcc.target/aarch64/simd/pr99437.c: New test.
Function process_address_1 can wrongly look at constraint modifiers
instead of the 1st constraint itself. The patch solves the problem.
gcc/ChangeLog:
PR target/99422
* lra-constraints.c (skip_contraint_modifiers): New function.
(process_address_1): Use it before lookup_constraint call.
gcc/ChangeLog:
PR target/99463
* config/i386/i386-options.c (ix86_option_override_internal):
Enable UINTR and HRESET for -march that supports it.
gcc/testsuite/ChangeLog:
PR target/99463
* gcc.target/i386/pr99463-2.c: New test.
* gcc.target/i386/pr99463.c: New test.
After switching the s390 backend to store long doubles in vector
registers, "f" constraint broke when used with the former: long doubles
correspond to TFmode, which in combination with "f" corresponds to
hard regs %v0-%v15, however, asm users expect a %f0-%f15 pair.
Fix by using TARGET_MD_ASM_ADJUST hook to convert TFmode values to
FPRX2mode and back.
gcc/ChangeLog:
2020-12-14 Ilya Leoshkevich <iii@linux.ibm.com>
* config/s390/s390.c (f_constraint_p): New function.
(s390_md_asm_adjust): Implement TARGET_MD_ASM_ADJUST.
(TARGET_MD_ASM_ADJUST): Likewise.
gcc/testsuite/ChangeLog:
2020-12-14 Ilya Leoshkevich <iii@linux.ibm.com>
* gcc.target/s390/vector/long-double-asm-commutative.c: New
test.
* gcc.target/s390/vector/long-double-asm-earlyclobber.c: New
test.
* gcc.target/s390/vector/long-double-asm-in-out.c: New test.
* gcc.target/s390/vector/long-double-asm-inout.c: New test.
* gcc.target/s390/vector/long-double-asm-matching.c: New test.
* gcc.target/s390/vector/long-double-asm-regmem.c: New test.
* gcc.target/s390/vector/long-double-volatile-from-i64.c: New
test.
Due to a common code change the comparison in the testcase is emitted
via vec_cmp instead of vcond. The testcase checks for an optimization
currently only available via vcond.
Fixed by implementing the same optimization also in
s390_expand_vec_compare.
gcc/ChangeLog:
* config/s390/s390.c (s390_expand_vec_compare): Implement <0
comparison with arithmetic right shift.
(s390_expand_vcond): No need for a force_reg anymore.
s390_vec_compare will do it.
* config/s390/vector.md ("vec_cmp<mode><tointvec>"): Accept also
immediate operands.
As I wrote in the mail with the previous PR99321 fix, we have various
bugs where we emit instructions that need avx512bw and avx512vl
ISAs when compiling with -mavx512vl -mno-avx512bw.
Without the following patch, the attached testcase fails with:
/tmp/ccW4PsfG.s: Assembler messages:
/tmp/ccW4PsfG.s:9: Error: unsupported instruction `vpaddb'
/tmp/ccW4PsfG.s:20: Error: unsupported instruction `vpaddb'
/tmp/ccW4PsfG.s:31: Error: unsupported instruction `vpaddw'
/tmp/ccW4PsfG.s:42: Error: unsupported instruction `vpaddw'
/tmp/ccW4PsfG.s:53: Error: unsupported instruction `vpsubb'
/tmp/ccW4PsfG.s:64: Error: unsupported instruction `vpsubb'
/tmp/ccW4PsfG.s:75: Error: unsupported instruction `vpsubw'
/tmp/ccW4PsfG.s:86: Error: unsupported instruction `vpsubw'
/tmp/ccW4PsfG.s:97: Error: unsupported instruction `vpmullw'
/tmp/ccW4PsfG.s:108: Error: unsupported instruction `vpmullw'
/tmp/ccW4PsfG.s:133: Error: unsupported instruction `vpminub'
/tmp/ccW4PsfG.s:144: Error: unsupported instruction `vpminuw'
/tmp/ccW4PsfG.s:155: Error: unsupported instruction `vpminuw'
/tmp/ccW4PsfG.s:166: Error: unsupported instruction `vpminsb'
/tmp/ccW4PsfG.s:177: Error: unsupported instruction `vpminsb'
/tmp/ccW4PsfG.s:202: Error: unsupported instruction `vpminsw'
/tmp/ccW4PsfG.s:227: Error: unsupported instruction `vpmaxub'
/tmp/ccW4PsfG.s:238: Error: unsupported instruction `vpmaxuw'
/tmp/ccW4PsfG.s:249: Error: unsupported instruction `vpmaxuw'
/tmp/ccW4PsfG.s:260: Error: unsupported instruction `vpmaxsb'
/tmp/ccW4PsfG.s:271: Error: unsupported instruction `vpmaxsb'
/tmp/ccW4PsfG.s:296: Error: unsupported instruction `vpmaxsw'
We already have Yw constraint which is equivalent to v for
-mavx512bw -mavx512vl and to nothing otherwise, per discussions
this patch changes it to stand for x otherwise. As it is an
undocumented internal constraint, hopefully it won't affect
any inline asm in the wild.
For the instructions that need both we need to use Yw and
v for modes that don't need that.
2021-03-07 Jakub Jelinek <jakub@redhat.com>
PR target/99321
* config/i386/constraints.md (Yw): Use SSE_REGS if TARGET_SSE
but TARGET_AVX512BW or TARGET_AVX512VL is not set. Adjust description
and comment.
* config/i386/sse.md (v_Yw): New define_mode_attr.
(*<insn><mode>3, *mul<mode>3<mask_name>, *avx2_<code><mode>3,
*sse4_1_<code><mode>3<mask_name>): Use <v_Yw> instead of v
in constraints.
* config/i386/mmx.md (mmx_pshufw_1, *vec_dupv4hi): Use Yw instead of
xYw in constraints.
* lib/target-supports.exp
(check_effective_target_assembler_march_noavx512bw): New effective
target.
* gcc.target/i386/avx512vl-pr99321-1.c: New test.
Here, during cxx_eval_increment_expression (with lval=false) of
++__first where __first is &"mystr"[0], we correctly update __first
to &"mystr"[1] but we end up returning &"mystr"[0] + 1 instead of
&"mystr"[1]. This unreduced return value inhibits other pointer
arithmetic folding during later constexpr evaluation, which ultimately
causes the constexpr evaluation to fail.
It turns out the simplification of &"mystr"[0] + 1 to &"mystr"[1]
is performed by cxx_fold_pointer_plus_expression, not by fold_build2.
So we perform this simplification during constexpr evaluation of
the temporary MODIFY_EXPR (during which we assign to __first the
simplified value), but then we return 'mod' which has only been folded
via fold_build2 and hasn't gone through cxx_fold_pointer_plus_expression.
This patch fixes this by updating 'mod' with the result of the
MODIFY_EXPR evaluation appropriately, so that it captures any additional
folding of the expression when !lval. We now need to be wary of this
evaluation failing and returning e.g. the MODIFY_EXPR or NULL_TREE; it
seems checking *non_constant_p should cover our bases here and is
generally prudent.
gcc/cp/ChangeLog:
PR c++/99287
* constexpr.c (cxx_eval_increment_expression): Pass lval when
evaluating the MODIFY_EXPR, and update 'mod' with the result of
this evaluation. Check *non_constant_p afterwards. For prefix
ops, just return 'mod'.
gcc/testsuite/ChangeLog:
PR c++/99287
* g++.dg/cpp2a/constexpr-99287.C: New test.
Co-authored-by: Jakub Jelinek <jakub@redhat.com>
This patch adds printing of "<address-space-N>" markers for aggregates
in non-default address spaces.
gcc/
* tree-pretty-print.c (dump_generic_node): Emit non-generic
address space info for aggregates.
D doesn't need C99-like requirements for complex multiply and divide,
the default set by common.opt is sufficient enough.
gcc/d/ChangeLog:
* d-lang.cc (d_init_options_struct): Don't set default
flag_complex_method.
As reported, bootstrap currently fails on older Darwin because MAP_ANONYMOUS
is not defined.
The following is what gcc/system.h does, so I think it should work for
libgcov.
2021-03-06 Jakub Jelinek <jakub@redhat.com>
PR gcov-profile/99406
* libgcov.h (MAP_FAILED, MAP_ANONYMOUS): If HAVE_SYS_MMAN_H is
defined, define these macros if not defined already.
As can be seen on:
unsigned char f1 (unsigned char x, int y) { return std::rotl (x, y); }
unsigned char f2 (unsigned char x, int y) { return std::rotr (x, y); }
unsigned short f3 (unsigned short x, int y) { return std::rotl (x, y); }
unsigned short f4 (unsigned short x, int y) { return std::rotr (x, y); }
unsigned int f5 (unsigned int x, int y) { return std::rotl (x, y); }
unsigned int f6 (unsigned int x, int y) { return std::rotr (x, y); }
unsigned long int f7 (unsigned long int x, int y) { return std::rotl (x, y); }
unsigned long int f8 (unsigned long int x, int y) { return std::rotr (x, y); }
unsigned long long int f9 (unsigned long long int x, int y) { return std::rotl (x, y); }
unsigned long long int f10 (unsigned long long int x, int y) { return std::rotr (x, y); }
//unsigned __int128 f11 (unsigned __int128 x, int y) { return std::rotl (x, y); }
//unsigned __int128 f12 (unsigned __int128 x, int y) { return std::rotr (x, y); }
constexpr auto a = std::rotl (1234U, 0);
constexpr auto b = std::rotl (1234U, 5);
constexpr auto c = std::rotl (1234U, -5);
constexpr auto d = std::rotl (1234U, -__INT_MAX__ - 1);
the current <bit> definitions of std::__rot[lr] aren't pattern recognized
as rotates, they are too long/complex for that, starting with signed modulo,
special case for 0 and different cases for positive and negative.
For types with power of two bits the following patch adds definitions that
the compiler can pattern recognize and turn e.g. on x86_64 into ro[lr][bwlq]
instructions. For weirdo types like unsigned __int20 etc. it keeps the
current definitions.
2021-03-06 Jakub Jelinek <jakub@redhat.com>
PR libstdc++/99396
* include/std/bit (__rotl, __rotr): Add optimized variants for power of
two _Nd which the compiler can pattern match the rotates.
This makes tsubst_copy appropriately handle a variable template-id, which
in turn fixes tsubsting a COMPONENT_REF whose member operand is known at
parse time to be a variable template-id, as in the initialization of 'x'
in the first testcase. Previously, we rejected this testcase with the
error "foo_t::bar<T> is not a function template", issued from
lookup_template_fuction.
We were already properly handling the analagous case where the object
operand of the COMPONENT_REF is dependent (and so the member operand is
a dependent template name), but there doesn't seems to be existing test
coverage for this, hence the second testcase below.
gcc/cp/ChangeLog:
PR c++/96330
* pt.c (tsubst_copy) <case TEMPLATE_ID_EXPR>: Rename local
variable 'fn' to 'tmpl'. Handle a variable template-id by
calling lookup_template_variable.
gcc/testsuite/ChangeLog:
PR c++/96330
* g++.dg/cpp1y/var-templ68.C: New test.
* g++.dg/cpp1y/var-templ68a.C: New test.
Co-authored-by: Jakub Jelinek <jakub@redhat.com>
My recent r11-7454 changed the way do_auto_deduction handles constrained
placeholders during template argument deduction (context == adc_unify)
when processing_template_decl != 0. Before the patch, we would just
ignore the constraints on the placeholder, and return the deduced type.
After the patch, we now punt and return the original placeholder type
While this change fixed instances where we'd prematurely resolve a
constrained placeholder return or variable type with non-dependent
initializer at template parse time (such as PR96444), it broke the
adc_unify callers that rely on the previous behavior.
This patch restores the previous behavior during adc_unify deduction
while retaining the new behavior only during adc_variable_type or
adc_return_type deduction.
We additionally now need to pass the outer template arguments to
do_auto_deduction during unify, for sake of constraint checking.
But we want to avoid substituting these outer arguments into type
when the caller has already done so, so this patch adds a
TEMPLATE_TYPE_LEVEL check to do_auto_deduction to that effect.
This above is enough to fix partial specialization of non-nested
templates with constrained 'auto' template parameters, but it doesn't
fix the nested template case, ultimately because
most_specialized_partial_spec passes only the innermost template
arguments to get_partial_spec_bindings, and so outer_targs during
do_auto_deduction (called from unify) contains only the innermost
template arguments, and this breaks satisfaction. Fixing this properly
is perhaps too risky at this stage, so this patch adds a hack to
do_auto_deduction to compensate for callers that don't supply all outer
template arguments. The goal of this hack is to ensure placeholder type
constraint checking continues to work whenever it worked before
r11-7454, namely whenever the constraint is non-dependent.
Finally, this patch allows do_auto_deduction to resolve a constrained
placeholder type ahead of time (at template parse time), as long as the
constraint is non-dependent.
gcc/cp/ChangeLog:
PR c++/99365
* pt.c (unify) <case TEMPLATE_TYPE_PARM>: Pass targs as
outer_targs to do_auto_deduction.
(placeholder_type_constraint_dependent_p): Define.
(do_auto_deduction): When processing_template_decl != 0
and context is adc_unify and we have constraints, pretend the
constraints are satisfied instead of punting. Otherwise don't
punt unless placeholder_type_constraint_dependent_p holds.
Add some clarifying sanity checks. Add a hack to add missing
outermost template levels to outer_args before checking
satisfaction. Don't substitute outer_targs into type if it's
already been done.
gcc/testsuite/ChangeLog:
PR c++/99365
* g++.dg/cpp2a/concepts-partial-spec9.C: New test.
* g++.dg/cpp2a/concepts-placeholder4.C: New test.
It's been 32 ever since the CRIS port was committed.
A TODO-item of mine has been to check whether the
non-default setting of MAX_FIXED_MODE_SIZE makes sense
wrt. performance and/or code-size with a modern gcc. It
doesn't, so it goes. The setting is now the default,
GET_MODE_BITSIZE (DImode) (defaults.h) i.e. 64.
Measurements at r11-7500 (f3641ac70e) on coremark with
"-O2 -march=v10 -mno-mul-bug-workaround" shows 0.04%
performance improvement with this change, and by inspection
the effect is that unused and/or unneeded stack-frames are
eliminated more often in the floating-point library (not in
the coremark main loop, thus the marginal improvement). The
floating-point library is full of 64-bit unions used to pick
apart floating point numbers, so this kind of makes sense.
Inspection of a simulator trace shows that this is indeed
the only effect in coremark. Other local micro-benchmarks
agree as to the net effect (no traces were inspected
though), and the most floating-point-heavy test shows an 8%
improvement. These effects are of course subject to gcc
core tweaks and may make sense to be adjusted again in a
future release.
While MAX_FIXED_MODE_SIZE is IMO supposed to be an optional
macro for performance, setting it to anything smaller than
twice the size of an address exposes bad decisions in gcc
middle end, sometimes leading to internal compiler errors.
(It being set to 32 should *not* affect use of DImode as an
integer mode; it's for "integer machine modes of this size
or smaller can be used for structures and unions with the
appropriate sizes".) Thus, with the default 64 instead of
32, there are two tests that now pass for the first time:
gcc.dg/attr-vector_size.c and gcc.dg/tree-ssa/pr93121-1.c.
gcc:
* config/cris/cris.h (MAX_FIXED_MODE_SIZE): Don't define.
The issue in this PR is that we wrongly reject converting pointers to
member function of incomplete types, one of which has noexcept. Recall
that pointers (including pointers to member functions) to non-throwing
functions can be implicitly converted to potentially-throwing functions
(but not vice versa).
We reject the conversion when called from can_convert_arg_bad because
standard_conversion can't create such a conversion. It comes down to
the DERIVED_FROM_P check in the TYPE_PTRMEMFUNC_P block. It considers
every class derived from itself, but not when the class is incomplete.
But surely we want to reach fnptr_conv_p when tbase is fbase (one of
them could be an alias to the other so use same_type_p instead of ==).
Another approach would be to not perform DERIVED_FROM_P at all when
either tbase or fbase are incomplete (so perhaps something like at the
end of ptr_reasonably_similar).
gcc/cp/ChangeLog:
PR c++/99374
* call.c (standard_conversion): When converting pointers to
member, don't return NULL when the bases are equivalent but
incomplete.
gcc/testsuite/ChangeLog:
PR c++/99374
* g++.dg/cpp1z/noexcept-type23.C: New test.
We crash here, because in a template, an enumerator doesn't have
a type until we've called finish_enum_value_list. But our -Wshadow
implementation, check_local_shadow, is called when we pushdecl in
build_enumerator, which takes place before finish_enum_value_list.
gcc/cp/ChangeLog:
PR c++/99120
* name-lookup.c (check_local_shadow): Check if the type of decl
is non-null before checking TYPE_PTR*.
gcc/testsuite/ChangeLog:
PR c++/99120
* g++.dg/warn/Wshadow-17.C: New test.
My fix for PR96078 made us stop warning about flatten on an alias if the
target has the alias, which is exactly the case tested here. So let's
remove the expected warning and add a similar case which does warn.
gcc/testsuite/ChangeLog:
PR c/99363
* gcc.dg/attr-flatten-1.c: Adjust.
When performing cfg cleanup at the end of cfg pass, if there are any OpenMP
regions and some basic blocks are unreachable and contain forced labels,
remove_bb moves the labels to previous bb, but if the two bb belong to different
OpenMP regions, that means it will end up in a different function from where
it was assumed to be and checked e.g. during gimplification or OpenMP region
SESE checking.
The following patch will place the labels to some bb from the right OpenMP
region if the previous bb is not that. I think it should happen very rarely,
normally the bbs from each OpenMP region should be from the before-cfg pass
adjacent and the problems will usually be only if the OpenMP regions are
no-return, so I hope it isn't fatal that it searches through all bbs on the miss.
If it turns out to be a problem, it can always lazily create some better data
structure and maintain it through bb removals when it reaches that case the
first time.
2021-03-05 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99322
* tree-cfg.c (bb_to_omp_idx): New variable.
(execute_build_cfg): Release the bb_to_omp_idx vector after
cleanup_tree_cfg returns.
(handle_abnormal_edges): Remove bb_to_omp_idx argument, adjust
for bb_to_omp_idx being a vec<int> instead of pointer to array
of ints.
(make_edges): Remove bb_to_omp_idx local variable, don't pass
it to handle_abnormal_edges, adjust for bb_to_omp_idx being a
vec<int> instead of pointer to array of ints and don't free/release
it at the end.
(remove_bb): When removing a bb and placing forced label somewhere
else, ensure it is put into the same OpenMP region during cfg
pass if possible or to entry successor as fallback. Unregister
bb from bb_to_omp_idx.
* c-c++-common/gomp/pr99322.c: New test.
Header units can declare the same entity, and this can lead to one of
them containing a (non-using) binding to an import. If one gets the
cluster ordering just right, an assert will trigger. Relax that assert.
PR c++/99245
gcc/cp/
* module.cc (module_state::write_cluster): Relax binding assert.
gcc/testsuite/
* g++.dg/modules/pr99245_a.H: New.
* g++.dg/modules/pr99245_b.H: New.
This turned out to be the function version of the previous fix. We
can import an implicit specialization declaration that we need to
instantiate. We must mark the instantiation so we remember to stream
it.
PR c++/99377
gcc/cp/
* pt.c (instantiate_decl): Call set_instantiating_module.
gcc/testsuite/
* g++.dg/modules/pr99377_a.H: New.
* g++.dg/modules/pr99377_b.C: New.
* g++.dg/modules/pr99377_c.C: New.
PR98118 shows that TYPE_NEEDS_CONSTRUCTING is necessary but not
sufficient. Use type_build_ctor_call() instead.
gcc/cp/ChangeLog:
PR c++/98118
* coroutines.cc (build_co_await): Use type_build_ctor_call()
to determine cases when a CTOR needs to be built.
(flatten_await_stmt): Likewise.
(morph_fn_to_coro): Likewise.
gcc/testsuite/ChangeLog:
PR c++/98118
* g++.dg/coroutines/pr98118.C: New test.
From the PR:
The wording of [dcl.fct.def.coroutine]/15 states:
* The expression co_await promise.final_suspend() shall not be
potentially-throwing ([except.spec]).
See http://eel.is/c++draft/dcl.fct.def.coroutine#15
and http://eel.is/c++draft/except.spec#6
ie. all of the following must be declared noexcept (if they form part of the await-expression):
- promise_type::final_suspend()
- finalSuspendObj.operator co_await()
- finalSuspendAwaiter.await_ready()
- finalSuspendAwaiter.await_suspend()
- finalSuspendAwaiter.await_resume()
- finalSuspedObj destructor
- finalSuspendAwaiter destructor
This implements the checks for these cases and rejects such code with
a diagnostic if exceptions are enabled.
gcc/cp/ChangeLog:
PR c++/95616
* coroutines.cc (coro_diagnose_throwing_fn): New helper.
(coro_diagnose_throwing_final_aw_expr): New helper.
(build_co_await): Diagnose throwing final await expression
components.
(build_init_or_final_await): Diagnose a throwing promise
final_suspend() call.
gcc/testsuite/ChangeLog:
PR c++/95616
* g++.dg/coroutines/pr95616-0-no-exceptions.C: New test.
* g++.dg/coroutines/pr95616-0.C: New test.
* g++.dg/coroutines/pr95616-1-no-exceptions.C: New test.
* g++.dg/coroutines/pr95616-1.C: New test.
* g++.dg/coroutines/pr95616-2.C: New test.
* g++.dg/coroutines/pr95616-3-no-exceptions.C: New test.
* g++.dg/coroutines/pr95616-3.C: New test.
* g++.dg/coroutines/pr95616-4.C: New test.
* g++.dg/coroutines/pr95616-5.C: New test.
* g++.dg/coroutines/pr95616-6.C: New test.
The coroutine body is wrapped in a try-catch block which is responsible for
handling any exceptions thrown by the original function body. Originally, the
initial suspend expression was outside this, but an amendement to the standard
places the await_resume call inside and eveything else outside.
This means that any exception thrown prior to the initial suspend expression
await_resume() will propagate to the ramp function. However, some portion of
the coroutine state will exist at that point (how much depends on where the
exception is thrown from). For example, we might have some frame parameter
copies, or the promise object or the return object any of which might have a
non-trivial DTOR. Also the frame itself needs to be deallocated. This patch
fixes the handling of these cases.
gcc/cp/ChangeLog:
PR c++/95615
* coroutines.cc (struct param_info): Track parameter copies that need
a DTOR.
(coro_get_frame_dtor): New helper function factored from build_actor().
(build_actor_fn): Use coro_get_frame_dtor().
(morph_fn_to_coro): Track parameters that need DTORs on exception,
likewise the frame promise and the return object. On exception, run the
DTORs for these, destroy the frame and then rethrow the exception.
gcc/testsuite/ChangeLog:
PR c++/95615
* g++.dg/coroutines/torture/pr95615-01.C: New test.
* g++.dg/coroutines/torture/pr95615-02.C: New test.
* g++.dg/coroutines/torture/pr95615-03.C: New test.
* g++.dg/coroutines/torture/pr95615-04.C: New test.
* g++.dg/coroutines/torture/pr95615-05.C: New test.
Function get_constraint_type returns CT__UNKNOWN for empty constraint
and CT_FIXED_FORM for "X". So process_address_1 skipped
decompose_mem_address only for "X" constraint. To do the same for empty
constraint, skip decompose_mem_address for CT__UNKNOWN.
gcc/ChangeLog:
PR target/99378
* lra-constraints.c (process_address_1): Skip decomposing address
for asm insn operand with unknown constraint.
gcc/testsuite/ChangeLog:
PR target/99378
* gcc.target/i386/pr99123-2.c: New.
In the PR 98078 testcase, speculative call-graph edges which were
created by IPA-CP are confirmed during inlining but
cgraph_edge::set_call_stmt does not take it very well.
The function enters the update_speculative branch and updates the
edges in the speculation bundle separately (by a recursive call), but
when it processes the first direct edge, most of the bundle actually
ceases to exist because it is devirtualized. It nevertheless goes on
to attempt to update the indirect edge (that has just been removed),
which surprisingly gets as far as adding the edge to the
call_site_hash, the same devirtualized edge for the second time, and
that triggers an assert.
Fixed by this patch which makes the function aware that it is about to
resolve a speculation and do so instead of updating components of
speculation. Also, it does so before dealing with the hash because
the speculation resolution code needs the hash to point to the first
speculative direct edge and also cleans the hash up by calling
update_call_stmt_hash_for_removing_direct_edge.
Bootstrapped and tested on x86_64-linux, also profile-LTO-bootstrapped
on the same system.
gcc/ChangeLog:
2021-01-20 Martin Jambor <mjambor@suse.cz>
PR ipa/98078
* cgraph.c (cgraph_edge::set_call_stmt): Do not update all
corresponding speculative edges if we are about to resolve
sepculation. Make edge direct (and so resolve speculations) before
removing it from call_site_hash.
(cgraph_edge::make_direct): Relax the initial assert to allow calling
the function on speculative direct edges.
When an incomplete class specialization is imported, and is completed
by instantiation, we were failing to mark the instantiation, and thus
didn't stream it out. Leading to errors in importing as we had
members of an incomplete type.
PR c++/99389
gcc/cp/
* pt.c (instantiate_class_template_1): Set instantiating module
here.
gcc/testsuite/
* g++.dg/modules/pr99389_a.H: New.
* g++.dg/modules/pr99389_b.C: New.
* g++.dg/modules/pr99389_c.C: New.
gcc/ada/
PR ada/99264
* init.c (__gnat_alternate_sta) [Linux]: Remove preprocessor test on
MINSIGSTKSZ and bump size to 32KB.
* libgnarl/s-osinte__linux.ads (Alternate_Stack_Size): Bump to 32KB.
gcc/
PR rtl-optimization/99376
* rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number
of low-order zero bits is too large, set the result to 0 directly.
The test is still failing and is a regression on master for
cris-elf: the remedy for (all) other targets wasn't
sufficient. I'm not myself going to put any effort into it
(debug-information being different enough for a test to
fail, is not a priority) and apparently not anyone else in
the last 5 years, so I'm just going to xfail it.
gcc/testsuite:
PR debug/66668
* gcc.dg/debug/dwarf2/stacked-qualified-types-3.c: xfail for cris-*-*
This is not a GCC problem, but a fault in the static linker where,
when a source file is used multiple times, with conditional compilation
the source file is only referenced by the linker for the first object.
Then, when dsymutil tries to find the source file for next object based
off that source there is no record for it.
gcc/testsuite/ChangeLog:
* lib/prune.exp: Prune useless output caused by a linker bug.
The following testcase ICEs on aarch64. The problem is that
op0 is (subreg:HI (reg:HF ...) 0) and because we can't create a SUBREG of a
SUBREG and aarch64 doesn't have HImode insv, only SImode insv,
store_bit_field_using_insv tries to create (subreg:SI (reg:HF ...) 0)
which is not valid for the target and so gen_rtx_SUBREG ICEs.
The following patch fixes it by punting if the to be created SUBREG
doesn't validate, callers of store_bit_field_using_insv can handle
the fallback.
2021-03-04 Jakub Jelinek <jakub@redhat.com>
PR middle-end/93235
* expmed.c (store_bit_field_using_insv): Return false of xop0 is a
SUBREG and a SUBREG to op_mode can't be created.
* gcc.target/aarch64/pr93235.c: New test.
