Commit Graph

3933 Commits

Author SHA1 Message Date
Mike Frysinger
b5a4a01af4 sim: hw: rework code to avoid gcc warnings
Newer gcc thinks we might return a pointer to a stack buffer, but
we don't -- we strdup it before returning.  Rework the code to just
malloc the buffer from the start and avoid the stack+strdup.
2021-01-09 08:40:07 -05:00
Mike Frysinger
ce0be4070f sim: common: add missing stdlib.h for abort() 2021-01-09 02:45:14 -05:00
Mike Frysinger
46f900c065 sim: require a C11 compiler
With GDB requiring a C++11 compiler now, this hopefully shouldn't
be a big deal.  It's been 10 years since C11 came out, so should
be plenty of time to upgrade.

This will allow us to start cleaning up random header logic and
many of our non-standard custom types.
2021-01-08 15:45:42 -05:00
Mike Frysinger
f4cfa91741 sim: ppc: stub out sim_memory_map
Not clear how to implement this in the ppc-specific sim, so just
stub it out.  This is as good as it was previously.
2021-01-08 01:03:10 -05:00
Mike Frysinger
0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir
We don't want arch-specific entries in the common ChangeLog files.
Most arches do this already, so clean up the recent additions, and
move some older entries down to help avoid confusing newcomers.
2021-01-07 12:22:33 -05:00
Mike Frysinger
e6c1dbbfe8 sim: cris: disable test that crashes the linker
PR ld/13900
Linking this test crashes the linker, so disable it.  The crash
was reported about 9 years ago but haven't made progress, so lets
avoid the failures in test runs.
2021-01-07 12:22:14 -05:00
Mike Frysinger
a39487c668 sim: cris: use -sim with C tests for cris-elf targets
Building the C tests with a cris-elf toolchain (gcc-10.2 &
newlib-4.1.0) currently fail due to warnings it emits:
cris-elf-ld: libc.a(lib_a-closer.o): in function `_close_r':
newlib/libc/reent/closer.c:47: warning: _close is not implemented and will always fail

This is because the default target for cris-elf is bare metal, not
the simulator.  For that, we need -sim.  So add it for elf targets.

We don't add it for all targets as the simulator (and testsuite)
run both libgloss programs as well as Linux userspace programs.
2021-01-07 12:21:48 -05:00
Mike Frysinger
bfc7d04afb sim: h8300: delete opcode caching
This is in preparation for converting h8300 over to the common memory
framework.  It's not clear how much of a speed gain this was providing
in the first place -- a naive test of ~400k insns (using shlr.s) shows
that this code actually slowed things down a bit.

If anyone really cares about h8300 anymore, they can migrate to the
common insn caching logic.
2021-01-07 12:21:12 -05:00
Mike Frysinger
e904f56d02 gdb/sim: add support for exporting memory map
This allows gdb to quickly dump & process the memory map that the sim
knows about.  This isn't fully accurate, but is largely limited by the
gdb memory map format.  While the sim supports RWX bits, gdb can only
handle RW or RO regions.
2021-01-07 12:18:59 -05:00
Mike Frysinger
9446bcf6be fix paths in ChangeLog 2021-01-07 01:27:06 -05:00
Mike Frysinger
1861f7cfbf sim: cris: fix C tests with newer toolchains
Make sure we include unistd.h for getpid prototypes to fix build
warnings/errors with newer compilers & C libraries.

Doing that for close in openpf highlights these were using the
wrong function -- need to use fclose on FILE*, not close.

These tests pass again with a cris-elf toolchain.
2021-01-07 01:19:49 -05:00
Mike Frysinger
865288236d sim: fr30: delete unused testsuite
Looking through the history, it doesn't seem like the fr30 port was
ever merged.  There used to be a testsuite/fr30-elf/ dir, but that
was punted back in 2005 as being dead too.  Since there's no refs
and the dir hasn't been touched since 1999, lets assume no one will
ever notice or care.
2021-01-05 19:29:46 -05:00
Mike Frysinger
c004e77f7d sim: testsuite: delete unused Make-common.in file
This seems like it was meant to unify arch test Makefiles, but
that never happened, and we've instead unified using dejagnu.
2021-01-05 19:29:11 -05:00
Mike Frysinger
a2f8e947a8 sim: h8300: fix test mach markers
These tests all fail to assemble when targeting the h8300 or h8300h
cpu variants with errors like:
rotl.s:242: Warning: Opcode `rotl.b' with these operand types not available in H8/300H mode
rotl.s:242: Error: invalid operands

It's been this way for years and no one seems to care, so disable
them for those targets since the assembler thinks it's impossible.
2021-01-05 19:26:33 -05:00
Mike Frysinger
0c7f5bd08c sim: h8300: simplify testsuite runner
We don't need to manually enumerate every test.  Use a glob function
like every other port and rely on the (already existing) #mach headers
in each file to filter out targets we don't care about.
2021-01-05 19:26:17 -05:00
Mike Frysinger
3d52735bab sim: include stdlib.h for atoi()
Make sure the files using atoi() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
2021-01-04 20:17:37 -05:00
Mike Frysinger
9416af6e7d sim: stdlib.h for abs()
Make sure the files using abs() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
2021-01-04 20:13:10 -05:00
Mike Frysinger
dfb856ba26 sim: update bug URI to https:// 2021-01-04 18:14:37 -05:00
Mike Frysinger
babd2ee15d sim: common: version: add build & homepage info when interactive
This mirrors gdb behavior of dumping extra info when being run in
interactive mode.  It also gives us an excuse to use the otherwise
unused sim_print_config.
2021-01-04 18:10:40 -05:00
Mike Frysinger
2b667e3297 sim: common: use sim_config_print name
Meant to push this variant where naming preference is given to the
module the code resides in rather than the operation it performs.
2021-01-04 18:10:40 -05:00
Mike Frysinger
19b1c38562 sim: common: add a version output helper w/copyright+license info
This mirrors the existing sim_print_help function, and the behavior
of all other GNU tools with their --version.
2021-01-04 17:41:23 -05:00
Mike Frysinger
dbed468bcb sim: common: rename sim_print_config
print_sim_config has never been used anywhere, so rename it to follow
the sim_* naming style for all other symbols we export.
2021-01-04 17:35:20 -05:00
Mike Frysinger
0ede24f2c4 sim: common: add align_{up,down} to match gdb
We have ALIGN_{8,16,PAGE} and FLOOR_PAGE macros (where PAGE is defined as
4k) which were imported from the ppc sim.  But no other sim utilizes these
and hardcoding the sizes in the name is a bit limiting.

Let's delete these and import the two general macros that gdb uses:
	align_up(addr, bytes)
	align_down(addr, bytes)

This in turn allows us to cut over the Blackfin code immediately.
2021-01-02 20:55:21 -05:00
Joel Brobecker
3666a04883 Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...

gdb/ChangeLog

        Update copyright year range in copyright header of all GDB files.
2021-01-01 12:12:21 +04:00
Pavel I. Kryukov
382bc56bc7 sim/mips/sim-main.c: Include <stdlib.h> (for abort() declaration)
sim/mips/ChangeLog:

	* sim-main.c: Include <stdlib.h>.
2020-12-31 08:14:36 +04:00
Jens Bauer
9f132af9e1 Add support for the SDIV and UDIV instructions to the ARM simulator.
* armemu.c (handle_v6_insn): Add support for SDIV and UDIV.
	* thumbemu.c (handle_T2_insn): Likewise.
2020-12-15 12:40:35 +00:00
Pavel I. Kryukov
ad9675dd80 sim/mips/cp1.c: Include <stdlib.h> for abort() declaration
sim/mips/ChangeLog:

	* cp1.c: Include <stdlib.h>
2020-12-14 07:02:05 +04:00
Dimitar Dimitrov
e57cf1f2cd sim: pru: Add support for LMBD instruction
Binutils support for LMBD instruction was merged [1]. So add it also
to simulator.

LMBD instruction does left-most-bit-detection. It returns 32 if
the given bit value is not found in the provided word value.

[1] https://sourceware.org/pipermail/binutils/2020-October/113901.html

sim/pru/ChangeLog:

	* pru.h (RS1SEL): New macro.
	(RS1_WIDTH): New macro.
	* pru.isa: Describe the LMBD instruction.

sim/testsuite/sim/pru/ChangeLog:

	* lmbd.s: New test.
2020-11-12 22:41:10 +02:00
Nick Clifton
94cde56ab3 m32r sim: Add prototypes for functions that pass/return DI values
* m32r-sim.h (m32rbf_h_accum_get_handler): Always provide a
	prototype for this function.
	(m32rbf_h_accum_set_handler): Likewise.
	(m32r2f_h_accums_get_handler): Prototype.
	(m32r2f_h_accums_set_handler): Prototype.
2020-11-12 12:22:18 +00:00
Simon Marchi
8807d3127c sim/bpf: re-generate configure
I noticed a little diff when re-generating the configure file in this
directory.

sim/ChangeLog:

	* bpf/configure: Re-generate.

Change-Id: Ieb26be2cc1be8108d4b08387255f45b57f288171
2020-11-01 19:39:11 -05:00
Andrew Burgess
63aa0ac0fd sim: move ChangeLog entries into the correct files
Moves some ChangeLog entries under sim/ into the correct files.
2020-10-22 13:39:26 +01:00
Dr. David Alan Gilbert
777cd7ab3f Fix printf formatting errors where "0x" is used as a prefix for a decimal number.
bfd	* po/es.po: Fix printf format

binutils * windmc.c: Fix printf format

gas	* config/tc-arc.c: Fix printf format

opcodes	* po/es.po: Fix printf format

sim	* arm/armos.c: Fix printf format
	* ppc/emul_netbsd.c: Fix printf format
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
2020-10-22 12:00:10 +01:00
Andrew Burgess
043f5c63f0 sim: Fix autoreconf errors in sim/ directory
Run autoreconf in sim/ directory and you'll see some errors.  The
problem is that autoreconf (a perl script) does not evaluate the value
passed as an argument to AC_CONFIG_AUX_DIR, so something like:

  AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)

does not do the right thing inside autoreconf, my understanding is
that changing to something like this is fine:

  AC_CONFIG_AUX_DIR(../..)

the generated configure seems to check the value passed, and the value
passed relative to the source directory, so I think we get basically
the same behaviour as before.

sim/testsuite/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/d10v-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/frv-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/m32r-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/mips64el-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.
2020-10-06 11:29:44 +01:00
Andrew Burgess
e163628395 sim/m32r: return register sizes after fetch and store
The m32r simulator currently always returns -1 for the register size
after both a fetch and a store.  In the fetch case GDB is forgiving of
this, but in the store case GDB treats a return value of -1 as an
error.

This commit updates the m32r simulator to return a valid register size
when fetching or storing a register.  This fixes any GDB test that
writes to a register, which will include any GDB test that makes an
inferior call, for example gdb.base/break.exp.

sim/m32r/ChangeLog:

	* m32r.c (m32rbf_register_size): New function.
	(m32rbf_fetch_register): Use new function.
	(m32rbf_store_register): Likewise.
2020-09-18 17:26:07 +01:00
David Faust
3ad6c19423 bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).

Tested in bpf-unknown-none.

cpu/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf.cpu (define-alu-instructions): Correct semantic operators
	for div, mod to unsigned versions.

sim/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf/sem-be.c: Regenerate.
	* bpf/sem-le.c: Likewise.

sim/testsuite/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* sim/bpf/alu.s: Correct div and mod tests.
	* sim/bpf/alu32.s: Likewise.
2020-09-08 11:39:07 -07:00
Jose E. Marchesi
0316fb52d6 bpf: several small fixes in the simulator
This patch fixes the following problems:
- Missing includes in several files leading to implicit function
  declarations.
- Missing prototype for bpf_trace_printk in bpf-helpers.h
- The simulator bitsize was set to 32 bits, causing truncation of
  the program counter.

Tested in bpf-unknown-none.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* bpf/bpf.c: Include bpf-helpers.h.
	* bpf/bpf-helpers.h: Provide a prototype for bpf_trace_printk.
	* bpf/configure.ac: Set simulator bitsize to 64.
	* bpf/configure (includedir): Regenerate.
	* bpf/sim-if.c: Include stdlib.h.
	* bpf/traps.c: Likewise.
2020-09-03 18:22:08 +02:00
Jose E. Marchesi
1d01693f55 sim: better handle builds of primary targets lacking sims
When building with a primary target that doesn't feature a simulator,
one would expect for nothing to be done in sim/.  However, a
$(top_builddir)/sim/testsuite directory is created, with a Makefile
containing a rule like:

check-DEJAGNU: site.exp
	echo "Dejagnu-checking in `pwd` directory ..."
	rootme=`pwd`; export rootme; echo rootme = $$rootme; \
	srcdir=`cd ${srcdir}; pwd`; export srcdir ; echo srcdir = $$srcdir; \
	EXPECT=${EXPECT} ; export EXPECT ; echo EXPECT = $$EXPECT; \
	if [ -f $$rootme/../../expect/expect ]; then \
	  TCL_LIBRARY=`cd $$srcdir/../../tcl/library && pwd`; \
	  export TCL_LIBRARY; \
	fi; \
        echo TCL_LIBRARY = $$TCL_LIBRARY; \
	runtest=$(RUNTEST); echo runtest = $$runtest; \
	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
	  $$runtest $(RUNTESTFLAGS); \
	else echo "WARNING: could not find \`runtest'" 1>&2; :;\
	fi

Consequently, when `make check' recurses into sim/testsuite, the above
rule is executed.  Until now, the desired effect (of doing nothing)
was achieved because `runtest --version' fails due to a malformed
site.exp being generated in objdir: it is malformed because the
primary target doesn't configure a $sim_arch. i.e. this was doing the
right thing just by chance.

However, the git version of dejagnu seems to have changed in a way
runtest doesn't try to load site.exp when it gets --version.  The net
effect is that the rule above tries to actually run the tests, failing
miserably.

This little patch makes sim/configure to not recurse into
sim/testsuite if the primary target didn't configure a simulator.

Tested with:
- A simulator target (bpf-unkonwn-none).
- A simulator-less target (x86_64-linux-gnu).
- A simulator-less target and --build-targets=all.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.ac: Do not configure sim/testsuite nor sim/igen if the
	primary target doesn't have a simulator.
	* configure: Regenerate.
2020-09-03 18:21:20 +02:00
Simon Marchi
5798d69f03 sim/bfin: include config/pkg.m4 in configure.ac
When trying to re-generate configure in sim/bfin, I get:

    $ autoreconf -vf
    autoreconf: Entering directory `.'
    autoreconf: configure.ac: not using Gettext
    autoreconf: running: aclocal --force
    autoreconf: configure.ac: tracing
    autoreconf: configure.ac: not running libtoolize: --install not given
    autoreconf: running: /opt/autostuff/bin/autoconf --force
    configure.ac:57: error: possibly undefined macro: AC_CHECK_LIB
          If this token and others are legitimate, please use m4_pattern_allow.
          See the Autoconf documentation.
    autoreconf: /opt/autostuff/bin/autoconf failed with exit status: 1

This happens since commit f693213d12 ("Run `autoreconf -vf` throughout").

The problem (not clear from the error message) is that the
PKG_CHECK_MODULES macro used in configure.ac is undefined.  In the past, I
suppose that it relied on the person running autoconf having pkg.m4 (from
pkg-config) in their include path.  That's not my case.

Since we recently added a local version of PKG_CHECK_MODULES to our tree,
we can just make sim/bfin/configure.ac use it.  This patch makes
configure.ac include config/pkg.m4, and re-generates configure.  With this,
the configure script appears to be generated correctly, I am able to
configure and build the bfin simulator.

Note: using sinclude to include the required m4 files makes no sense to
me.  These files contain macros we need, if they are not defined then
the resulting file is unusable.  And sinclude fails silently if the file
is not found.  So, better use include/m4_include.

sim/bfin/ChangeLog:

	* configure.ac: Include config/pkg.m4.

Change-Id: I7d8012e5ed510cd7746b94e918f0feb1c701cd83
2020-08-21 11:55:08 -04:00
Luis Machado
a5353ae6cf [ARM, sim] Fix build failure with -Werror (PR26365)
There is a bit of a situation in the ARM sim with regards to the handling
of argv. sim_open () gets a const char **argv, but ARM's sim_open gets
clever and decides to modify argv in place via sim_target_parse_command_line.
I'm not sure why.

In any case, here's a fix that makes the code modify a copy of argv instead.

sim/arm/ChangeLog:

2020-08-13  Luis Machado  <luis.machado@linaro.org>

	PR sim/26365

	* wrapper.c (sim_target_parse_command_line): Free discarded argv
	entries.
	(sim_open): Use a duplicate of argv instead of the original argv.
2020-08-13 10:32:52 -03:00
Tom de Vries
b3f8962bdb [sim] Fix mbuild build breaker in sim-cpu.c
When running gdb/gdb_mbuild.sh, I run into:
...
src/sim/aarch64/../common/sim-cpu.c: In function 'sim_cpu_free':
src/sim/aarch64/../common/sim-cpu.c:64:3: error: implicit declaration of \
  function 'free' [-Werror=implicit-function-declaration]
   free (cpu);
   ^~~~
src/sim/aarch64/../common/sim-cpu.c:64:3: error: incompatible implicit \
  declaration of built-in function 'free' [-Werror]
src/sim/aarch64/../common/sim-cpu.c:64:3: note: include '<stdlib.h>' or \
  provide a declaration of 'free'
...

Fix this by adding "#include <stdlib.h>".

Tested by gdb/gdb_mbuild.sh -e aarch64-elf.

sim/common/ChangeLog:

2020-08-10  Tom de Vries  <tdevries@suse.de>

	* sim-cpu.c: Include stdlib.h for free.
2020-08-10 17:26:09 +02:00
Jozef Lawrynowicz
4b48e6d46d MSP430: sim: Increase main memory region size
The area between 0xFF00 and 0xFFC0 is unallocated in the simulator
memory map, so extend the main memory region up to 0xFFC0 to allow the
simulator to make use of the extra 192 bytes of space.

sim/msp430/ChangeLog:

	* msp430-sim.c (sim_open): Increase the size of the main memory region
	to 0xFAC0.
2020-08-07 11:01:22 +01:00
Jozef Lawrynowicz
e8a387fb5f MSP430: sim: Fix incorrect simulation of unsigned widening multiply
Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.

Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.

gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8

If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.

sim/msp430/ChangeLog:

	* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
	operands to the unsigned type before multiplying.
	* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
	operands.

sim/testsuite/sim/msp430/ChangeLog:

	* mpyull_hwmult.s: New test.
2020-08-05 15:02:30 +01:00
Jose E. Marchesi
8c4c18181e sim: generated files for the eBPF simulator
This patch adds the CGEN generated files for the eBPF simulator.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* bpf/arch.c: Likewise.
	* bpf/arch.h: Likewise.
	* bpf/cpu.c: Likewise.
	* bpf/cpu.h: Likewise.
	* bpf/cpuall.h: Likewise.
	* bpf/decode-be.c: Likewise.
	* bpf/decode-be.h: Likewise.
	* bpf/decode-le.c: Likewise.
	* bpf/decode-le.h: Likewise.
	* bpf/defs-be.h: Likewise.
	* bpf/defs-le.h: Likewise.
	* bpf/sem-be.c: Likewise.
	* bpf/sem-le.c: Likewise.
2020-08-04 18:11:31 +02:00
Jose E. Marchesi
b26e2ae7d3 sim: eBPF simulator
This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.

gdb/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.tgt: Set gdb_sim for bpf-*-* targets.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* configure.tgt (sim_arch): Add entry for bpf-*-*.
	* configure: Regenerate.
	* MAINTAINERS: Add maintainer for the BPF simulator.
	* bpf/Makefile.in: New file.
	* bpf/bpf-helpers.c: Likewise.
	* bpf/bpf-helpers.def: Likewise.
	* bpf/bpf-helpers.h: Likewise.
	* bpf/bpf-sim.h: Likewise.
	* bpf/bpf.c: Likewise.
	* bpf/config.in: Likewise.
	* bpf/configure.ac: Likewise.
	* bpf/decode.h: Likewise.
	* bpf/eng.h: Likewise.
	* bpf/mloop.in: Likewise.
	* bpf/sim-if.c: Likewise.
	* bpf/sim-main.h: Likewise.
	* bpf/traps.c: Likewise.
	* bpf/configure: Generate.
	* bpf/aclocal.m4: Likewise.

sim/testsuite/ChangeLog:

2020-08-04  David Faust  <david.faust@oracle.com>
	    Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure: Regenerate.
	* sim/bpf/allinsn.exp: New file.
	* sim/bpf/alu.s: Likewise.
	* sim/bpf/alu32.s: Likewise.
	* sim/bpf/endbe.s: Likewise.
	* sim/bpf/endle.s: Likewise.
	* sim/bpf/jmp.s: Likewise.
	* sim/bpf/jmp32.s: Likewise.
	* sim/bpf/ldabs.s: Likewise.
	* sim/bpf/mem.s: Likewise.
	* sim/bpf/mov.s: Likewise.
	* sim/bpf/testutils.inc: Likewise.
	* sim/bpf/xadd.s: Likewise.
2020-08-04 18:09:16 +02:00
Simon Marchi
f693213d12 Run autoreconf -vf throughout
I ran

    for i in $(find . -name configure.ac); do pushd $(dirname $i); autoreconf -vf; popd; done

to re-generate all automake/autoconf files throughout the repo (with
upstream autoconf 2.69 and automake 1.15.1).  These were the changes
that came out.  I am pushing this as obvious.

libdecnumber/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/bfin/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/erc32/ChangeLog:

	* configure: Re-generate.

sim/mips/ChangeLog:

	* configure: Re-generate.

sim/testsuite/ChangeLog:

	* configure: Re-generate.

Change-Id: I97335c09972d25cc5f6fd8da4db4ffe4a0348787
2020-07-29 16:03:55 -04:00
Sebastian Huber
c4df5bbeb8 sim/igen: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in multiple
definition linker errors since a global variable was declared and
defined in a header file:

  ld: libsim.a(idecode.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(engine.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(support.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(semantics.o):sim/v850/idecode.h:71: multiple definition
  of `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first
  defined here

sim/igen

	PR sim/26194

	* lf.h (lf_get_file_type): Declare.
	* lf.c (lf_get_file_type): Define.
	* gen-idecode.c (print_idecode_issue_function_header): Use
	lf_get_file_type() to issue an extern variable declaration in
	case of header files.
2020-07-03 21:03:47 +02:00
Sebastian Huber
ad8464f799 sim/ppc: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in a multiple
definition linker error since global variables were declared and defined
in a header file:

  ld: ld-insn.o:sim/ppc/ld-insn.h:221: multiple definition of
  `max_model_fields_len'; igen.o:sim/ppc/ld-insn.h:221: first defined here

sim/ppc

	* ld-insn.h (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static):
	Delete.
	(max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Declare, but do not
	define.
	* ld-insn.c (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static,
	max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Define.
2020-07-03 18:47:40 +02:00
Kamil Rytarowski
7a20f753ef sim: ppc: netbsd: Sync signal names with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_signal_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Kamil Rytarowski
607c693210 sim: ppc: netbsd: Sync errno codes with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_error_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Carlo Bramini
69b1ffdb01 sim/aarch64: Fix register ordering bug in blr (PR sim/25318)
A comment in the implementation of blr says:

  /* The pseudo code in the spec says we update LR before fetching.
     the value from the rn.  */

With 'rn' being the register holding the destination address.

This may have been true at one point, but the ISA manual now clearly
shows the destination register being read before the link register is
written.

This commit updates the implementation of blr to match.

sim/aarch64/ChangeLog:

	PR sim/25318
	* simulator.c (blr): Read destination register before calling
	aarch64_save_LR.

Change-Id: Icb1c556064e3d9c807ac28440475caa205ab1064
2020-02-06 22:50:26 +00:00