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sim: h8300: fix test mach markers

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These tests all fail to assemble when targeting the h8300 or h8300h
cpu variants with errors like:
rotl.s:242: Warning: Opcode `rotl.b' with these operand types not available in H8/300H mode
rotl.s:242: Error: invalid operands

It's been this way for years and no one seems to care, so disable
them for those targets since the assembler thinks it's impossible.
This commit is contained in:
Mike Frysinger 2021-01-05 00:22:28 -05:00
parent 0c7f5bd08c
commit a2f8e947a8
10 changed files with 15 additions and 9 deletions
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6
sim/testsuite/sim/h8300/ChangeLog
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@ -1,3 +1,9 @@
2021-01-05 Mike Frysinger <vapier@gentoo.org>
* rotl.s (mach): Set to "h8300s h8sx".
* rotr.s, rotxl.s, rotxr.s, shal.s, shar.s, shll.s, shlr.s, tas.s:
Likewise.
2021-01-05 Mike Frysinger <vapier@gentoo.org>
* allinsn.exp: Rewrite file to use globs.

2
sim/testsuite/sim/h8300/rotl.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'rotl'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/rotr.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'rotr'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/rotxl.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'rotxl'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/rotxr.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'rotxr'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/shal.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'shal'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/shar.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'shar'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/shll.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'shll'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/shlr.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'shlr'
# mach(): all
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2

2
sim/testsuite/sim/h8300/tas.s
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@ -1,5 +1,5 @@
# Hitachi H8 testcase 'tas'
# mach(): h8300h h8300s h8sx
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2