A recent BFD change caused a build failure for a Windows->PPC cross:
ld.exe: ../bfd/libbfd.a(coff-rs6000.o):coff-rs6000.c:(.text+0x4571): undefined reference to `getuid'
ld.exe: ../bfd/libbfd.a(coff-rs6000.o):coff-rs6000.c:(.text+0x457e): undefined reference to `getgid'
This patch fixes the problem by moving the replacement definitions of
getuid and getgid to system.h.
bfd/ChangeLog
2020-11-11 Tom Tromey <tromey@adacore.com>
* archive.c (getuid, getgid): Move...
* sysdep.h (getuid, getgid): ...here.
This patch fixes fails adding library dependencies for xcoff, and
improves the error message should stat fail for an archive member.
"tmpdir/artest.a: File not found" is plainly wrong.
Fixes these fails:
powerpc-aix5.1 +FAIL: ar adding library dependencies
powerpc-aix5.2 +FAIL: ar adding library dependencies
rs6000-aix4.3.3 +FAIL: ar adding library dependencies
rs6000-aix5.1 +FAIL: ar adding library dependencies
rs6000-aix5.2 +FAIL: ar adding library dependencies
* archive.c (bfd_ar_hdr_from_filesystem): Use bfd_set_input_error
when stat of archive member fails.
* coff-rs6000.c (xcoff_write_archive_contents_old),
(xcoff_write_archive_contents_big): Likewise, and handle in-memory
bfd.
This patch reverts most of git commit 1e3b96fd6c, so IR symbols are
again not marked def_regular or ref_regular. That should be enough to
stop IR symbols from becoming dynamic. To mark as-needed shared
libraries referenced by IR symbols, use the referencing BFD rather
than the ref flags.
bfd/
PR 15146
PR 26314
PR 26530
PR 26806
* elflink.c (elf_link_add_object_symbols): Don't set def/ref flags
for plugin syms. Do allow plugin syms to mark as-needed libs.
ld/
PR 26806
* testsuite/ld-plugin/lto-19.h,
* testsuite/ld-plugin/lto-19a.c,
* testsuite/ld-plugin/lto-19b.c,
* testsuite/ld-plugin/lto-19c.c: New test.
* testsuite/ld-plugin/pr26806.c,
* testsuite/ld-plugin/pr26806.d: New test.
* testsuite/ld-plugin/lto.exp: Run them.
PR 26809
* elf.c (_bfd_elf_slurp_secondary_reloc_section): Use the correct
sized reloc reading function.
(_bfd_elf_write_secondary_reloc_section): Use the correct sized
reloc writing function.
* elf64-hppa.c (elf_hppa_final_link_relocate): Check that the
symbol's section is being output before adding its offset to the
addend when processing R_PARISC_SECREL32.
bfd * po/es.po: Fix printf format
binutils * windmc.c: Fix printf format
gas * config/tc-arc.c: Fix printf format
opcodes * po/es.po: Fix printf format
sim * arm/armos.c: Fix printf format
* ppc/emul_netbsd.c: Fix printf format
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
For the ifunc symbol, which is referenced by GOT rather than PLT relocs,
we should add the dynamic reloc (usually IRELATIVE) into the .rel.iplt
when generating the static executable. But if we use riscv_elf_append_rela
to add the dynamic relocs into .rela.iplt, this may cause the overwrite
problem.
The reason is that we don't handle the `reloc_index` of .rela.iplt, but
the riscv_elf_append_rela adds the relocs to the place that are calculated
from the reloc_index (in seqential). Therefore, we may overwrite the
dynamic relocs when the `reloc_index` of .rela.iplt isn't handled correctly.
One solution is that we can add these dynamic relocs (GOT ifunc) from
the last of .rela.iplt section. But I'm not sure if it is the best way.
bfd/
* elfnn-riscv.c (riscv_elf_link_hash_table): Add last_iplt_index.
(riscv_elf_size_dynamic_sections): Initialize the last_iplt_index.
(riscv_elf_relocate_section): Use riscv_elf_append_rela.
(riscv_elf_finish_dynamic_symbol): If the use_elf_append_rela is
false, then we should add the dynamic relocs from the last of
the .rela.iplt, and don't use the riscv_elf_append_rela to add.
ld/
* testsuite/ld-riscv-elf/ifunc-plt-got-overwrite.s: New testcase.
* testsuite/ld-riscv-elf/ifunc-plt-got-overwrite.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-got-overwrite-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
Generally, glibc dynamic linker should have two ways to deal with ifunc
- one is to handle the IRELATIVE relocations for the non-preemtive ifunc
symbols, the other is to handle the R_RISCV_32/64 and R_RISCV_JUMP_SLOT
relocations with the STT_IFUNC preemtive symbols. No matter which method
is used, both of them should get the resolved ifunc symbols at runtime.
Therefore, linker needs to generate the correct dynamic relocations for
ifunc to make sure the the dynamic linker works well. For now, there are
thirteen relocations are supported for ifunc in GNU ld,
* R_RISCV_CALL and R_RISCV_CALL_PLT:
The RISC-V compiler won't generate R_RISCV_JAL directly to jump to an
ifunc. Besides, we disable the relaxations for the relocation referenced
to ifunc, so just handling the R_RISCV_CALL and R_RISCV_CALL_PLT should be
enough. Linker should generate a .plt entry and a .got.plt entry for it,
and also needs to insert a dynamic IRELATIVE in the .got.plt enrty, or
insert a R_RISCV_JUMP_SLOT when generating shared library.
* R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I/S:
LA/LLA pattern with local fPIC ifunc symbol, or any non-PIC ifunc symbol.
The PC-relative relocation. The current linker will deal with them in
the same way as R_RISCV_CALL_PLT.
* R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO12_I/S:
LA pattern with global PIC ifunc symbol. Linker should insert a dynamic
IRELATIVE in the .got entry, or insert a R_RISCV_32/64 when generating
shared library.
* R_RISCV_32 and R_RISCV_64:
Store the ifunc symbol into the data section. Linker should insert a
dynamic IRELATIVE in the data section, or insert a R_RISCV_32/64 when
generating shared library.
* R_RISCV_HI20 and R_RISCV_LO12_I/S:
The LUI + ADDI/LW/SW patterns. The absolute access relocation. The
medlow model without the -fPIC compiler option should generate them.
The ld ifunc testsuites "Build pr23169a" and "Build pr23169d" need the
relocations, they are in the ld/testsuite/ld-ifunc/, and need compiler
support.
However, we also made some optimizations with reference to x86,
* If GOT and PLT relocations refer to the same ifunc symbol when generating
pie, then they can actually share a .got entry without creating two entries
to store the same value and relocation.
* If GOT, PLT and DATA relocations refer to the same ifunc symbol when
generating position dependency executable, then linker will fill the address
of .plt entry into the corresponding .got entry and data section, without
insert any dynamic relocations for the GOT and DATA relocations.
For the ifunc testcases, there are three types of them,
1. ifunc-reloc-*: Only check the single type of relocation refers to
ifunc symbol.
* ifunc-reloc-call: R_RISCV_CALL and R_RISCV_CALL_PLT.
* ifunc-reloc-data: R_RISCV_32 and R_RISCV_64.
* ifunc-reloc-got: R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO_I/S.
* ifunc-reloc-pcrel: R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO_I/S.
2. ifunc-[nonplt|plt]-*: If we don't have PLT relocs, then don't need to
create the PLT and it's .plt entries.
* ifunc-nonplt: Combine R_RISCV_GOT_HI20 and R_RISCV_32/64.
* ifunc-plt: Combine all ifunc relocations.
3. ifunc-seperate-*: If we link the ifunc caller and resolver into the
same module (link the objects), then the results are the same as the
ifunc-reloc-* and ifunc-[noplt|plt]-* testcases. Consider the cases that
the ifunc callers and resolver are in the different modules, that is, we
compile the ifunc resolver to the shared library first, and then link it
with the ifunc callers. The output of ifunc callers should be the same as
the normal STT_FUNC cases, and the shared ifunc resolver should define the
symbols as STT_IFUNC.
The R_RISCV_PCREL_HI20 reloc is special. It should be linked and resolved
locally, so if the ifunc resolver is defined in other modules (other shared
libraries), then the R_RISCV_PCREL_HI20 is unresolvable, and linker should
issue an unresolvable reloc error.
bfd/
* elfnn-riscv.c: Include "objalloc.h" since we need objalloc_alloc.
(riscv_elf_link_hash_table): Add loc_hash_table and loc_hash_memory
for local STT_GNU_IFUNC symbols.
(riscv_elf_got_plt_val): Removed.
(riscv_elf_local_htab_hash, riscv_elf_local_htab_eq): New functions.
Use to compare local hash entries.
(riscv_elf_get_local_sym_hash): New function. Find a hash entry for
local symbol, and create a new one if needed.
(riscv_elf_link_hash_table_free): New function. Destroy an riscv
elf linker hash table.
(riscv_elf_link_hash_table_create): Create hash table for local ifunc.
(riscv_elf_check_relocs): Create a fake global symbol to track the
local ifunc symbol. Add support to check and handle the relocations
reference to ifunc symbols.
(allocate_dynrelocs): Let allocate_ifunc_dynrelocs and
allocate_local_ifunc_dynrelocs to handle the ifunc symbols if they
are defined and referenced in a non-shared object.
(allocate_ifunc_dynrelocs): New function. Allocate space in .plt,
.got and associated reloc sections for ifunc dynamic relocs.
(allocate_local_ifunc_dynrelocs): Likewise, but for local ifunc
dynamic relocs.
(riscv_elf_relocate_section): Add support to handle the relocation
referenced to ifunc symbols.
(riscv_elf_size_dynamic_sections): Updated.
(riscv_elf_adjust_dynamic_symbol): Updated.
(riscv_elf_finish_dynamic_symbol): Finish up the ifunc handling,
including fill the PLT and GOT entries for ifunc symbols.
(riscv_elf_finish_local_dynamic_symbol): New function. Called by
riscv_elf_finish_dynamic_symbol to handle the local ifunc symbols.
(_bfd_riscv_relax_section): Don't do the relaxation for ifunc.
* elfxx-riscv.c: Add R_RISCV_IRELATIVE.
* configure.ac: Link elf-ifunc.lo to use the generic ifunc support.
* configure: Regenerated.
include/
* elf/riscv.h: Add R_RISCV_IRELATIVE to 58.
ld/
* emulparams/elf32lriscv-defs.sh: Add IREL_IN_PLT.
* testsuite/ld-ifunc/ifunc.exp: Enable ifunc tests for RISC-V.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp (run_dump_test_ifunc):
New dump test for ifunc. There are two arguments, 'target` and
`output`. The `target` is rv32 or rv64, and the `output` is used
to choose which output you want to test (exe, pie or .so).
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.s: New testcase.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-resolver.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-exe.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pie.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d: Likewise.
Casts should be avoided if at all possible, and in particular the C
standard doesn't promise that function pointers can be cast to void*
or vice-versa. It is only mentioned under J.5 Common extensions,
saying "The following extensions are widely used in many systems, but
are not portable to all implementations."
* elf32-arc.c (replace_func): Correct return type.
(get_replace_function): Use a replace_func function pointer rather
than void*. Update associated ARC_RELOC_HOWTO define.
Prompted by two occurrences of -Wmisleading-indentation warnings.
* elf32-cr16.c: Formatting.
(cr16_elf_final_link_relocate): Sign extend rather than clumsy
"add or subtract" of offset value. Simplify range checks. Move
common code out of "if" branches. Don't refetch insn fields
needlessly.
The previous sanity check allowed a ld on the HA reloc and addis
on the LO_DS.
* elf64-ppc.c (ppc64_elf_relocate_section): Tighten sanity check
on R_PPC64_GOT_LO_DS and R_PPC64_GOT_HA instructions.
Calling non-pcrel functions from pcrel code requires a stub to set up
r2. Gold created the stub, but an "optimisation" made the stub jump
to the function local entry, ie. r2 was not initialised.
This patch fixes that long branch stub problem, and another that might
occur for plt call stubs to local functions.
bfd/
* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't do local
entry offset optimisation.
gold/
* powerpc.cc (Powerpc_relobj::do_relocate_sections): Don't do
local entry offset optimisation for lplt_section.
(Target_powerpc::Branch_info::make_stub): Don't add local
entry offset to long branch dest passed to
add_long_branch_entry. Do pass st_other bits.
(Stub_table::Branch_stub_ent): Add "other_" field.
(Stub_table::add_long_branch_entry): Add "other" param, and
save.
(Stub_table::branch_stub_size): Adjust long branch offset.
(Stub_table::do_write): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
PR 26253
gas * config/obj-elf.c (obj_elf_section): Accept a numeric value for
the "o" section flag. Interpret it as a section index. Allow an
index of zero.
* doc/as.texi: Document the new behaviour.
* NEWS: Mention the new feature. Tidy entries.
* testsuite/gas/elf/sh-link-zero.s: New test.
* testsuite/gas/elf/sh-link-zero.d: New test driver.
* testsuite/gas/elf/elf.exp: Run the new test.
* testsuite/gas/elf/section21.l: Updated expected assembler
output.
bfd * elf.c (_bfd_elf_setup_sections): Do not complain about an
sh_link value of zero when the SLF_LINK_ORDER flag is set.
(assign_section_numbers): Likewise.
PR 26681
bfd * elflink.c (bfd_elf_gc_sections): Do not arbitrarily keep note
sections which are linked to another section.
ld * testsuite/ld-elf/pr26681.s: New test.
* testsuite/ld-elf/pr26681.d: New test driver.
* testsuite/ld-elf/pr26681.l: New test output.
Some missing NULL checks meant a stub for a local symbol used a stub
looking like the __tls_get_addr_opt stub.
PR 26656
* elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
NULL stub_entry->h before calling is_tls_get_addr.
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
This adds missing support for a power10 version of the __tls_get_addr
call stub implementing DT_PPC64_OPT PPC64_OPT_TLS. Without this,
power10 code using __tls_get_addr fails miserably at runtime unless
the --no-tls-get-addr-optimize option is given.
PR 26656
* elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
size_power10_offset rather than calculating from start of stub.
Add size for notoc tls_get_addr_opt stub.
(plt_stub_pad): Add "odd" param, pass to plt_stub_size.
(build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
(build_tls_get_addr_stub): Delete.
(ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
Emit notoc tls_get_addr_opt stub. Move eh_frame code to
suit. Adjust code to use bfd_tls_get_addr_head/tail in place
of build_tls_get_addr_stub.
(ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
when padding stub. Size eh_frame for notoc stub too.
Correct lr_restore value.
(ppc64_elf_relocate_section): Don't skip over first insn of
notoc tls_get_addr_opt stub.
Some of the powerpc64 code editing functions are better run after
dynamic symbols have stabilised in order to make proper decisions
based on SYMBOL_REFERENCES_LOCAL. The dynamic symbols are processed
early in bfd_elf_size_dynamic_sections, before the backend
always_size_sections function is called.
One function, ppc64_elf_tls_setup must run before
bfd_elf_size_dynamic_sections because it changes dynamic symbols.
ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I
think. ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run
later.
So this patch arranges to call some edit functions later via
always_size_sections.
PR 26655
bfd/
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
(ppc64_elf_edit): Call params->edit.
(ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup. Return a
bfd_boolean.
* elf64-ppc.h (struct ppc64_elf_params): Add "edit".
(ppc64_elf_tls_setup): Update declaration.
ld/
* emultempl/ppc64elf.em (params): Add ppc_edit.
(ppc_before_allocation): Split off some edit functions to..
(ppc_edit): ..this, new function.
This patch corrects "size" and "bitsize" in R_RISCV_RVC_* reloc howtos
so that elfnn-riscv.c:perform_relocation doesn't access past the end
of a section. I've also corrected "size" in the R_RISCV_CALL* reloc
howtos since these relocs apply to two consecutive instructions. That
caused fallout in the assembler with complaints about "fixup not
contained within frag" due to tc-riscv.c:append_insn finishing off a
frag after the auipc insn making up a "call" macro. Which is a little
rude since the CALL reloc also relocates the following jalr. Fixed by
changing the frag handling a little.
I've also changed R_RISCV_ALIGN and R_RISCV_TPREL_ADD marker reloc
howtos to look like R_RISCV_NONE, and corrected dst_mask for numerous
relocs, not that it matters very much.
bfd/
PR 26569
* elfxx-riscv.c (howto_table): Correct size and bitsize of
R_RISCV_RVC_BRANCH, R_RISCV_RVC_JUMP, and R_RISCV_RVC_LUI.
Correct size for R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPREL32,
R_RISCV_CALL, and R_RISCV_CALL_PLT. Make R_RISCV_TPREL_ADD and
R_RISCV_ALIGN like R_RISCV_NONE. Correct dst_mask many relocs.
gas/
* config/tc-riscv.c (append_insn): Don't tie off frags at CALL
relocs.
(riscv_call): Tie them off after the jalr.
(md_apply_fix): Zero fx_size of RELAX fixup.
Not sure why there wasn't a NULL check in the ld/22269 patch
(e01c16a8) at the time, as there was one for the corresponding patch
to elf32-m68k.c (5056ba1d).
Incidentally, I had missed that in 2017, as a prerequisite for the
ld/22269 series, the check_relocs function finally were made "safe"!
(I.e. the number of references and symbol types are final, garbage
collection done, so port-specific accounting can be made sanely.)
Committed.
bfd:
PR ld/26589
* elf32-cris.c (cris_elf_check_relocs): Add missing NULL check
on argument before calling UNDEFWEAK_NO_DYNAMIC_RELOC.
ld:
PR ld/26589
* testsuite/ld-elf/pr26589.d, testsuite/ld-elf/locref3.s: New test.
The symbol string table in the .symtab section is optional and cosmetic.
The contents of the .symtab section have no impact on run-time execution.
The symbol names in the symbol string table help distinguish addresses at
different locations. Add a linker option, -z unique-symbol, to avoid
duplicated local symbol names in the symbol string table.
This feature was well received by the livepatch maintainers. It not only
solves the duplicated local symbol name problem, but also would allow
livepatch to more precisely locate duplicate symbols in general for
patching.
bfd/
PR ld/26391
* elflink.c (elf_final_link_info): Add local_hash_table.
(local_hash_entry): New.
(local_hash_newfunc): Likewise.
(elf_link_output_symstrtab): Append ".COUNT" to duplicated local
symbols.
(bfd_elf_final_link): Initialize and free local_hash_table for
"-z unique-symbol".
include/
PR ld/26391
* bfdlink.h (bfd_link_info): Add unique_symbol.
ld/
PR ld/26391
* NEWS: Mention "-z unique-symbol".
* emultempl/elf.em (gld${EMULATION_NAME}_handle_option): Handle
"-z unique-symbol" and "-z nounique-symbol".
* ld.texi: Document "-z unique-symbol" and "-z nounique-symbol".
* lexsup.c (elf_static_list_options): Add "-z unique-symbol" and
"-z nounique-symbol".
* testsuite/ld-elf/elf.exp: Add PR ld/26391 tests.
* testsuite/ld-elf/pr26391.nd: New file.
* testsuite/ld-elf/pr26391.out: Likewise.
* testsuite/ld-elf/pr26391a.c: Likewise.
* testsuite/ld-elf/pr26391b.c: Likewise.
* testsuite/ld-elf/pr26391c.c: Likewise.
* testsuite/ld-elf/pr26391d.c: Likewise.
The fix in 7e05773767 introduced a PLT
for conditional jumps when the target symbol is undefined. This is
incorrect because conditional branch relocations are not allowed to
clobber IP0/IP1 and hence, should not result in a dynamic relocation.
Revert that change and in its place, issue an error when the target
symbol is undefined.
bfd/
2020-09-10 Siddhesh Poyarekar <siddesh.poyarekar@arm.com>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Revert
changes in 7e05773767. Set
error for undefined symbol in BFD_RELOC_AARCH64_BRANCH19 and
BFD_RELOC_AARCH64_TSTBR14 relocations.
ld/
2020-09-10 Siddhesh Poyarekar <siddesh.poyarekar@arm.com>
* testsuite/ld-aarch64/emit-relocs-560.d: Expect error instead
of valid output.
Link-time relaxations of branches are common for MSP430, given that GCC
can generate pessimal branch instructions, and the
-mcode-region=either/-mdata-region=either options to shuffle sections
can further change the type of branch instruction required.
These relaxations can result in invalid code when .uleb128
directives, used in the .gcc_except_table section, are used to calculate
the distance between two labels. A value for the .uleb128 directive is
calculated at assembly-time, and can't be updated at link-time, even if
relaxation causes the distance between the labels to change.
This patch adds relocations for subtract expressions in .uleb128
directives, to allow the linker to re-calculate the value of these
expressions after relaxation has been performed.
bfd/ChangeLog:
* bfd-in2.h (bfd_reloc_code_real): Add
BFD_RELOC_MSP430_{SET,SUB}_ULEB128.
* elf32-msp430.c (msp430_elf_ignore_reloc): New.
(elf_msp430_howto_table): Add R_MSP430{,X}_GNU_{SET,SUB}_ULEB128.
(msp430_reloc_map): Add R_MSP430_GNU_{SET,SUB}_ULEB128.
(msp430x_reloc_map): Add R_MSP430X_GNU_{SET,SUB}_ULEB128.
(write_uleb128): New.
(msp430_final_link_relocate): Handle R_MSP430{,X}_GNU_{SET,SUB}_ULEB128.
* libbfd.c (_bfd_write_unsigned_leb128): New.
* libbfd.h (_bfd_write_unsigned_leb128): New prototype.
Add BFD_RELOC_MSP430_{SET,SUB}_ULEB128.
* reloc.c: Document BFD_RELOC_MSP430_{SET,SUB}_ULEB128.
binutils/ChangeLog:
* readelf.c (target_specific_reloc_handling): Handle
R_MSP430{,X}_GNU_{SET,SUB}_ULEB128.
gas/ChangeLog:
* config/tc-msp430.c (msp430_insert_uleb128_fixes): New.
(msp430_md_end): Call msp430_insert_uleb128_fixes.
include/ChangeLog:
* elf/msp430.h (elf_msp430_reloc_type): Add
R_MSP430_GNU_{SET,SUB}_ULEB128.
(elf_msp430x_reloc_type): Add R_MSP430X_GNU_{SET,SUB}_ULEB128.
ld/ChangeLog:
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new tests.
* testsuite/ld-msp430-elf/uleb128.s: New test.
* testsuite/ld-msp430-elf/uleb128_430.d: New test.
* testsuite/ld-msp430-elf/uleb128_430x.d: New test.
This patch adds the basic infrastructure needed to support Armv8-R in
AArch64 binutils: new command-line flags, new feature bits, a new BFD
architecture, and support for differentiating between architecture
variants in the disassembler.
The new command-line options added by this patch are -march=armv8-r in
GAS and -m aarch64:armv8-r in objdump.
The disassembler support is necessary since Armv8-R AArch64 introduces a
system register (VSCTLR_EL2) which shares an encoding with a different
system register (TTBR0_EL2) in Armv8-A. This also allows us to use the
correct preferred disassembly for the new DFB alias introduced in
Armv8-R.
bfd/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* archures.c (bfd_mach_aarch64_8R): New.
* bfd-in2.h: Regenerate.
* cpu-aarch64.c (bfd_aarch64_arch_v8_r): New.
(bfd_aarch64_arch_ilp32): Update tail pointer.
gas/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* config/tc-aarch64.c (aarch64_archs): Add armv8-r.
* doc/c-aarch64.texi: Document -march=armv8-r.
include/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_A): New.
(AARCH64_FEATURE_V8_R): New.
(AARCH64_ARCH_V8): Include new A-profile feature bit.
(AARCH64_ARCH_V8_R): New.
opcodes/ChangeLog:
2020-09-08 Alex Coplan <alex.coplan@arm.com>
* aarch64-dis.c (arch_variant): New.
(determine_disassembling_preference): Disassemble according to
arch variant.
(select_aarch64_variant): New.
(print_insn_aarch64): Set feature set.
Two pieces to this puzzle:
1) Revert HJ's fix for PR13250 so that size and alignment isn't
sticky, instead attack the real underlying problem that
_bfd_generic_link_add_one_symbol does the wrong thing in making a
common section in a shared library bfd.
2) Save and restore common u.c.p fields, which hold the section and
alignment.
A better fix for (2) would be to throw away all of that horrible code
saving and restoring the hash table when loading as-needed library
symbols, and instead do a scan over as-needed library symbols before
adding anything.
bfd/
PR 13250
PR 26580
* elflink.c (_bfd_elf_merge_symbol): Make "override" a bfd**.
Return oldbfd in override when old common should override new
common.
(_bfd_elf_add_default_symbol): Adjust to suit.
(elf_link_add_object_symbols): Likewise. Pass "override" to
_bfd_generic_link_add_one_symbol. Save and restore common u.c.p
field for --as-needed shared libraries. Revert pr13250 changes.
ld/
* testsuite/ld-elf/pr26580-a.s,
* testsuite/ld-elf/pr26580-b.s,
* testsuite/ld-elf/pr26580-1.sd,
* testsuite/ld-elf/pr26580-2.sd: New tests
* testsuite/ld-elf/comm-data.exp: Run new tests.
* testsuite/ld-elf/pr26580-a.c,
* testsuite/ld-elf/pr26580-b.c,
* testsuite/ld-elf/pr26580-3.out,
* testsuite/ld-elf/pr26580-4.out: New tests.
* testsuite/ld-elf/shared.exp: Run new tests.
We must tell LTO about symbols in all shared libraries loaded. That
means we can't load extra shared libraries after LTO recompilation, at
least, not those that affect the set of symbols that LTO cares about,
the IR symbols.
This change will likely result in complaints about --as-needed
libraries being loaded unnecessarily, but being correct is more
important than being optimal. One of the PR15146 tests regresses, and
while that could be hidden by disabling the missing dso message by
making it conditional on h->root.non_ir_ref_regular, that would just
be sweeping a problem under the rug.
bfd/
PR 15146
PR 26314
PR 26530
* elflink.c (elf_link_add_object_symbols): Do set def_regular
and ref_regular for IR symbols. Don't clear dynsym, allowing
IR symbols to load --as-needed shared libraries, but prevent
IR symbols from becoming dynamic.
ld/
* testsuite/ld-plugin/lto.exp: Don't run pr15146 tests.
* testsuite/ld-plugin/pr15146.d: Delete.
* testsuite/ld-plugin/pr15146a.c: Delete.
* testsuite/ld-plugin/pr15146b.c: Delete.
* testsuite/ld-plugin/pr15146c.c: Delete.
* testsuite/ld-plugin/pr15146d.c: Delete.
Same as the privileged spec attributes check - different ISA versions
should be compatible, unless there are some known conflicts. Therefore,
we should allow to link objects with different ISA versions, and update
the output ISA versions once the corresponding input ones are newer.
But it's better to also warn people that the conflicts may happen when
the ISA versions are mis-matched.
bfd/
* elfnn-riscv.c (riscv_version_mismatch): Change the return type
from void to bfd_boolean. Report warnings rather than errors
when the ISA versions are mis-matched. Afterwards, remember to
update the output ISA versions to the newest ones.
(riscv_merge_std_ext): Allow to link objects with different
standard ISA versions. Try to add output ISA versions to
merged_subsets first.
(riscv_merge_multi_letter_ext): Likewise. But for standard additional
ISA and non-standard ISA versions.
ld/
* testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d: Update the
message from error to warning.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d: New testcases.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
