x86: fix AMD Zen3 insns
For INVLPGB the operand count was wrong (besides %edx there's also %ecx which is an input to the insn). In this case I see little sense in retaining the bogus 2-operand template. Plus swapping of the operands wasn't properly suppressed for Intel syntax. For PVALIDATE, RMPADJUST, and RMPUPDATE bogus single operand templates were specified. These get retained, as the address operand is the only one really needed to expressed non-default address size, but only for compatibility reasons. Proper multi-operand insn get introduced and the testcases get adjusted / extended accordingly. While at it also drop the redundant definition of __amd64__ - we already have x86_64 defined (or not) to distinguish 64-bit and non-64-bit cases.
This commit is contained in:
Jan Beulich
parent
829f3fe1f0
commit
c0e54661f7
@ -1,3 +1,16 @@
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2021-03-25 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (md_assemble): Widen set of insns to avoid
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swapping operands for.
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* testsuite/gas/i386/invlpgb.s: Fix, re-arrange, and add Intel
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syntax tests.
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* testsuite/gas/i386/snp.s: Re-arrange and add multi-operand as
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well as Intel syntax tests.
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* testsuite/gas/i386/invlpgb.d, testsuite/gas/i386/snp.d: Adjust
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expectations.
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* testsuite/gas/i386/invlpgb64.d, testsuite/gas/i386/snp64.d:
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Likewise. Drop passing --def-sym to as.
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2021-03-25 Jan Beulich <jbeulich@suse.com>
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PR/gas 27419
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@ -4679,16 +4679,18 @@ md_assemble (char *line)
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operands at hand. */
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/* All Intel opcodes have reversed operands except for "bound", "enter",
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"monitor*", "mwait*", "tpause", and "umwait". We also don't reverse
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intersegment "jmp" and "call" instructions with 2 immediate operands so
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that the immediate segment precedes the offset, as it does when in AT&T
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mode. */
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"invlpg*", "monitor*", "mwait*", "tpause", "umwait", "pvalidate",
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"rmpadjust", and "rmpupdate". We also don't reverse intersegment "jmp"
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and "call" instructions with 2 immediate operands so that the immediate
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segment precedes the offset consistently in Intel and AT&T modes. */
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if (intel_syntax
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&& i.operands > 1
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&& (strcmp (mnemonic, "bound") != 0)
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&& (strcmp (mnemonic, "invlpga") != 0)
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&& (strncmp (mnemonic, "invlpg", 6) != 0)
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&& (strncmp (mnemonic, "monitor", 7) != 0)
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&& (strncmp (mnemonic, "mwait", 5) != 0)
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&& (strcmp (mnemonic, "pvalidate") != 0)
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&& (strncmp (mnemonic, "rmp", 3) != 0)
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&& (strcmp (mnemonic, "tpause") != 0)
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&& (strcmp (mnemonic, "umwait") != 0)
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&& !(operand_type_check (i.types[0], imm)
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@ -11,4 +11,8 @@ Disassembly of section \.text:
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[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
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[0-9a-f]+ <att16>:
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[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb[ ]*
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[0-9a-f]+ <intel32>:
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[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
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[0-9a-f]+ <intel16>:
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[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr16 invlpgb[ ]*
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#pass
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@ -3,13 +3,25 @@
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.text
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_start:
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invlpgb
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.ifdef __amd64__
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.ifdef x86_64
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att64:
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invlpgb %rax, %edx
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invlpgb %rax, %ecx, %edx
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.endif
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att32:
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invlpgb %eax, %edx
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.ifndef __amd64__
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invlpgb %eax, %ecx, %edx
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.ifndef x86_64
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att16:
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invlpgb %ax, %edx
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invlpgb %ax, %ecx, %edx
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.endif
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.intel_syntax noprefix
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.ifdef x86_64
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intel64:
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invlpgb rax, ecx, edx
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.endif
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intel32:
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invlpgb eax, ecx, edx
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.ifndef x86_64
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intel16:
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invlpgb ax, ecx, edx
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.endif
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@ -1,4 +1,3 @@
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#as: --defsym __amd64__=1
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#objdump: -dw
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#name: 64-bit INVLPGB insn
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#source: invlpgb.s
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@ -13,4 +12,8 @@ Disassembly of section \.text:
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[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
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[0-9a-f]+ <att32>:
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[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb[ ]*
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[0-9a-f]+ <intel64>:
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[ ]*[a-f0-9]+:[ ]+0f 01 fe[ ]+invlpgb[ ]*
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[0-9a-f]+ <intel32>:
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[ ]*[a-f0-9]+:[ ]+67 0f 01 fe[ ]+addr32 invlpgb[ ]*
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#pass
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@ -6,7 +6,12 @@
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Disassembly of section \.text:
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00000000 <att32>:
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0+ <att>:
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate[ ]*
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[0-9a-f]+ <intel>:
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr16 pvalidate[ ]*
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@ -1,23 +1,39 @@
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# Check SNP instructions
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.text
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.ifdef __amd64__
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att64:
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psmash %rax
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psmash
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psmash %eax
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pvalidate %rax
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pvalidate %eax
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rmpupdate %rax
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rmpupdate
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rmpupdate %eax
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rmpadjust %rax
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rmpadjust
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rmpadjust %eax
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.endif
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.ifndef __amd64__
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att32:
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att:
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pvalidate
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pvalidate %eax
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pvalidate %ax
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pvalidate %eax, %ecx, %edx
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.ifdef x86_64
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pvalidate %rax, %ecx, %edx
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psmash
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psmash %rax
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psmash %eax
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rmpupdate
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rmpupdate %rax, %rcx
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rmpupdate %eax, %rcx
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rmpadjust
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rmpadjust %rax, %rcx, %rdx
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rmpadjust %eax, %rcx, %rdx
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.else
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pvalidate %ax, %ecx, %edx
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.endif
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.intel_syntax noprefix
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intel:
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pvalidate
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pvalidate eax, ecx, edx
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.ifdef x86_64
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pvalidate rax, ecx, edx
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psmash
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psmash rax
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psmash eax
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rmpupdate
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rmpupdate rax, rcx
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rmpupdate eax, rcx
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rmpadjust
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rmpadjust rax, rcx, rdx
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rmpadjust eax, rcx, rdx
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.else
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pvalidate ax, ecx, edx
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.endif
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@ -1,4 +1,3 @@
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#as: --defsym __amd64__=1
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#objdump: -dw
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#name: 64-bit SNP insn
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#source: snp.s
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@ -8,12 +7,27 @@
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Disassembly of section \.text:
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0+000 <att64>:
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0+ <att>:
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 fe[ ]+rmpadjust[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fe[ ]+addr32 rmpadjust[ ]*
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[0-9a-f]+ <intel>:
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 ff[ ]+addr32 pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 ff[ ]+pvalidate[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+f3 0f 01 ff[ ]+psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 ff[ ]+addr32 psmash[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
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[ ]*[a-f0-9]+:[ ]+f2 0f 01 fe[ ]+rmpupdate[ ]*
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[ ]*[a-f0-9]+:[ ]+67 f2 0f 01 fe[ ]+addr32 rmpupdate[ ]*
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@ -1,3 +1,10 @@
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2021-03-25 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (invlpgb): Fix multi-operand form.
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(pvalidate, rmpupdate, rmpadjust): Add multi-operand forms. Mark
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single-operand forms as deprecated.
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* i386-tbl.h: Re-generate.
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2021-03-25 Alan Modra <amodra@gmail.com>
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PR 27647
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@ -3979,7 +3979,7 @@ vpclmulhqhqdq, 0x6644, 0x11, CpuVPCLMULQDQ|CpuAVX512F, Modrm|Space0F3A|VexWIG|Ve
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// INVLPGB instructions
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invlpgb, 0xf01fe, None, CpuINVLPGB, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
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invlpgb, 0xf01fe, None, CpuINVLPGB, AddrPrefixOpReg, { Acc|Word|Dword|Qword, RegD|Dword }
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invlpgb, 0xf01fe, None, CpuINVLPGB, AddrPrefixOpReg, { Acc|Word|Dword|Qword, RegC|Dword, RegD|Dword }
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// INVLPGB instructions end
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@ -4126,10 +4126,14 @@ mcommit, 0x0f01fa, None, CpuMCOMMIT, Prefix_0XF3|No_bSuf|No_wSuf|No_lSuf|No_sSuf
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psmash, 0xf01ff, None, CpuSNP|Cpu64, Prefix_0XF3|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
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psmash, 0xf01ff, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF3, { Acc|Dword|Qword }
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pvalidate, 0xf01ff, None, CpuSNP, Prefix_0XF2|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
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pvalidate, 0xf01ff, None, CpuSNP, AddrPrefixOpReg|Prefix_0XF2, { Acc|Word|Dword|Qword }
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pvalidate, 0xf01ff, None, CpuSNP, AddrPrefixOpReg|Prefix_0XF2, { Acc|Word|Dword|Qword, RegC|Dword, RegD|Dword }
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rmpupdate, 0xf01fe, None, CpuSNP|Cpu64, Prefix_0XF2|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
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rmpupdate, 0xf01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF2, { Acc|Dword|Qword }
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rmpupdate, 0xf01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF2, { Acc|Dword|Qword, RegC|Qword }
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rmpadjust, 0xf01fe, None, CpuSNP|Cpu64, Prefix_0XF3|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
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rmpadjust, 0xf01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF3, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
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// The single-operand forms exist only for compatibility with older gas.
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pvalidate, 0xf01ff, None, CpuSNP, AddrPrefixOpReg|Prefix_0XF2, { Acc|Word|Dword|Qword }
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rmpupdate, 0xf01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF2, { Acc|Dword|Qword }
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rmpadjust, 0xf01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg|Prefix_0XF3, { Acc|Dword|Qword }
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// SNP instructions end
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@ -62769,7 +62769,7 @@ const insn_template i386_optab[] =
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1, 0, 0, 0, 0, 0 } },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } } } },
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{ "invlpgb", 0x0f01fe, None, 2,
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{ "invlpgb", 0x0f01fe, None, 3,
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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@ -62782,6 +62782,8 @@ const insn_template i386_optab[] =
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1, 0, 0, 0, 0, 0 } },
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{ { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
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0, 0, 0, 0, 0, 0, 0 } },
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{ { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } },
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{ { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } } } },
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{ "tlbsync", 0x0f01ff, None, 0,
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@ -63548,6 +63550,23 @@ const insn_template i386_optab[] =
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0, 0, 1, 0, 0, 0 } },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } } } },
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{ "pvalidate", 0x0f01ff, None, 3,
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 1, 0, 0, 0 } },
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{ { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1,
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0, 0, 0, 0, 0, 0, 0 } },
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{ { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } },
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{ { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } } } },
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{ "pvalidate", 0x0f01ff, None, 1,
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0,
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@ -63574,6 +63593,21 @@ const insn_template i386_optab[] =
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0, 0, 1, 1, 0, 0 } },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0 } } } },
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{ "rmpupdate", 0x0f01fe, None, 2,
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 1, 1, 0, 0 } },
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{ { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
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0, 0, 0, 0, 0, 0, 0 } },
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{ { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 0, 0, 0, 0, 0, 0 } } } },
|
||||
{ "rmpupdate", 0x0f01fe, None, 1,
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0,
|
||||
@ -63600,6 +63634,23 @@ const insn_template i386_optab[] =
|
||||
0, 0, 1, 1, 0, 0 } },
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0 } } } },
|
||||
{ "rmpadjust", 0x0f01fe, None, 3,
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 1, 1, 0, 0 } },
|
||||
{ { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1,
|
||||
0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
|
||||
0, 0, 0, 0, 0, 0, 0 } } } },
|
||||
{ "rmpadjust", 0x0f01fe, None, 1,
|
||||
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0,
|
||||
|
||||
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Reference in New Issue
Block a user