Go to file
2021-04-12 21:14:13 -07:00
examples STx instructions mostly done 2021-04-11 21:35:51 -07:00
js Added most PLx instructions 2021-04-12 21:14:13 -07:00
.gitignore First Commit 2021-04-03 19:06:56 -07:00
index.html Refacotred isa file formats, added more instructions 2021-04-10 15:33:40 -07:00
isa.html LDx mostly done except offsets 2021-04-11 13:56:13 -07:00
README.md More instructions, more docs, more yay 2021-04-10 01:08:33 -07:00

MatCat 8SA1 CPU Simulator

This is a simple JS based simulator to simulate the function of the 8SA1 CPU.

Work In Progress

ISA Layout

LDx 0x0000:0x00FF / STx 0x0100:0x01FF

bits mode
0b000XXXXX Immediate (8/16)
0b001XXXXX Absolute + (Immediate (16) Offset)
0b010XXXXX Absolute (16)
0b011XXXXX Absolute (24)
0b100XXXXX Indirect (16)
0b101XXXXX Indirect (24)
0b110XXXXX Indirect + (Immediate (16) Offset)
0b111XXXXX Absolute + (Absolute (16) Offset)
Registers bits
AL 0b00010 0x02
AH 0b00011 0x03
BL 0b00100 0x04
BH 0b00101 0x05
CL 0b00110 0x06
CH 0b00111 0x07
DL 0b01000 0x08
DH 0b01001 0x09
AB 0b01010 0x0A
AC 0b01011 0x0B
AD 0b01100 0x0C
BA 0b01101 0x0D
BC 0b01110 0x0E
BD 0b01111 0x0F
CA 0b10000 0x10
CB 0b10001 0x11
CD 0b10010 0x12
DA 0b10011 0x13
DB 0b10100 0x14
DC 0b10101 0x15

Tx 0x0200:0x027F

PHx/PLx 0x0280:0x02BF

Jumps 0x2C0 - 0x2FF

ALU 0x0300 - 0x3DF

NOP 0x3FF