gcc/ * config/sparc/sparc.opt (VIS3): New option. * doc/invoke.texi: Document it. * config/sparc/sparc.h: Force TARGET_VIS3 to zero if assembler is not capable of such instructions. * config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__ to 0x300 when TARGET_VIS3. * config/sparc/sparc-modes.def: Create 16-byte vector modes. * config/sparc/sparc.md (UNSPEC_CMASK8, UNSPEC_CMASK16, UNSPEC_CMASK32, UNSPEC_FCHKSM16, UNSPEC_PDISTN, UNSPC_FUCMP): New unspecs. (V64N8, VASS): New mode iterators. (vis3_shift, vis3_addsub_ss): New code iterators. (vbits, vconstr): New mode attributes. (vis3_shift_insn, vis3_addsub_ss_insn): New code attributes. (cmask8<P:mode>_vis, cmask16<P:mode>_vis, cmask32<P:mode>_vis, fchksm16_vis, <vis3_shift_insn><vbits>_vis, pdistn<mode>_vis, fmean16_vis, fpadd64_vis, fpsub64_vis, <vis3_addsub_ss_insn><vbits>_vis, fucmp<code>8<P:mode>_vis): New VIS 3.0 instruction patterns. * config/sparc/sparc.c (sparc_option_override): Set MASK_VIS3 by default when targetting capable cpus. TARGET_VIS3 implies TARGET_VIS2 and TARGET_VIS, and clear them when TARGET_FPU is disabled. (sparc_vis_init_builtins): Emit new VIS 3.0 builtins. (sparc_fold_builtin): Do not eliminate cmask{8,16,32} when result is ignored. * config/sparc/visintrin.h (__vis_cmask8, __vis_cmask16, __vis_cmask32, __vis_fchksm16, __vis_fsll16, __vis_fslas16, __vis_fsrl16, __vis_fsra16, __vis_fsll32, __vis_fslas32, __vis_fsrl32, __vis_fsra32, __vis_pdistn, __vis_fmean16, __vis_fpadd64, __vis_fpsub64, __vis_fpadds16, __vis_fpadds16s, __vis_fpsubs16, __vis_fpsubs16s, __vis_fpadds32, __vis_fpadds32s, __vis_fpsubs32, __vis_fpsubs32s, __vis_fucmple8, __vis_fucmpne8, __vis_fucmpgt8, __vis_fucmpeq8): New VIS 3.0 interfaces. * doc/extend.texi: Document new VIS 3.0 builtins. gcc/testsuite/ * gcc.target/sparc/cmask.c: New test. * gcc.target/sparc/fpadds.c: New test. * gcc.target/sparc/fshift.c: New test. * gcc.target/sparc/fucmp.c: New test. * gcc.target/sparc/vis3misc.c: New test. From-SVN: r179421
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/* Subroutines used for macro/preprocessor support on SPARC.
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Copyright (C) 2011
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "system.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "tree.h"
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#include "tm_p.h"
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#include "flags.h"
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#include "c-family/c-common.h"
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#include "c-family/c-pragma.h"
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#include "cpplib.h"
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void
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sparc_target_macros (void)
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{
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builtin_define_std ("sparc");
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if (TARGET_64BIT)
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{
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cpp_assert (parse_in, "cpu=sparc64");
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cpp_assert (parse_in, "machine=sparc64");
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}
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else
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{
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cpp_assert (parse_in, "cpu=sparc");
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cpp_assert (parse_in, "machine=sparc");
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}
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if (TARGET_VIS3)
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{
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cpp_define (parse_in, "__VIS__=0x300");
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cpp_define (parse_in, "__VIS=0x300");
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}
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else if (TARGET_VIS2)
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{
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cpp_define (parse_in, "__VIS__=0x200");
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cpp_define (parse_in, "__VIS=0x200");
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}
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else if (TARGET_VIS)
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{
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cpp_define (parse_in, "__VIS__=0x100");
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cpp_define (parse_in, "__VIS=0x100");
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}
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}
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