f1f59bc724
PR target/50910 * config/avr/avr.opt (-mbranch-cost=): New option. * config/avr/avr.h (BRANCH_COST): Define to avr_branch_cost. * config/avr/avr.c (avr_rtx_costs_1): Adjust [U]DIV/[U]MOD costs. * config/avr/avr.md (*addqi3.lt0, *addhi3.lt0, *addsi3.lt0): New insns. (*addhi3_zero_extend1): Remov % in constraint of operand 1. (*addhi3.sign_extend1, *subhi3.sign_extend2): New insns. From-SVN: r180739
640 lines
19 KiB
C
640 lines
19 KiB
C
/* Definitions of target machine for GNU compiler,
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for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
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Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
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2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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Contributed by Denis Chertykov (chertykov@gmail.com)
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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/* Names to predefine in the preprocessor for this target machine. */
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struct base_arch_s {
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/* Assembler only. */
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int asm_only;
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/* Core have 'MUL*' instructions. */
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int have_mul;
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/* Core have 'CALL' and 'JMP' instructions. */
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int have_jmp_call;
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/* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
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int have_movw_lpmx;
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/* Core have 'ELPM' instructions. */
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int have_elpm;
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/* Core have 'ELPM Rx,Z' instructions. */
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int have_elpmx;
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/* Core have 'EICALL' and 'EIJMP' instructions. */
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int have_eijmp_eicall;
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/* Reserved for xmega architecture. */
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int reserved;
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/* Reserved for xmega architecture. */
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int reserved2;
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/* Default start of data section address for architecture. */
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int default_data_section_start;
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const char *const macro;
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/* Architecture name. */
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const char *const arch_name;
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};
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/* These names are used as the index into the avr_arch_types[] table
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above. */
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enum avr_arch
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{
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ARCH_UNKNOWN,
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ARCH_AVR1,
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ARCH_AVR2,
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ARCH_AVR25,
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ARCH_AVR3,
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ARCH_AVR31,
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ARCH_AVR35,
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ARCH_AVR4,
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ARCH_AVR5,
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ARCH_AVR51,
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ARCH_AVR6
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};
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struct mcu_type_s {
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/* Device name. */
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const char *const name;
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/* Index in avr_arch_types[]. */
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int arch;
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/* Must lie outside user's namespace. NULL == no macro. */
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const char *const macro;
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/* Stack pointer have 8 bits width. */
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int short_sp;
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/* Some AVR devices have a core erratum when skipping a 2-word instruction.
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Skip instructions are: SBRC, SBRS, SBIC, SBIS, CPSE.
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Problems will occur with return address is IRQ executes during the
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skip sequence.
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A support ticket from Atmel returned the following information:
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Subject: (ATTicket:644469) On AVR skip-bug core Erratum
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From: avr@atmel.com Date: 2011-07-27
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(Please keep the subject when replying to this mail)
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This errata exists only in AT90S8515 and ATmega103 devices.
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For information please refer the following respective errata links
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http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
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http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf */
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/* Core Erratum: Must not skip 2-word instruction. */
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int errata_skip;
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/* Start of data section. */
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int data_section_start;
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/* Name of device library. */
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const char *const library_name;
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};
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/* Preprocessor macros to define depending on MCU type. */
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extern const char *avr_extra_arch_macro;
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extern const struct base_arch_s *avr_current_arch;
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extern const struct mcu_type_s *avr_current_device;
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extern const struct mcu_type_s avr_mcu_types[];
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extern const struct base_arch_s avr_arch_types[];
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#define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
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#define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
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#define AVR_HAVE_MUL (avr_current_arch->have_mul)
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#define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
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#define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
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#define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
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#define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
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#define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
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#define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
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#define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
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#define BITS_BIG_ENDIAN 0
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#define BYTES_BIG_ENDIAN 0
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#define WORDS_BIG_ENDIAN 0
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#ifdef IN_LIBGCC2
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/* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
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#define UNITS_PER_WORD 4
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#else
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/* Width of a word, in units (bytes). */
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#define UNITS_PER_WORD 1
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#endif
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#define POINTER_SIZE 16
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/* Maximum sized of reasonable data type
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DImode or Dfmode ... */
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#define MAX_FIXED_MODE_SIZE 32
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#define PARM_BOUNDARY 8
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#define FUNCTION_BOUNDARY 8
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#define EMPTY_FIELD_BOUNDARY 8
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/* No data type wants to be aligned rounder than this. */
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#define BIGGEST_ALIGNMENT 8
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#define TARGET_VTABLE_ENTRY_ALIGN 8
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#define STRICT_ALIGNMENT 0
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#define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
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#define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
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#define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
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#define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
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#define FLOAT_TYPE_SIZE 32
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#define DOUBLE_TYPE_SIZE 32
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#define LONG_DOUBLE_TYPE_SIZE 32
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#define DEFAULT_SIGNED_CHAR 1
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#define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
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#define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
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#define WCHAR_TYPE_SIZE 16
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#define FIRST_PSEUDO_REGISTER 36
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#define FIXED_REGISTERS {\
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1,1,/* r0 r1 */\
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0,0,/* r2 r3 */\
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0,0,/* r4 r5 */\
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0,0,/* r6 r7 */\
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0,0,/* r8 r9 */\
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0,0,/* r10 r11 */\
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0,0,/* r12 r13 */\
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0,0,/* r14 r15 */\
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0,0,/* r16 r17 */\
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0,0,/* r18 r19 */\
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0,0,/* r20 r21 */\
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0,0,/* r22 r23 */\
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0,0,/* r24 r25 */\
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0,0,/* r26 r27 */\
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0,0,/* r28 r29 */\
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0,0,/* r30 r31 */\
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1,1,/* STACK */\
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1,1 /* arg pointer */ }
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#define CALL_USED_REGISTERS { \
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1,1,/* r0 r1 */ \
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0,0,/* r2 r3 */ \
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0,0,/* r4 r5 */ \
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0,0,/* r6 r7 */ \
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0,0,/* r8 r9 */ \
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0,0,/* r10 r11 */ \
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0,0,/* r12 r13 */ \
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0,0,/* r14 r15 */ \
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0,0,/* r16 r17 */ \
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1,1,/* r18 r19 */ \
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1,1,/* r20 r21 */ \
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1,1,/* r22 r23 */ \
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1,1,/* r24 r25 */ \
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1,1,/* r26 r27 */ \
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0,0,/* r28 r29 */ \
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1,1,/* r30 r31 */ \
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1,1,/* STACK */ \
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1,1 /* arg pointer */ }
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#define REG_ALLOC_ORDER { \
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24,25, \
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18,19, \
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20,21, \
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22,23, \
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30,31, \
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26,27, \
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28,29, \
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17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
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0,1, \
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32,33,34,35 \
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}
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#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
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#define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
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#define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
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#define MODES_TIEABLE_P(MODE1, MODE2) 1
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enum reg_class {
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NO_REGS,
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R0_REG, /* r0 */
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POINTER_X_REGS, /* r26 - r27 */
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POINTER_Y_REGS, /* r28 - r29 */
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POINTER_Z_REGS, /* r30 - r31 */
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STACK_REG, /* STACK */
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BASE_POINTER_REGS, /* r28 - r31 */
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POINTER_REGS, /* r26 - r31 */
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ADDW_REGS, /* r24 - r31 */
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SIMPLE_LD_REGS, /* r16 - r23 */
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LD_REGS, /* r16 - r31 */
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NO_LD_REGS, /* r0 - r15 */
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GENERAL_REGS, /* r0 - r31 */
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ALL_REGS, LIM_REG_CLASSES
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};
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#define N_REG_CLASSES (int)LIM_REG_CLASSES
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#define REG_CLASS_NAMES { \
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"NO_REGS", \
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"R0_REG", /* r0 */ \
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"POINTER_X_REGS", /* r26 - r27 */ \
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"POINTER_Y_REGS", /* r28 - r29 */ \
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"POINTER_Z_REGS", /* r30 - r31 */ \
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"STACK_REG", /* STACK */ \
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"BASE_POINTER_REGS", /* r28 - r31 */ \
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"POINTER_REGS", /* r26 - r31 */ \
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"ADDW_REGS", /* r24 - r31 */ \
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"SIMPLE_LD_REGS", /* r16 - r23 */ \
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"LD_REGS", /* r16 - r31 */ \
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"NO_LD_REGS", /* r0 - r15 */ \
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"GENERAL_REGS", /* r0 - r31 */ \
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"ALL_REGS" }
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#define REG_CLASS_CONTENTS { \
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{0x00000000,0x00000000}, /* NO_REGS */ \
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{0x00000001,0x00000000}, /* R0_REG */ \
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{3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
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{3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
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{3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
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{0x00000000,0x00000003}, /* STACK_REG, STACK */ \
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{(3 << REG_Y) | (3 << REG_Z), \
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0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
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{(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
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0x00000000}, /* POINTER_REGS, r26 - r31 */ \
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{(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
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0x00000000}, /* ADDW_REGS, r24 - r31 */ \
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{0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
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{(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
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0x00000000}, /* LD_REGS, r16 - r31 */ \
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{0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
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{0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
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{0xffffffff,0x00000003} /* ALL_REGS */ \
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}
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#define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
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#define MODE_CODE_BASE_REG_CLASS(mode, outer_code, index_code) \
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avr_mode_code_base_reg_class (mode, outer_code, index_code)
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#define INDEX_REG_CLASS NO_REGS
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#define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, outer_code, index_code) \
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avr_regno_mode_code_ok_for_base_p (num, mode, outer_code, index_code)
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#define REGNO_OK_FOR_INDEX_P(NUM) 0
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#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
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#define STACK_PUSH_CODE POST_DEC
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#define STACK_GROWS_DOWNWARD
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#define STARTING_FRAME_OFFSET avr_starting_frame_offset()
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#define STACK_POINTER_OFFSET 1
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#define FIRST_PARM_OFFSET(FUNDECL) 0
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#define STACK_BOUNDARY 8
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#define STACK_POINTER_REGNUM 32
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#define FRAME_POINTER_REGNUM REG_Y
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#define ARG_POINTER_REGNUM 34
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#define STATIC_CHAIN_REGNUM 2
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#define ELIMINABLE_REGS { \
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{ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
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{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
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,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
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#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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OFFSET = avr_initial_elimination_offset (FROM, TO)
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#define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
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/* Don't use Push rounding. expr.c: emit_single_push_insn is broken
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for POST_DEC targets (PR27386). */
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/*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
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typedef struct avr_args {
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int nregs; /* # registers available for passing */
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int regno; /* next available register number */
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} CUMULATIVE_ARGS;
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#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
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init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
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#define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
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#define DEFAULT_PCC_STRUCT_RETURN 0
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#define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
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#define HAVE_POST_INCREMENT 1
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#define HAVE_PRE_DECREMENT 1
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#define MAX_REGS_PER_ADDRESS 1
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#define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
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do { \
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rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
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ADDR_TYPE (TYPE), \
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IND_L, make_memloc); \
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if (new_x) \
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{ \
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X = new_x; \
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goto WIN; \
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} \
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} while (0)
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#define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
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#define SLOW_BYTE_ACCESS 0
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#define NO_FUNCTION_CSE
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#define TEXT_SECTION_ASM_OP "\t.text"
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#define DATA_SECTION_ASM_OP "\t.data"
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#define BSS_SECTION_ASM_OP "\t.section .bss"
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/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
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There are no shared libraries on this target, and these sections are
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placed in the read-only program memory, so they are not writable. */
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#undef CTORS_SECTION_ASM_OP
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#define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
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#undef DTORS_SECTION_ASM_OP
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#define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
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#define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
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#define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
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#define SUPPORTS_INIT_PRIORITY 0
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#define JUMP_TABLES_IN_TEXT_SECTION 0
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#define ASM_COMMENT_START " ; "
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#define ASM_APP_ON "/* #APP */\n"
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#define ASM_APP_OFF "/* #NOAPP */\n"
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#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
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#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
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avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
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#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
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asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
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#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
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avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
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/* Globalizing directive for a label. */
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#define GLOBAL_ASM_OP ".global\t"
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#define SUPPORTS_WEAK 1
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#define HAS_INIT_SECTION 1
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#define REGISTER_NAMES { \
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"r0","r1","r2","r3","r4","r5","r6","r7", \
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"r8","r9","r10","r11","r12","r13","r14","r15", \
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"r16","r17","r18","r19","r20","r21","r22","r23", \
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"r24","r25","r26","r27","r28","r29","r30","r31", \
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"__SP_L__","__SP_H__","argL","argH"}
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#define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
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#define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
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#define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
|
|
|
|
#define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
|
|
|
|
#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
|
|
{ \
|
|
gcc_assert (REGNO < 32); \
|
|
fprintf (STREAM, "\tpush\tr%d", REGNO); \
|
|
}
|
|
|
|
#define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
|
|
{ \
|
|
gcc_assert (REGNO < 32); \
|
|
fprintf (STREAM, "\tpop\tr%d", REGNO); \
|
|
}
|
|
|
|
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
|
|
avr_output_addr_vec_elt(STREAM, VALUE)
|
|
|
|
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
|
|
do { \
|
|
if ((POWER) > 1) \
|
|
fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
|
|
} while (0)
|
|
|
|
#define CASE_VECTOR_MODE HImode
|
|
|
|
#undef WORD_REGISTER_OPERATIONS
|
|
|
|
#define MOVE_MAX 4
|
|
|
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
|
#define Pmode HImode
|
|
|
|
#define FUNCTION_MODE HImode
|
|
|
|
#define DOLLARS_IN_IDENTIFIERS 0
|
|
|
|
#define TRAMPOLINE_SIZE 4
|
|
|
|
/* Store in cc_status the expressions
|
|
that the condition codes will describe
|
|
after execution of an instruction whose pattern is EXP.
|
|
Do not alter them if the instruction would not alter the cc's. */
|
|
|
|
#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
|
|
|
|
/* The add insns don't set overflow in a usable way. */
|
|
#define CC_OVERFLOW_UNUSABLE 01000
|
|
/* The mov,and,or,xor insns don't set carry. That's ok though as the
|
|
Z bit is all we need when doing unsigned comparisons on the result of
|
|
these insns (since they're always with 0). However, conditions.h has
|
|
CC_NO_OVERFLOW defined for this purpose. Rename it to something more
|
|
understandable. */
|
|
#define CC_NO_CARRY CC_NO_OVERFLOW
|
|
|
|
|
|
/* Output assembler code to FILE to increment profiler label # LABELNO
|
|
for profiling a function entry. */
|
|
|
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
|
fprintf (FILE, "/* profiler %d */", (LABELNO))
|
|
|
|
#define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
|
|
adjust_insn_length (INSN, LENGTH))
|
|
|
|
extern const char *avr_device_to_arch (int argc, const char **argv);
|
|
extern const char *avr_device_to_data_start (int argc, const char **argv);
|
|
extern const char *avr_device_to_startfiles (int argc, const char **argv);
|
|
extern const char *avr_device_to_devicelib (int argc, const char **argv);
|
|
|
|
#define EXTRA_SPEC_FUNCTIONS \
|
|
{ "device_to_arch", avr_device_to_arch }, \
|
|
{ "device_to_data_start", avr_device_to_data_start }, \
|
|
{ "device_to_startfile", avr_device_to_startfiles }, \
|
|
{ "device_to_devicelib", avr_device_to_devicelib },
|
|
|
|
#define CPP_SPEC ""
|
|
|
|
#define CC1_SPEC ""
|
|
|
|
#define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
|
|
%{!fenforce-eh-specs:-fno-enforce-eh-specs} \
|
|
%{!fexceptions:-fno-exceptions}"
|
|
/* A C string constant that tells the GCC driver program options to
|
|
pass to `cc1plus'. */
|
|
|
|
#define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
|
|
mmcu=*:-mmcu=%*}"
|
|
|
|
#define LINK_SPEC "\
|
|
%{mrelax:--relax\
|
|
%{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
|
|
%{mmcu=atmega16*:--pmem-wrap-around=16k}\
|
|
%{mmcu=atmega32*|\
|
|
mmcu=at90can32*:--pmem-wrap-around=32k}\
|
|
%{mmcu=atmega64*|\
|
|
mmcu=at90can64*|\
|
|
mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
|
|
%:device_to_arch(%{mmcu=*:%*})\
|
|
%:device_to_data_start(%{mmcu=*:%*})"
|
|
|
|
#define LIB_SPEC \
|
|
"%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
|
|
|
|
#define LIBSTDCXX "gcc"
|
|
/* No libstdc++ for now. Empty string doesn't work. */
|
|
|
|
#define LIBGCC_SPEC \
|
|
"%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
|
|
|
|
#define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
|
|
|
|
#define ENDFILE_SPEC ""
|
|
|
|
/* This is the default without any -mmcu=* option (AT90S*). */
|
|
#define MULTILIB_DEFAULTS { "mmcu=avr2" }
|
|
|
|
#define TEST_HARD_REG_CLASS(CLASS, REGNO) \
|
|
TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
|
|
|
|
/* Note that the other files fail to use these
|
|
in some of the places where they should. */
|
|
|
|
#if defined(__STDC__) || defined(ALMOST_STDC)
|
|
#define AS2(a,b,c) #a " " #b "," #c
|
|
#define AS2C(b,c) " " #b "," #c
|
|
#define AS3(a,b,c,d) #a " " #b "," #c "," #d
|
|
#define AS1(a,b) #a " " #b
|
|
#else
|
|
#define AS1(a,b) "a b"
|
|
#define AS2(a,b,c) "a b,c"
|
|
#define AS2C(b,c) " b,c"
|
|
#define AS3(a,b,c,d) "a b,c,d"
|
|
#endif
|
|
#define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
|
|
#define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
|
|
#define CR_TAB "\n\t"
|
|
|
|
#define DWARF2_ADDR_SIZE 4
|
|
|
|
#define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
|
|
#define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
|
|
|
|
/* The caller's stack pointer value immediately before the call
|
|
is one byte below the first argument. */
|
|
#define ARG_POINTER_CFA_OFFSET(FNDECL) -1
|
|
|
|
#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
|
|
avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
|
|
|
|
/* A C structure for machine-specific, per-function data.
|
|
This is added to the cfun structure. */
|
|
struct GTY(()) machine_function
|
|
{
|
|
/* 'true' - if current function is a naked function. */
|
|
int is_naked;
|
|
|
|
/* 'true' - if current function is an interrupt function
|
|
as specified by the "interrupt" attribute. */
|
|
int is_interrupt;
|
|
|
|
/* 'true' - if current function is a signal function
|
|
as specified by the "signal" attribute. */
|
|
int is_signal;
|
|
|
|
/* 'true' - if current function is a 'task' function
|
|
as specified by the "OS_task" attribute. */
|
|
int is_OS_task;
|
|
|
|
/* 'true' - if current function is a 'main' function
|
|
as specified by the "OS_main" attribute. */
|
|
int is_OS_main;
|
|
|
|
/* Current function stack size. */
|
|
int stack_usage;
|
|
|
|
/* 'true' if a callee might be tail called */
|
|
int sibcall_fails;
|
|
};
|
|
|
|
/* AVR does not round pushes, but the existance of this macro is
|
|
required in order for pushes to be generated. */
|
|
#define PUSH_ROUNDING(X) (X)
|
|
|
|
#define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
|