When looking into PR94134, I've noticed bugs in the
ASM_OUTPUT_ALIGNED_DECL_LOCAL documentation. varasm.c has:
#if defined ASM_OUTPUT_ALIGNED_DECL_LOCAL
unsigned int align = symtab_node::get (decl)->definition_alignment ();
ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, decl, name,
size, align);
return true;
#elif defined ASM_OUTPUT_ALIGNED_LOCAL
unsigned int align = symtab_node::get (decl)->definition_alignment ();
ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size, align);
return true;
#else
ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
return false;
#endif
and the ASM_OUTPUT_ALIGNED_LOCAL documentation properly mentions:
Like @code{ASM_OUTPUT_LOCAL} and mentions the same macro in another place.
The ASM_OUTPUT_ALIGNED_DECL_LOCAL description mentions non-existing macros
ASM_OUTPUT_ALIGNED_DECL and ASM_OUTPUT_DECL instead of the right ones
ASM_OUTPUT_ALIGNED_LOCAL and ASM_OUTPUT_LOCAL.
2020-03-12 Jakub Jelinek <jakub@redhat.com>
* doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
* doc/tm.texi: Regenerated.
5571 lines
210 KiB
Plaintext
5571 lines
210 KiB
Plaintext
2020-03-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
|
||
ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
|
||
and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
|
||
* doc/tm.texi: Regenerated.
|
||
|
||
PR tree-optimization/94130
|
||
* tree-ssa-dse.c: Include gimplify.h.
|
||
(increment_start_addr): If stmt has lhs, drop the lhs from call and
|
||
set it after the call to the original value of the first argument.
|
||
Formatting fixes.
|
||
(decrement_count): Formatting fix.
|
||
|
||
2020-03-11 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/arm/arm-builtins.c
|
||
(arm_init_simd_builtin_scalar_types): New.
|
||
* config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
|
||
(vld2q_bf16): Used new builtin type.
|
||
(vld3_bf16): Used new builtin type.
|
||
(vld3q_bf16): Used new builtin type.
|
||
(vld4_bf16): Used new builtin type.
|
||
(vld4q_bf16): Used new builtin type.
|
||
(vld2_dup_bf16): Used new builtin type.
|
||
(vld2q_dup_bf16): Used new builtin type.
|
||
(vld3_dup_bf16): Used new builtin type.
|
||
(vld3q_dup_bf16): Used new builtin type.
|
||
(vld4_dup_bf16): Used new builtin type.
|
||
(vld4q_dup_bf16): Used new builtin type.
|
||
|
||
2020-03-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/94134
|
||
* config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
|
||
at the start to switch to data section. Don't print extra newline if
|
||
.globl directive has not been emitted.
|
||
|
||
2020-03-11 Richard Biener <rguenther@suse.de>
|
||
|
||
* match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
|
||
New pattern.
|
||
|
||
2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR middle-end/93961
|
||
* tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
|
||
whose type is a qualified union.
|
||
|
||
2020-03-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/94121
|
||
* config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
|
||
instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
|
||
|
||
PR bootstrap/93962
|
||
* value-prof.c (dump_histogram_value): Use abs_hwi instead of
|
||
std::abs.
|
||
(get_nth_most_common_value): Use abs_hwi instead of abs.
|
||
|
||
PR middle-end/94111
|
||
* dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
|
||
is rvc_normal, otherwise use real_to_decimal to print the number to
|
||
string.
|
||
|
||
PR tree-optimization/94114
|
||
* tree-loop-distribution.c (generate_memset_builtin): Call
|
||
rewrite_to_non_trapping_overflow even on mem.
|
||
(generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
|
||
on dest and src.
|
||
|
||
2020-03-10 Jeff Law <law@redhat.com>
|
||
|
||
* config/bfin/bfin.md (movsi_insv): Add length attribute.
|
||
|
||
2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
|
||
|
||
PR target/93709
|
||
* gcc/config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
|
||
NAN and SIGNED_ZEROR for smax/smin.
|
||
|
||
2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
|
||
|
||
PR target/90763
|
||
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
|
||
clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
|
||
|
||
2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
|
||
|
||
* loop-iv.c (find_simple_exit): Make it static.
|
||
* cfgloop.h: Remove the corresponding prototype.
|
||
|
||
2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
|
||
|
||
* ddg.c (create_ddg): Fix intendation.
|
||
(set_recurrence_length): Likewise.
|
||
(create_ddg_all_sccs): Likewise.
|
||
|
||
2020-03-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/94088
|
||
* config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
|
||
CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
|
||
is 32.
|
||
|
||
2020-03-09 Jason Merrill <jason@redhat.com>
|
||
|
||
* gdbinit.in (pgs): Fix typo in documentation.
|
||
|
||
2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
Revert:
|
||
|
||
2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/93564
|
||
* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
|
||
do not honor reg alloc order.
|
||
|
||
2020-03-09 Andrew Pinski <apinski@marvell.com>
|
||
|
||
PR inline-asm/94095
|
||
* doc/extend.texi (x86 Operand Modifiers): Fix column
|
||
for 'A' modifier.
|
||
|
||
2020-03-09 Martin Liska <mliska@suse.cz>
|
||
|
||
PR target/93800
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal):
|
||
Remove set of str_align_loops and str_align_jumps as these
|
||
should be set in previous 2 conditions in the function.
|
||
|
||
2020-03-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/94045
|
||
* params.opt (-param=max-find-base-term-values=): New option.
|
||
* alias.c (find_base_term): Add cut-off for number of visited VALUEs
|
||
in a single toplevel find_base_term call.
|
||
|
||
2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR target/91598
|
||
* config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
|
||
(aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
|
||
* config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
|
||
* config/aarch64/arm_neon.h:
|
||
(vmlal_lane_s16): Expand using intrinsics rather than inline asm.
|
||
(vmlal_lane_u16): Likewise.
|
||
(vmlal_lane_s32): Likewise.
|
||
(vmlal_lane_u32): Likewise.
|
||
(vmlal_laneq_s16): Likewise.
|
||
(vmlal_laneq_u16): Likewise.
|
||
(vmlal_laneq_s32): Likewise.
|
||
(vmlal_laneq_u32): Likewise.
|
||
(vmull_lane_s16): Likewise.
|
||
(vmull_lane_u16): Likewise.
|
||
(vmull_lane_s32): Likewise.
|
||
(vmull_lane_u32): Likewise.
|
||
(vmull_laneq_s16): Likewise.
|
||
(vmull_laneq_u16): Likewise.
|
||
(vmull_laneq_s32): Likewise.
|
||
(vmull_laneq_u32): Likewise.
|
||
* config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
|
||
(Qlane): Likewise.
|
||
|
||
2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
|
||
(aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
|
||
(aarch64_mls_elt<mode>): Likewise.
|
||
(aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
|
||
(aarch64_fma4_elt<mode>): Likewise.
|
||
(aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
|
||
(aarch64_fma4_elt_to_64v2df): Likewise.
|
||
(aarch64_fnma4_elt<mode>): Likewise.
|
||
(aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
|
||
(aarch64_fnma4_elt_to_64v2df): Likewise.
|
||
|
||
2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
|
||
Specify movprfx attribute.
|
||
(@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
|
||
|
||
2020-03-06 David Edelsohn <dje.gcc@gmail.com>
|
||
|
||
PR target/94065
|
||
* config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
|
||
cmodel=large.
|
||
(TARGET_NO_FP_IN_TOC): Same.
|
||
* config/rs6000/aix71.h: Same.
|
||
* config/rs6000/aix72.h: Same.
|
||
|
||
2020-03-06 Andrew Pinski <apinski@marvell.com>
|
||
Jeff Law <law@redhat.com>
|
||
|
||
PR rtl-optimization/93996
|
||
* haifa-sched.c (remove_notes): Be more careful when adding
|
||
REG_SAVE_NOTE.
|
||
|
||
2020-03-06 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/arm/arm_neon.h (vld2_bf16): New.
|
||
(vld2q_bf16): New.
|
||
(vld3_bf16): New.
|
||
(vld3q_bf16): New.
|
||
(vld4_bf16): New.
|
||
(vld4q_bf16): New.
|
||
(vld2_dup_bf16): New.
|
||
(vld2q_dup_bf16): New.
|
||
(vld3_dup_bf16): New.
|
||
(vld3q_dup_bf16): New.
|
||
(vld4_dup_bf16): New.
|
||
(vld4q_dup_bf16): New.
|
||
* config/arm/arm_neon_builtins.def
|
||
(vld2): Changed to VAR13 and added v4bf, v8bf
|
||
(vld2_dup): Changed to VAR8 and added v4bf, v8bf
|
||
(vld3): Changed to VAR13 and added v4bf, v8bf
|
||
(vld3_dup): Changed to VAR8 and added v4bf, v8bf
|
||
(vld4): Changed to VAR13 and added v4bf, v8bf
|
||
(vld4_dup): Changed to VAR8 and added v4bf, v8bf
|
||
* config/arm/iterators.md (VDXBF2): New iterator.
|
||
*config/arm/neon.md (neon_vld2): Use new iterators.
|
||
(neon_vld2_dup<mode): Use new iterators.
|
||
(neon_vld3<mode>): Likewise.
|
||
(neon_vld3qa<mode>): Likewise.
|
||
(neon_vld3qb<mode>): Likewise.
|
||
(neon_vld3_dup<mode>): Likewise.
|
||
(neon_vld4<mode>): Likewise.
|
||
(neon_vld4qa<mode>): Likewise.
|
||
(neon_vld4qb<mode>): Likewise.
|
||
(neon_vld4_dup<mode>): Likewise.
|
||
(neon_vld2_dupv8bf): New.
|
||
(neon_vld3_dupv8bf): Likewise.
|
||
(neon_vld4_dupv8bf): Likewise.
|
||
|
||
2020-03-06 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
|
||
(bfloat16x8x2_t): New typedef.
|
||
(bfloat16x4x3_t): New typedef.
|
||
(bfloat16x8x3_t): New typedef.
|
||
(bfloat16x4x4_t): New typedef.
|
||
(bfloat16x8x4_t): New typedef.
|
||
(vst2_bf16): New.
|
||
(vst2q_bf16): New.
|
||
(vst3_bf16): New.
|
||
(vst3q_bf16): New.
|
||
(vst4_bf16): New.
|
||
(vst4q_bf16): New.
|
||
* config/arm/arm-builtins.c (v2bf_UP): Define.
|
||
(VAR13): New.
|
||
(arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
|
||
* config/arm/arm-modes.def (V2BF): New mode.
|
||
* config/arm/arm-simd-builtin-types.def
|
||
(Bfloat16x2_t): New entry.
|
||
* config/arm/arm_neon_builtins.def
|
||
(vst2): Changed to VAR13 and added v4bf, v8bf
|
||
(vst3): Changed to VAR13 and added v4bf, v8bf
|
||
(vst4): Changed to VAR13 and added v4bf, v8bf
|
||
* config/arm/iterators.md (VDXBF): New iterator.
|
||
(VQ2BF): New iterator.
|
||
*config/arm/neon.md (neon_vst2<mode>): Used new iterators.
|
||
(neon_vst2<mode>): Used new iterators.
|
||
(neon_vst3<mode>): Used new iterators.
|
||
(neon_vst3<mode>): Used new iterators.
|
||
(neon_vst3qa<mode>): Used new iterators.
|
||
(neon_vst3qb<mode>): Used new iterators.
|
||
(neon_vst4<mode>): Used new iterators.
|
||
(neon_vst4<mode>): Used new iterators.
|
||
(neon_vst4qa<mode>): Used new iterators.
|
||
(neon_vst4qb<mode>): Used new iterators.
|
||
|
||
2020-03-06 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(bfcvtn): New built-in function.
|
||
(bfcvtn_q): New built-in function.
|
||
(bfcvtn2): New built-in function.
|
||
(bfcvt): New built-in function.
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_bfcvtn<q><mode>): New pattern.
|
||
(aarch64_bfcvtn2v8bf): New pattern.
|
||
(aarch64_bfcvtbf): New pattern.
|
||
* config/aarch64/arm_bf16.h (float32_t): New typedef.
|
||
(vcvth_bf16_f32): New intrinsic.
|
||
* config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
|
||
(vcvtq_low_bf16_f32): New intrinsic.
|
||
(vcvtq_high_bf16_f32): New intrinsic.
|
||
* config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
|
||
(UNSPEC_BFCVTN): New UNSPEC.
|
||
(UNSPEC_BFCVTN2): New UNSPEC.
|
||
(UNSPEC_BFCVT): New UNSPEC.
|
||
* config/arm/types.md (bf_cvt): New type.
|
||
|
||
2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
* config/s390/s390.md ("tabort"): Get rid of two consecutive
|
||
blanks in format string.
|
||
|
||
2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/89229
|
||
PR target/89346
|
||
* config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
|
||
* config/i386/i386.c (ix86_get_ssemov): New function.
|
||
(ix86_output_ssemov): Likewise.
|
||
* config/i386/sse.md (VMOVE:mov<mode>_internal): Call
|
||
ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
|
||
check.
|
||
(*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
|
||
(*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
|
||
Remove ext_sse_reg_operand and TARGET_AVX512VL check.
|
||
(*movti_internal): Likewise.
|
||
(*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
|
||
|
||
2020-03-05 Jeff Law <law@redhat.com>
|
||
|
||
PR tree-optimization/91890
|
||
* gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
|
||
Use gimple_or_expr_nonartificial_location.
|
||
(check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
|
||
Use gimple_or_expr_nonartificial_location.
|
||
* gimple.c (gimple_or_expr_nonartificial_location): New function.
|
||
* gimple.h (gimple_or_expr_nonartificial_location): Declare it.
|
||
* tree-ssa-strlen.c (maybe_warn_overflow): Use
|
||
gimple_or_expr_nonartificial_location.
|
||
(maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
|
||
(maybe_warn_pointless_strcmp): Likewise.
|
||
|
||
2020-03-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/94046
|
||
* config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
|
||
SRC and MASK arguments to __m128 from __m128d.
|
||
(_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
|
||
from __m256d.
|
||
(_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
|
||
from __m128d.
|
||
* config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
|
||
argument to __m128i from __m128d.
|
||
(_mm256_permute2_pd): Fix first cast of C argument to __m256i from
|
||
__m256d.
|
||
(_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
|
||
(_mm256_permute2_ps): Fix first cast of C argument to __m256i from
|
||
__m256.
|
||
|
||
2020-03-05 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/arm/arm_neon.h (vbfmmlaq_f32): New.
|
||
(vbfmlalbq_f32): New.
|
||
(vbfmlaltq_f32): New.
|
||
(vbfmlalbq_lane_f32): New.
|
||
(vbfmlaltq_lane_f32): New.
|
||
(vbfmlalbq_laneq_f32): New.
|
||
(vbfmlaltq_laneq_f32): New.
|
||
* config/arm/arm_neon_builtins.def (vmmla): New.
|
||
(vfmab): New.
|
||
(vfmat): New.
|
||
(vfmab_lane): New.
|
||
(vfmat_lane): New.
|
||
(vfmab_laneq): New.
|
||
(vfmat_laneq): New.
|
||
* config/arm/iterators.md (BF_MA): New int iterator.
|
||
(bt): New int attribute.
|
||
(VQXBF): Copy of VQX with V8BF.
|
||
* config/arm/neon.md (neon_vmmlav8bf): New insn.
|
||
(neon_vfma<bt>v8bf): New insn.
|
||
(neon_vfma<bt>_lanev8bf): New insn.
|
||
(neon_vfma<bt>_laneqv8bf): New expand.
|
||
(neon_vget_high<mode>): Changed iterator to VQXBF.
|
||
* config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
|
||
(UNSPEC_BFMAB): New UNSPEC.
|
||
(UNSPEC_BFMAT): New UNSPEC.
|
||
|
||
2020-03-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/93399
|
||
* tree-pretty-print.h (pretty_print_string): Declare.
|
||
* tree-pretty-print.c (pretty_print_string): Remove forward
|
||
declaration, no longer static. Change nbytes parameter type
|
||
from unsigned to size_t.
|
||
* print-rtl.c (print_value) <case CONST_STRING>: Use
|
||
pretty_print_string and for shrink way too long strings.
|
||
|
||
2020-03-05 Richard Biener <rguenther@suse.de>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93582
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
|
||
last operand as signed when looking for memset offset. Formatting
|
||
fix.
|
||
|
||
2020-03-04 Andrew Pinski <apinski@marvell.com>
|
||
|
||
PR bootstrap/93962
|
||
* value-prof.c (dump_histogram_value): Use std::abs.
|
||
|
||
2020-03-04 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/93986
|
||
* tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
|
||
operands to the same precision widest_int to avoid ICEs.
|
||
|
||
2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
|
||
|
||
PR target/87560
|
||
* rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
|
||
* rs6000.c (rs6000_disable_incompatible_switches): Add table entry
|
||
for OPTION_MASK_ALTIVEC.
|
||
|
||
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
* config.gcc: Include the glibc-stdint.h header for zTPF.
|
||
|
||
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
* config/s390/s390.c (s390_secondary_memory_needed): Disallow
|
||
direct FPR-GPR copies.
|
||
(s390_register_info_gprtofpr): Disallow GPR content to be saved in
|
||
FPRs.
|
||
|
||
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
* config/s390/s390.c (s390_emit_prologue): Specify the 2 new
|
||
operands to the prologue_tpf expander.
|
||
(s390_emit_epilogue): Likewise.
|
||
(s390_option_override_internal): Do error checking and setup for
|
||
the new options.
|
||
* config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
|
||
(TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
|
||
(TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
|
||
(TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
|
||
* config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
|
||
operands for the check flag and the branch target.
|
||
* config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
|
||
("mtpf-trace-hook-prologue-target")
|
||
("mtpf-trace-hook-epilogue-check")
|
||
("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
|
||
options.
|
||
* doc/invoke.texi: Document -mtpf-trace-skip option. The other
|
||
options are for debugging purposes and will not be documented
|
||
here.
|
||
|
||
2020-03-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR debug/93888
|
||
* tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
|
||
|
||
* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
|
||
argument. Change pd argument so that it can be modified. Turn
|
||
constant non-CONSTRUCTOR store into non-constant if it is too large.
|
||
Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
|
||
overflows.
|
||
(vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
|
||
callers.
|
||
|
||
2020-02-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93964
|
||
* graphite-isl-ast-to-gimple.c
|
||
(gcc_expression_from_isl_ast_expr_id): Add intermediate
|
||
conversion for pointer to integer converts.
|
||
* graphite-scop-detection.c (assign_parameter_index_in_region):
|
||
Relax assert.
|
||
|
||
2020-03-04 Martin Liska <mliska@suse.cz>
|
||
|
||
PR c/93886
|
||
PR c/93887
|
||
* doc/invoke.texi: Clarify --help=language and --help=common
|
||
interaction.
|
||
|
||
2020-03-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/94001
|
||
* tree-tailcall.c (process_assignment): Before comparing op1 to
|
||
*ass_var, verify *ass_var is non-NULL.
|
||
|
||
2020-03-04 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
PR target/93995
|
||
* config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
|
||
the result of IOR.
|
||
|
||
2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
|
||
|
||
* config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
|
||
* config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
|
||
(vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
|
||
(vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
|
||
* config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
|
||
(vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
|
||
* config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
|
||
(V_bf_low, V_bf_cvt_m): New mode attributes.
|
||
* config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
|
||
(neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
|
||
(neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
|
||
(neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
|
||
* config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
|
||
|
||
2020-03-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93582
|
||
* tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
|
||
* tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
|
||
members, initialize them in the constructor and if mask is non-NULL,
|
||
artificially push_partial_def {} for the portions of the mask that
|
||
contain zeros.
|
||
(vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
|
||
val and return (void *)-1. Formatting fix.
|
||
(vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
|
||
Formatting fix.
|
||
(vn_reference_lookup): Add mask argument. If non-NULL, don't call
|
||
fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
|
||
data.mask_result.
|
||
(visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
|
||
mask.
|
||
(visit_stmt): Formatting fix.
|
||
|
||
2020-03-03 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93946
|
||
* alias.h (refs_same_for_tbaa_p): Declare.
|
||
* alias.c (refs_same_for_tbaa_p): New function.
|
||
* tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
|
||
zero.
|
||
* tree-ssa-scopedtables.h
|
||
(avail_exprs_stack::lookup_avail_expr): Add output argument
|
||
giving access to the hashtable entry.
|
||
* tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
|
||
Likewise.
|
||
* tree-ssa-dom.c: Include alias.h.
|
||
(dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
|
||
removing redundant store.
|
||
* tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
|
||
(ao_ref_init_from_vn_reference): Adjust prototype.
|
||
(vn_reference_lookup_pieces): Likewise.
|
||
(vn_reference_insert_pieces): Likewise.
|
||
* tree-ssa-sccvn.c: Track base alias set in addition to alias
|
||
set everywhere.
|
||
(eliminate_dom_walker::eliminate_stmt): Also check base alias
|
||
set when removing redundant stores.
|
||
(visit_reference_op_store): Likewise.
|
||
* dse.c (record_store): Adjust valdity check for redundant
|
||
store removal.
|
||
|
||
2020-03-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/26877
|
||
* config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
|
||
|
||
PR rtl-optimization/94002
|
||
* explow.c (plus_constant): Punt if cst has VOIDmode and
|
||
get_pool_mode is different from mode.
|
||
|
||
2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (leigitimate_small_data_address_p): Check if an
|
||
address has an offset which fits the scalling constraint for a
|
||
load/store operation.
|
||
(legitimate_scaled_address_p): Update use
|
||
leigitimate_small_data_address_p.
|
||
(arc_print_operand): Likewise.
|
||
(arc_legitimate_address_p): Likewise.
|
||
(legitimate_small_data_address_p): Likewise.
|
||
|
||
2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
|
||
(fnmasf4_fpu): Likewise.
|
||
|
||
2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (adddi3): Early expand the 64bit operation into
|
||
32bit ops.
|
||
(subdi3): Likewise.
|
||
(adddi3_i): Remove pattern.
|
||
(subdi3_i): Likewise.
|
||
|
||
2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (eh_return): Add length info.
|
||
|
||
2020-03-02 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
|
||
|
||
2020-03-02 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/invoke.texi (Static Analyzer Options): Add
|
||
-Wanalyzer-stale-setjmp-buffer to the list of options enabled
|
||
by -fanalyzer.
|
||
|
||
2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/93997
|
||
* config/i386/i386.md (movstrict<mode>): Allow only
|
||
registers with VALID_INT_MODE_P modes.
|
||
|
||
2020-03-02 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (dpp_move<mode>): New.
|
||
(reduc_insn): Use 'U' and 'B' operand codes.
|
||
(reduc_<reduc_op>_scal_<mode>): Allow all types.
|
||
(reduc_<reduc_op>_scal_v64di): Delete.
|
||
(*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
|
||
(*plus_carry_dpp_shr_v64si): Change to ...
|
||
(*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
|
||
(mov_from_lane63_v64di): Change to ...
|
||
(mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
|
||
* config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
|
||
Support UNSPEC_MOV_DPP_SHR output formats.
|
||
(gcn_expand_reduc_scalar): Add "use_moves" reductions.
|
||
Add "use_extends" reductions.
|
||
(print_operand_address): Add 'I' and 'U' codes.
|
||
* config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
|
||
|
||
2020-03-02 Martin Liska <mliska@suse.cz>
|
||
|
||
* lto-wrapper.c: Fix typo in comment about
|
||
C++ standard version.
|
||
|
||
2020-03-01 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c++/92721
|
||
* calls.c (init_attr_rdwr_indices): Correctly handle attribute.
|
||
|
||
2020-03-01 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR middle-end/93829
|
||
* tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
|
||
of a pointer in the outermost ADDR_EXPRs.
|
||
|
||
2020-02-28 Jeff Law <law@redhat.com>
|
||
|
||
* config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
|
||
* config/v850/v850.c (v850_asm_trampoline_template): Update
|
||
accordingly.
|
||
|
||
2020-02-28 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
PR target/93937
|
||
* config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
|
||
Delete insn.
|
||
|
||
2020-02-28 Martin Liska <mliska@suse.cz>
|
||
|
||
PR other/93965
|
||
* configure.ac: Improve detection of ld_date by requiring
|
||
either two dashes or none.
|
||
* configure: Regenerate.
|
||
|
||
2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/93564
|
||
* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
|
||
do not honor reg alloc order.
|
||
|
||
2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
|
||
|
||
PR target/87612
|
||
* config/aarch64/aarch64.c (aarch64_override_options): Fix
|
||
misleading warning string.
|
||
|
||
2020-02-27 Martin Sebor <msebor@redhat.com>
|
||
|
||
* doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
|
||
|
||
2020-02-27 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
PR target/93932
|
||
* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
|
||
Split the insn into two parts. This insn only does variable
|
||
extract from a register.
|
||
(vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
|
||
variable extract from memory.
|
||
(vsx_extract_v4sf_var): Split the insn into two parts. This insn
|
||
only does variable extract from a register.
|
||
(vsx_extract_v4sf_var_load): New insn, do variable extract from
|
||
memory.
|
||
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
|
||
into two parts. This insn only does variable extract from a
|
||
register.
|
||
(vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
|
||
do variable extract from memory.
|
||
|
||
2020-02-27 Martin Jambor <mjambor@suse.cz>
|
||
Feng Xue <fxue@os.amperecomputing.com>
|
||
|
||
PR ipa/93707
|
||
* ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
|
||
new function calls_same_node_or_its_all_contexts_clone_p.
|
||
(cgraph_edge_brings_value_p): Use it.
|
||
(cgraph_edge_brings_value_p): Likewise.
|
||
(self_recursive_pass_through_p): Return false if caller is a clone.
|
||
(self_recursive_agg_pass_through_p): Likewise.
|
||
|
||
2020-02-27 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR middle-end/92152
|
||
* alias.c (ends_tbaa_access_path_p): Break out from ...
|
||
(component_uses_parent_alias_set_from): ... here.
|
||
* alias.h (ends_tbaa_access_path_p): Declare.
|
||
* tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
|
||
handle trailing arrays past end of tbaa access path.
|
||
(aliasing_component_refs_p): ... here; likewise.
|
||
(nonoverlapping_refs_since_match_p): Track TBAA segment of the access
|
||
path; disambiguate also past end of it.
|
||
(nonoverlapping_component_refs_p): Use only TBAA segment of the access
|
||
path.
|
||
|
||
2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
|
||
beginning of the file.
|
||
(vcreate_bf16, vcombine_bf16): New.
|
||
(vdup_n_bf16, vdupq_n_bf16): New.
|
||
(vdup_lane_bf16, vdup_laneq_bf16): New.
|
||
(vdupq_lane_bf16, vdupq_laneq_bf16): New.
|
||
(vduph_lane_bf16, vduph_laneq_bf16): New.
|
||
(vset_lane_bf16, vsetq_lane_bf16): New.
|
||
(vget_lane_bf16, vgetq_lane_bf16): New.
|
||
(vget_high_bf16, vget_low_bf16): New.
|
||
(vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
|
||
(vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
|
||
(vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
|
||
(vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
|
||
(vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
|
||
(vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
|
||
(vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
|
||
(vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
|
||
(vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
|
||
(vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
|
||
(vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
|
||
(vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
|
||
(vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
|
||
(vreinterpretq_bf16_p128): New.
|
||
(vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
|
||
(vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
|
||
(vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
|
||
(vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
|
||
(vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
|
||
(vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
|
||
(vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
|
||
(vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
|
||
(vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
|
||
(vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
|
||
(vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
|
||
(vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
|
||
(vreinterpretq_p128_bf16): New.
|
||
* config/arm/arm_neon_builtins.def (VDX): Add V4BF.
|
||
(V_elem): Likewise.
|
||
(V_elem_l): Likewise.
|
||
(VD_LANE): Likewise.
|
||
(VQX) Add V8BF.
|
||
(V_DOUBLE): Likewise.
|
||
(VDQX): Add V4BF and V8BF.
|
||
(V_two_elem, V_three_elem, V_four_elem): Likewise.
|
||
(V_reg): Likewise.
|
||
(V_HALF): Likewise.
|
||
(V_double_vector_mode): Likewise.
|
||
(V_cmp_result): Likewise.
|
||
(V_uf_sclr): Likewise.
|
||
(V_sz_elem): Likewise.
|
||
(Is_d_reg): Likewise.
|
||
(V_mode_nunits): Likewise.
|
||
* config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
|
||
|
||
2020-02-27 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
|
||
(<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
|
||
(<expander><mode>3<exec>): Likewise.
|
||
(<expander><mode>3): New.
|
||
(v<expander><mode>3): New.
|
||
(<expander><mode>3): New.
|
||
(<expander><mode>3<exec>): Rename to ...
|
||
(<expander>v64si3<exec>): ... this, and change modes to V64SI.
|
||
* config/gcn/gcn.md (mnemonic): Use '%B' for not.
|
||
|
||
2020-02-27 Alexandre Oliva <oliva@adacore.com>
|
||
|
||
* config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
|
||
them alone on vx7.
|
||
|
||
2020-02-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93508
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
|
||
non-_CHK variants. Valueize their length arguments.
|
||
|
||
2020-02-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93953
|
||
* tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
|
||
to the hash-map entry.
|
||
|
||
2020-02-27 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
|
||
|
||
2020-02-27 Mark Williams <mwilliams@fb.com>
|
||
|
||
* dwarf2out.c (file_name_acquire): Call remap_debug_filename.
|
||
* lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
|
||
-ffile-prefix-map and -fmacro-prefix-map.
|
||
* lto-streamer-out.c: Include file-prefix-map.h.
|
||
(lto_output_location): Remap the file part of locations.
|
||
|
||
2020-02-27 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c/93949
|
||
* gimplify.c (gimplify_init_constructor): Don't promote readonly
|
||
DECL_REGISTER variables to TREE_STATIC.
|
||
|
||
PR tree-optimization/93582
|
||
PR tree-optimization/93945
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
|
||
non-zero INTEGER_CST second argument and ref->offset or ref->size
|
||
not a multiple of BITS_PER_UNIT.
|
||
|
||
2020-02-27 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/install.texi (Binaries): Update description of BullFreeware.
|
||
|
||
2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
|
||
|
||
PR c++/90467
|
||
|
||
* doc/invoke.texi (Option Summary): Re-alphabetize warnings in
|
||
C++ Language Options, Warning Options, and Static Analyzer
|
||
Options lists. Document negative form of options enabled by
|
||
default. Move some things around to more accurately sort
|
||
warnings by category.
|
||
(C++ Dialect Options, Warning Options, Static Analyzer
|
||
Options): Document negative form of options when enabled by
|
||
default. Move some things around to more accurately sort
|
||
warnings by category. Add some missing index entries.
|
||
Light copy-editing.
|
||
|
||
2020-02-26 Carl Love <cel@us.ibm.com>
|
||
|
||
PR target/91276
|
||
* doc/extend.texi (PowerPC AltiVec Built-in Functions available on
|
||
ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
|
||
for the vector unsigned short arguments. It is also listed as the
|
||
name of the built-in for arguments vector unsigned short,
|
||
vector unsigned int and vector unsigned long long built-ins. The
|
||
name of the builtins for these arguments should be:
|
||
__builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
|
||
__builtin_crypto_vpmsumd respectively.
|
||
|
||
2020-02-26 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
|
||
and load permutation.
|
||
|
||
2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR middle-end/93843
|
||
* optabs-tree.c (supportable_convert_operation): Reject types with
|
||
scalar modes.
|
||
|
||
2020-02-26 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
|
||
|
||
2020-02-26 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93820
|
||
* gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
|
||
argument to ALL_INTEGER_CST_P boolean.
|
||
(imm_store_chain_info::try_coalesce_bswap): Adjust caller.
|
||
(imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
|
||
adjacent INTEGER_CST store into merged_store->only_constants like
|
||
overlapping one.
|
||
|
||
2020-02-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR other/93912
|
||
* config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
|
||
-> probability.
|
||
* cfghooks.c (verify_flow_info): Likewise.
|
||
* predict.c (combine_predictions_for_bb): Likewise.
|
||
* bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
|
||
sucessor -> successor.
|
||
(find_traces_1_round): Fix comment typo, destinarion -> destination.
|
||
* omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
|
||
successors.
|
||
* tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
|
||
message typo, sucessors -> successors.
|
||
|
||
2020-02-25 Martin Sebor <msebor@redhat.com>
|
||
|
||
* doc/extend.texi (attribute access): Correct an example.
|
||
|
||
2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
|
||
Add simd_bf.
|
||
(aarch64_init_simd_builtin_scalar_types): Register simd_bf.
|
||
(VAR15, VAR16): New.
|
||
* config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
|
||
(VD): Enable for V4BF.
|
||
(VDC): Likewise.
|
||
(VQ): Enable for V8BF.
|
||
(VQ2): Likewise.
|
||
(VQ_NO2E): Likewise.
|
||
(VDBL, Vdbl): Add V4BF.
|
||
(V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
|
||
* config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
|
||
(bfloat16x8x2_t): Likewise.
|
||
(bfloat16x4x3_t): Likewise.
|
||
(bfloat16x8x3_t): Likewise.
|
||
(bfloat16x4x4_t): Likewise.
|
||
(bfloat16x8x4_t): Likewise.
|
||
(vcombine_bf16): New.
|
||
(vld1_bf16, vld1_bf16_x2): New.
|
||
(vld1_bf16_x3, vld1_bf16_x4): New.
|
||
(vld1q_bf16, vld1q_bf16_x2): New.
|
||
(vld1q_bf16_x3, vld1q_bf16_x4): New.
|
||
(vld1_lane_bf16): New.
|
||
(vld1q_lane_bf16): New.
|
||
(vld1_dup_bf16): New.
|
||
(vld1q_dup_bf16): New.
|
||
(vld2_bf16): New.
|
||
(vld2q_bf16): New.
|
||
(vld2_dup_bf16): New.
|
||
(vld2q_dup_bf16): New.
|
||
(vld3_bf16): New.
|
||
(vld3q_bf16): New.
|
||
(vld3_dup_bf16): New.
|
||
(vld3q_dup_bf16): New.
|
||
(vld4_bf16): New.
|
||
(vld4q_bf16): New.
|
||
(vld4_dup_bf16): New.
|
||
(vld4q_dup_bf16): New.
|
||
(vst1_bf16, vst1_bf16_x2): New.
|
||
(vst1_bf16_x3, vst1_bf16_x4): New.
|
||
(vst1q_bf16, vst1q_bf16_x2): New.
|
||
(vst1q_bf16_x3, vst1q_bf16_x4): New.
|
||
(vst1_lane_bf16): New.
|
||
(vst1q_lane_bf16): New.
|
||
(vst2_bf16): New.
|
||
(vst2q_bf16): New.
|
||
(vst3_bf16): New.
|
||
(vst3q_bf16): New.
|
||
(vst4_bf16): New.
|
||
(vst4q_bf16): New.
|
||
|
||
2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
|
||
(VALL_F16): Likewise.
|
||
(VALLDI_F16): Likewise.
|
||
(Vtype): Likewise.
|
||
(Vetype): Likewise.
|
||
(vswap_width_name): Likewise.
|
||
(VSWAP_WIDTH): Likewise.
|
||
(Vel): Likewise.
|
||
(VEL): Likewise.
|
||
(q): Likewise.
|
||
* config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
|
||
(vget_lane_bf16, vgetq_lane_bf16): New.
|
||
(vcreate_bf16): New.
|
||
(vdup_n_bf16, vdupq_n_bf16): New.
|
||
(vdup_lane_bf16, vdup_laneq_bf16): New.
|
||
(vdupq_lane_bf16, vdupq_laneq_bf16): New.
|
||
(vduph_lane_bf16, vduph_laneq_bf16): New.
|
||
(vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
|
||
(vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
|
||
(vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
|
||
(vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
|
||
(vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
|
||
(vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
|
||
(vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
|
||
(vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
|
||
(vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
|
||
(vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
|
||
(vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
|
||
(vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
|
||
(vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
|
||
(vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
|
||
(vreinterpretq_bf16_p128): New.
|
||
(vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
|
||
(vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
|
||
(vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
|
||
(vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
|
||
(vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
|
||
(vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
|
||
(vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
|
||
(vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
|
||
(vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
|
||
(vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
|
||
(vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
|
||
(vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
|
||
(vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
|
||
(vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
|
||
(vreinterpretq_p128_bf16): New.
|
||
|
||
2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
|
||
|
||
* config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
|
||
(vbfdot_lane_f32, vbfdotq_laneq_f32): New.
|
||
(vbfdot_laneq_f32, vbfdotq_lane_f32): New.
|
||
* config/arm/arm_neon_builtins.def (vbfdot): New entry.
|
||
(vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
|
||
* config/arm/iterators.md (VSF2BF): New attribute.
|
||
* config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
|
||
(neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
|
||
(neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
|
||
|
||
2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
|
||
|
||
* config/arm/arm.md (required_for_purecode): New attribute.
|
||
(enabled): Handle required_for_purecode.
|
||
* config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
|
||
work with -mpure-code.
|
||
|
||
2020-02-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/93908
|
||
* combine.c (find_split_point): For store into ZERO_EXTRACT, and src
|
||
with mask.
|
||
|
||
2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
* dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
|
||
|
||
2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
|
||
|
||
* doc/install.texi (--enable-checking): Adjust wording.
|
||
|
||
2020-02-25 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93868
|
||
* tree-vect-slp.c (slp_copy_subtree): New function.
|
||
(vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
|
||
re-arranging stmts in it.
|
||
|
||
2020-02-25 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/93874
|
||
* passes.c (pass_manager::dump_passes): Create a cgraph node for the
|
||
dummy function and remove it at the end.
|
||
|
||
PR translation/93864
|
||
* config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
|
||
paramter -> parameter.
|
||
* config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
|
||
* ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
|
||
|
||
2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
|
||
|
||
* doc/install.texi (--enable-checking): Properly document current
|
||
behavior.
|
||
(--enable-stage1-checking): Minor clarification about bootstrap.
|
||
|
||
2020-02-24 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR analyzer/93032
|
||
* doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
|
||
-fanalyzer-checker=taint is also required.
|
||
(-fanalyzer-checker=): Note that providing this option enables the
|
||
given checker, and doing so may be required for checkers that are
|
||
disabled by default.
|
||
|
||
2020-02-24 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
|
||
significant control flow events; add a "3" which shows all
|
||
control flow events; the old "3" becomes "4".
|
||
|
||
2020-02-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93582
|
||
* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
|
||
pd.offset and pd.size to be counted in bits rather than bytes, add
|
||
support for maxsizei that is not a multiple of BITS_PER_UNIT and
|
||
handle bitfield stores and loads.
|
||
(vn_reference_lookup_3): Don't call ranges_known_overlap_p with
|
||
uncomparable quantities - bytes vs. bits. Allow push_partial_def
|
||
on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
|
||
pd.offset/pd.size to be counted in bits rather than bytes.
|
||
Formatting fix. Rename shadowed len variable to buflen.
|
||
|
||
2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
|
||
Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
|
||
|
||
PR driver/47785
|
||
* gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
|
||
(driver::main): Call putenv_COLLECT_AS_OPTIONS.
|
||
* opts-common.c (parse_options_from_collect_gcc_options): New function.
|
||
(prepend_xassembler_to_collect_as_options): Likewise.
|
||
* opts.h (parse_options_from_collect_gcc_options): Declare prototype.
|
||
(prepend_xassembler_to_collect_as_options): Likewise.
|
||
* lto-opts.c (lto_write_options): Stream assembler options
|
||
in COLLECT_AS_OPTIONS.
|
||
* lto-wrapper.c (xassembler_options_error): New static variable.
|
||
(get_options_from_collect_gcc_options): Move parsing options code to
|
||
parse_options_from_collect_gcc_options and call it.
|
||
(merge_and_complain): Validate -Xassembler options.
|
||
(append_compiler_options): Handle OPT_Xassembler.
|
||
(run_gcc): Append command line -Xassembler options to
|
||
collect_gcc_options.
|
||
* doc/invoke.texi: Add documentation about using Xassembler
|
||
options with LTO.
|
||
|
||
2020-02-24 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
|
||
for LTGT.
|
||
(riscv_rtx_costs): Update cost model for LTGT.
|
||
|
||
2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/93564
|
||
* ira-color.c (struct update_cost_queue_elem): New member start.
|
||
(queue_update_cost, get_next_update_cost): Add new arg start.
|
||
(allocnos_conflict_p): New function.
|
||
(update_costs_from_allocno): Add new arg conflict_cost_update_p.
|
||
Add checking conflicts with allocnos_conflict_p.
|
||
(update_costs_from_prefs, restore_costs_from_copies): Adjust
|
||
update_costs_from_allocno calls.
|
||
(update_conflict_hard_regno_costs): Add checking conflicts with
|
||
allocnos_conflict_p. Adjust calls of queue_update_cost and
|
||
get_next_update_cost.
|
||
(assign_hard_reg): Adjust calls of queue_update_cost. Add
|
||
debugging print.
|
||
(bucket_allocno_compare_func): Restore previous version.
|
||
|
||
2020-02-21 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* gcc/config/pa/pa.c (pa_function_value): Fix check for word and
|
||
double-word size when handling aggregate return values.
|
||
* gcc/config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
|
||
that homogeneous SFmode and DFmode aggregates are passed and returned
|
||
in general registers.
|
||
|
||
2020-02-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR translation/93759
|
||
* opts.c (print_filtered_help): Translate help before appending
|
||
messages to it rather than after that.
|
||
|
||
2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/PR92989
|
||
* lra-lives.c (process_bb_lives): Restore the original order
|
||
of the bb liveness update. Call make_hard_regno_dead for each
|
||
register clobbered at the start of an EH receiver.
|
||
|
||
2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
|
||
|
||
PR ipa/93763
|
||
* ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
|
||
self-recursively generated.
|
||
|
||
2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
PR target/93860
|
||
* config/darwin-c.c (pop_field_alignment): Adjust quoting of
|
||
error string.
|
||
|
||
2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* doc/sourcebuild.texi (arm_v8_1m_mve_ok):
|
||
Document new target supports option.
|
||
|
||
2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
|
||
|
||
* config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
|
||
* config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
|
||
* config/arm/iterators.md (MATMUL): New iterator.
|
||
(sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
|
||
(mmla_sfx): New attribute.
|
||
* config/arm/neon.md (neon_<sup>mmlav16qi): New.
|
||
* config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
|
||
(UNSPEC_MATMUL_US): New.
|
||
|
||
2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* config/arm/arm.md: Prevent scalar shifts from being used when big
|
||
endian is enabled.
|
||
|
||
2020-02-21 Jan Hubicka <hubicka@ucw.cz>
|
||
Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93586
|
||
* tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
|
||
after mismatched array refs; do not sure type size information to
|
||
recover from unmatched referneces with !flag_strict_aliasing_p.
|
||
|
||
2020-02-21 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
|
||
(gather_load<mode>v64si): ... this and set operand 2 to V64SI.
|
||
(scatter_store<mode>): Rename to ...
|
||
(scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
|
||
(scatter<mode>_exec): Delete. Move contents ...
|
||
(mask_scatter_store<mode>): ... here, and rename that to ...
|
||
(mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
|
||
Remove mode conversion.
|
||
(mask_gather_load<mode>): Rename to ...
|
||
(mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
|
||
Remove mode conversion.
|
||
* config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
|
||
|
||
2020-02-21 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/93845
|
||
* tree-sra.c (verify_sra_access_forest): Only test access size of
|
||
scalar types.
|
||
|
||
2020-02-21 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
|
||
* config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
|
||
(addv64di3_exec): Likewise.
|
||
(subv64di3): Likewise.
|
||
(subv64di3_exec): Likewise.
|
||
(addv64di3_zext): Likewise.
|
||
(addv64di3_zext_exec): Likewise.
|
||
(addv64di3_zext_dup): Likewise.
|
||
(addv64di3_zext_dup_exec): Likewise.
|
||
(addv64di3_zext_dup2): Likewise.
|
||
(addv64di3_zext_dup2_exec): Likewise.
|
||
(addv64di3_sext_dup2): Likewise.
|
||
(addv64di3_sext_dup2_exec): Likewise.
|
||
(<expander>v64di3): Likewise.
|
||
(<expander>v64di3_exec): Likewise.
|
||
(*<reduc_op>_dpp_shr_v64di): Likewise.
|
||
(*plus_carry_dpp_shr_v64di): Likewise.
|
||
* config/gcn/gcn.md (adddi3): Likewise.
|
||
(addptrdi3): Likewise.
|
||
(<expander>di3): Likewise.
|
||
|
||
2020-02-21 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
|
||
|
||
2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
|
||
support. Use aarch64_emit_mult instead of emitting multiplication
|
||
instructions directly.
|
||
* config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
|
||
(@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
|
||
|
||
2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_emit_mult): New function.
|
||
(aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
|
||
instead of emitting multiplication instructions directly.
|
||
* config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
|
||
* config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
|
||
(@aarch64_frecps<mode>): New expanders.
|
||
|
||
2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
|
||
on and produce uint64_ts rather than ints.
|
||
(AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
|
||
(cpu_approx_modes): Change the fields from unsigned int to uint64_t.
|
||
|
||
2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
|
||
an unused xmsk register when handling approximate rsqrt.
|
||
|
||
2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
|
||
flag_finite_math_only condition.
|
||
|
||
2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/93828
|
||
* config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
|
||
to destination operand for shufps alternative.
|
||
(*vec_extractv2si_1): Ditto.
|
||
|
||
2020-02-20 Peter Bergner <bergner@linux.ibm.com>
|
||
|
||
PR target/93658
|
||
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
|
||
vector modes.
|
||
|
||
2020-02-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR translation/93831
|
||
* config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
|
||
|
||
2020-02-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR translation/93830
|
||
* common/config/avr/avr-common.c: Remote trailing "|".
|
||
|
||
2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
* collect2.c (maybe_run_lto_and_relink): Fix typo in
|
||
comment.
|
||
|
||
2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/93767
|
||
* tree-vect-data-refs.c (vect_compile_time_alias): Remove the
|
||
access-size bias from the offset calculations for negative strides.
|
||
|
||
2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
* collect2.c (c_file, o_file): Make const again.
|
||
(ldout,lderrout, dump_ld_file): Remove.
|
||
(tool_cleanup): Avoid calling not signal-safe functions.
|
||
(maybe_run_lto_and_relink): Avoid possible signal handler
|
||
access to unintialzed memory (lto_o_files).
|
||
(main): Avoid leaking temp files in $TMPDIR.
|
||
Initialize c_file/o_file with concat, which avoids exposing
|
||
uninitialized memory to signal handler, which calls unlink(!).
|
||
Avoid calling maybe_unlink when the main function returns,
|
||
since the atexit handler is already doing this.
|
||
* collect2.h (dump_ld_file, ldout, lderrout): Remove.
|
||
|
||
2020-02-19 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/93776
|
||
* tree-sra.c (create_access): Do not create zero size accesses.
|
||
(get_access_for_expr): Do not search for zero sized accesses.
|
||
|
||
2020-02-19 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/93667
|
||
* tree-sra.c (scalarizable_type_p): Return false if record fields
|
||
do not follow wach other.
|
||
|
||
2020-01-21 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
|
||
rather than fmv.x.s/fmv.s.x.
|
||
|
||
2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(intrinsic_vec_smult_lo_): New.
|
||
(intrinsic_vec_umult_lo_): Likewise.
|
||
(vec_widen_smult_hi_): Likewise.
|
||
(vec_widen_umult_hi_): Likewise.
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
|
||
* config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
|
||
(vmull_high_s16): Likewise.
|
||
(vmull_high_s32): Likewise.
|
||
(vmull_high_u8): Likewise.
|
||
(vmull_high_u16): Likewise.
|
||
(vmull_high_u32): Likewise.
|
||
(vmull_s8): Likewise.
|
||
(vmull_s16): Likewise.
|
||
(vmull_s32): Likewise.
|
||
(vmull_u8): Likewise.
|
||
(vmull_u16): Likewise.
|
||
(vmull_u32): Likewise.
|
||
|
||
2020-02-18 Martin Liska <mliska@suse.cz>
|
||
|
||
* value-prof.c (stream_out_histogram_value): Restore LTO PGO
|
||
bootstrap by missing removal of invalid sanity check.
|
||
|
||
2020-02-18 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/92518
|
||
* ipa-icf-gimple.c (func_checker::compare_gimple_assign):
|
||
Always compare LHS of gimple_assign.
|
||
|
||
2020-02-18 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/93583
|
||
* cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
|
||
and return type of functions.
|
||
* ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
|
||
Drop MALLOC attribute for void functions.
|
||
* ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
|
||
malloc_state for a new VOID clone.
|
||
|
||
2020-02-18 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/92924
|
||
* common.opt: Add -fprofile-reproducibility.
|
||
* doc/invoke.texi: Document it.
|
||
* value-prof.c (dump_histogram_value):
|
||
Document and support behavior for counters[0]
|
||
being a negative value.
|
||
(get_nth_most_common_value): Handle negative
|
||
counters[0] in respect to flag_profile_reproducible.
|
||
|
||
2020-02-18 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR ipa/93797
|
||
* cgraph.c (verify_speculative_call): Use speculative_id instead of
|
||
speculative_uid in messages. Remove trailing whitespace from error
|
||
message. Use num_speculative_call_targets instead of
|
||
num_speculative_targets in a message.
|
||
(cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
|
||
edge messages and stmt instead of cal_stmt in reference message.
|
||
|
||
PR tree-optimization/93780
|
||
* tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
|
||
before calling build_vector_type.
|
||
(execute_update_addresses_taken): Likewise.
|
||
|
||
PR driver/93796
|
||
* params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
|
||
typo, functoin -> function.
|
||
* tree.c (free_lang_data_in_decl): Fix comment typo,
|
||
functoin -> function.
|
||
* ipa-visibility.c (cgraph_externally_visible_p): Likewise.
|
||
|
||
2020-02-17 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
|
||
won't be printed.
|
||
(print_option_information): Don't call get_option_url if URLs
|
||
won't be printed.
|
||
|
||
2020-02-17 Alexandre Oliva <oliva@adacore.com>
|
||
|
||
* tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
|
||
handling of register_common-less targets.
|
||
|
||
2020-02-17 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/93760
|
||
* ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
|
||
|
||
2020-02-17 Martin Liska <mliska@suse.cz>
|
||
|
||
PR translation/93755
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal):
|
||
Fix double quotes.
|
||
|
||
2020-02-17 Martin Liska <mliska@suse.cz>
|
||
|
||
PR other/93756
|
||
* config/rx/elf.opt: Fix typo.
|
||
|
||
2020-02-17 Richard Biener <rguenther@suse.de>
|
||
|
||
PR c/86134
|
||
* opts-global.c (print_ignored_options): Use inform and
|
||
amend message.
|
||
|
||
2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
|
||
|
||
PR target/93047
|
||
* config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
|
||
|
||
2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/93743
|
||
* config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
|
||
(atan2<mode>3): Update operand order in the call to gen_atan2xf3.
|
||
|
||
2020-02-15 Jason Merrill <jason@redhat.com>
|
||
|
||
* doc/invoke.texi (C Dialect Options): Add -std=c++20.
|
||
|
||
2020-02-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93744
|
||
* match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
|
||
A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
|
||
A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
|
||
sure @2 in the first and @1 in the other patterns has no side-effects.
|
||
|
||
2020-02-15 David Malcolm <dmalcolm@redhat.com>
|
||
Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
PR 87488
|
||
PR other/93168
|
||
* config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
|
||
* configure.ac (--with-diagnostics-urls): New configuration
|
||
option, based on --with-diagnostics-color.
|
||
(DIAGNOSTICS_URLS_DEFAULT): New define.
|
||
* config.h: Regenerate.
|
||
* configure: Regenerate.
|
||
* diagnostic.c (diagnostic_urls_init): Handle -1 for
|
||
DIAGNOSTICS_URLS_DEFAULT from configure-time
|
||
--with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
|
||
and TERM_URLS environment variable.
|
||
* diagnostic-url.h (diagnostic_url_format): New enum type.
|
||
(diagnostic_urls_enabled_p): rename to...
|
||
(determine_url_format): ... this, and change return type.
|
||
* diagnostic-color.c (parse_env_vars_for_urls): New helper function.
|
||
(auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
|
||
the linux console, and mingw.
|
||
(diagnostic_urls_enabled_p): rename to...
|
||
(determine_url_format): ... this, and adjust.
|
||
* pretty-print.h (pretty_printer::show_urls): rename to...
|
||
(pretty_printer::url_format): ... this, and change to enum.
|
||
* pretty-print.c (pretty_printer::pretty_printer,
|
||
pp_begin_url, pp_end_url, test_urls): Adjust.
|
||
* doc/install.texi (--with-diagnostics-urls): Document the new
|
||
configuration option.
|
||
(--with-diagnostics-color): Document the existing interaction
|
||
with GCC_COLORS better.
|
||
* doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
|
||
vindex reference. Update description of defaults based on the above.
|
||
(-fdiagnostics-color): Update description of how -fdiagnostics-color
|
||
interacts with GCC_COLORS.
|
||
|
||
2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
|
||
|
||
PR target/93704
|
||
* config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
|
||
conjunction with TARGET_GNU_TLS in early return.
|
||
|
||
2020-02-14 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
* rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
|
||
the mode is not wider than UNITS_PER_WORD.
|
||
|
||
2020-02-14 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/93516
|
||
* tree-sra.c (propagate_subaccesses_from_rhs): Do not create
|
||
access of the same type as the parent.
|
||
(propagate_subaccesses_from_lhs): Likewise.
|
||
|
||
2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
|
||
|
||
PR target/93724
|
||
* config/i386/avx512vbmi2intrin.h
|
||
(_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
|
||
_mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
|
||
_mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
|
||
_m512_shrdi_epi64, _m512_mask_shrdi_epi64,
|
||
_m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
|
||
_mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
|
||
_mm512_shldi_epi32, _mm512_mask_shldi_epi32,
|
||
_mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
|
||
_mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
|
||
of lacking a closing parenthesis.
|
||
* config/i386/avx512vbmi2vlintrin.h
|
||
(_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
|
||
_mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
|
||
_mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
|
||
_m256_shrdi_epi64, _m256_mask_shrdi_epi64,
|
||
_m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
|
||
_mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
|
||
_mm256_shldi_epi32, _mm256_mask_shldi_epi32,
|
||
_mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
|
||
_mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
|
||
_mm_shrdi_epi16, _mm_mask_shrdi_epi16,
|
||
_mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
|
||
_mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
|
||
_mm_shrdi_epi64, _mm_mask_shrdi_epi64,
|
||
_m_maskz_shrdi_epi64, _mm_shldi_epi16,
|
||
_mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
|
||
_mm_shldi_epi32, _mm_mask_shldi_epi32,
|
||
_mm_maskz_shldi_epi32, _mm_shldi_epi64,
|
||
_mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
|
||
|
||
2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/93656
|
||
* config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
|
||
the target function entry.
|
||
|
||
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* common/config/arc/arc-common.c (arc_option_optimization_table):
|
||
Disable if-conversion step when optimized for size.
|
||
|
||
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
|
||
R12-R15 are always in ARCOMPACT16_REGS register class.
|
||
* config/arc/arc.opt (mq-class): Deprecate.
|
||
* config/arc/constraint.md ("q"): Remove dependency on mq-class
|
||
option.
|
||
* doc/invoke.texi (mq-class): Update text.
|
||
* common/config/arc/arc-common.c (arc_option_optimization_table):
|
||
Update list.
|
||
|
||
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_insn_cost): New function.
|
||
(TARGET_INSN_COST): Define.
|
||
* config/arc/arc.md (cost): New attribute.
|
||
(add_n): Use arc_nonmemory_operand.
|
||
(ashlsi3_insn): Likewise, also update constraints.
|
||
(ashrsi3_insn): Likewise.
|
||
(rotrsi3): Likewise.
|
||
(add_shift): Likewise.
|
||
* config/arc/predicates.md (arc_nonmemory_operand): New predicate.
|
||
|
||
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
|
||
registers.
|
||
(umulsidi_600): Likewise.
|
||
|
||
2020-02-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93696
|
||
* config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
|
||
_mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
|
||
_mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
|
||
_mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
|
||
pass __A to the builtin followed by __W instead of __A followed by
|
||
__B.
|
||
* config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
|
||
_mm512_mask_popcnt_epi64): Likewise.
|
||
* config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
|
||
_mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
|
||
_mm256_mask_popcnt_epi64): Likewise.
|
||
|
||
PR tree-optimization/93582
|
||
* fold-const.h (shift_bytes_in_array_left,
|
||
shift_bytes_in_array_right): Declare.
|
||
* fold-const.c (shift_bytes_in_array_left,
|
||
shift_bytes_in_array_right): New function, moved from
|
||
gimple-ssa-store-merging.c, no longer static.
|
||
* gimple-ssa-store-merging.c (shift_bytes_in_array): Move
|
||
to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
|
||
(shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
|
||
(encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
|
||
shift_bytes_in_array.
|
||
(verify_shift_bytes_in_array): Rename to ...
|
||
(verify_shift_bytes_in_array_left): ... this. Use
|
||
shift_bytes_in_array_left instead of shift_bytes_in_array.
|
||
(store_merging_c_tests): Call verify_shift_bytes_in_array_left
|
||
instead of verify_shift_bytes_in_array.
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
|
||
/ native_interpret_expr where the store covers all needed bits,
|
||
punt on PDP-endian, otherwise allow all involved offsets and sizes
|
||
not to be byte-aligned.
|
||
|
||
PR target/93673
|
||
* config/i386/sse.md (k<code><mode>): Drop mode from last operand and
|
||
use const_0_to_255_operand predicate instead of immediate_operand.
|
||
(avx512dq_fpclass<mode><mask_scalar_merge_name>,
|
||
avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
|
||
vgf2p8affineinvqb_<mode><mask_name>,
|
||
vgf2p8affineqb_<mode><mask_name>): Drop mode from
|
||
const_0_to_255_operand predicated operands.
|
||
|
||
2020-02-12 Jeff Law <law@redhat.com>
|
||
|
||
* config/h8300/h8300.md (comparison shortening peepholes): Use
|
||
a mode iterator to merge the HImode and SImode peepholes.
|
||
|
||
2020-02-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR middle-end/93663
|
||
* real.c (is_even): Make static. Function comment fix.
|
||
(is_halfway_below): Make static, don't assert R is not inf/nan,
|
||
instead return false for those. Small formatting fixes.
|
||
|
||
2020-02-12 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR middle-end/93646
|
||
* tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
|
||
(handle_builtin_stxncpy_strncat): ...to this. Change first argument.
|
||
Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
|
||
(strlen_check_and_optimize_call): Adjust callee name.
|
||
|
||
2020-02-12 Jeff Law <law@redhat.com>
|
||
|
||
* config/h8300/h8300.md (comparison shortening peepholes): Drop
|
||
(and (xor)) variant. Combine other two into single peephole.
|
||
|
||
2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR rtl-optimization/93565
|
||
* config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
|
||
|
||
2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
|
||
* config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
|
||
generating separate ADDV and zero_extend patterns.
|
||
* config/aarch64/iterators.md (VDQV_E): New iterator.
|
||
|
||
2020-02-12 Jeff Law <law@redhat.com>
|
||
|
||
* config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
|
||
expanders, splits, etc.
|
||
(movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
|
||
(stpcpy_internal_<mode>, stpcpy splitter): Likewise.
|
||
(peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
|
||
* config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
|
||
(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
|
||
* config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
|
||
function prototype.
|
||
(h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
|
||
|
||
2020-02-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93670
|
||
* config/i386/sse.md (VI48F_256_DQ): New mode iterator.
|
||
(avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
|
||
TARGET_AVX512DQ from condition.
|
||
(vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
|
||
instead of <mask_mode512bit_condition> in condition. If
|
||
TARGET_AVX512DQ is false, emit vextract*64x4 instead of
|
||
vextract*32x8.
|
||
(vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
|
||
from condition.
|
||
|
||
2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
|
||
|
||
PR target/91052
|
||
* ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
|
||
|
||
2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
|
||
where strlen is more legible.
|
||
(rs6000_builtin_vectorized_libmass): Ditto.
|
||
(rs6000_print_options_internal): Ditto.
|
||
|
||
2020-02-11 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/93683
|
||
* tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
|
||
|
||
2020-02-11 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/predicates.md (cint34_operand): Rename the
|
||
-mprefixed-addr option to be -mprefixed.
|
||
* config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
|
||
the -mprefixed-addr option to be -mprefixed.
|
||
(OTHER_FUTURE_MASKS): Likewise.
|
||
(POWERPC_MASKS): Likewise.
|
||
* config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
|
||
the -mprefixed-addr option to be -mprefixed. Change error
|
||
messages to refer to -mprefixed.
|
||
(num_insns_constant_gpr): Rename the -mprefixed-addr option to be
|
||
-mprefixed.
|
||
(rs6000_legitimate_offset_address_p): Likewise.
|
||
(rs6000_mode_dependent_address): Likewise.
|
||
(rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
|
||
"-mprefixed" for target attributes and pragmas.
|
||
(address_to_insn_form): Rename the -mprefixed-addr option to be
|
||
-mprefixed.
|
||
(rs6000_adjust_insn_length): Likewise.
|
||
* config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
|
||
-mprefixed-addr option to be -mprefixed.
|
||
(ASM_OUTPUT_OPCODE): Likewise.
|
||
* config/rs6000/rs6000.md (prefixed insn attribute): Rename the
|
||
-mprefixed-addr option to be -mprefixed.
|
||
* config/rs6000/rs6000.opt (-mprefixed): Rename the
|
||
-mprefixed-addr option to be prefixed. Change the option from
|
||
being undocumented to being documented.
|
||
* doc/invoke.texi (RS/6000 and PowerPC Options): Document the
|
||
-mprefixed option. Update the -mpcrel documentation to mention
|
||
-mprefixed.
|
||
|
||
2020-02-11 Hans-Peter Nilsson <hp@axis.com>
|
||
|
||
* ira-conflicts.c (print_hard_reg_set): Correct output for sets
|
||
including FIRST_PSEUDO_REGISTER - 1.
|
||
* ira-color.c (print_hard_reg_set): Ditto.
|
||
|
||
2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config/arm/arm-builtins.c (enum arm_type_qualifiers):
|
||
(USTERNOP_QUALIFIERS): New define.
|
||
(USMAC_LANE_QUADTUP_QUALIFIERS): New define.
|
||
(SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
|
||
(arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
|
||
(arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
|
||
* config/arm/arm_neon.h (vusdot_s32): New.
|
||
(vusdot_lane_s32): New.
|
||
(vusdotq_lane_s32): New.
|
||
(vsudot_lane_s32): New.
|
||
(vsudotq_lane_s32): New.
|
||
* config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
|
||
* config/arm/iterators.md (DOTPROD_I8MM): New.
|
||
(sup, opsuffix): Add <us/su>.
|
||
* config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
|
||
* config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
|
||
|
||
2020-02-11 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93661
|
||
PR tree-optimization/93662
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
|
||
tree_to_poly_int64.
|
||
* tree-sra.c (get_access_for_expr): Likewise.
|
||
|
||
2020-02-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93637
|
||
* config/i386/sse.md (VI_256_AVX2): New mode iterator.
|
||
(vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
|
||
Change condition from TARGET_AVX2 to TARGET_AVX.
|
||
|
||
2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
PR other/93641
|
||
* config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
|
||
argument of strncmp.
|
||
|
||
2020-02-10 Hans-Peter Nilsson <hp@axis.com>
|
||
|
||
Try to generate zero-based comparisons.
|
||
* config/cris/cris.c (cris_reduce_compare): New function.
|
||
* config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
|
||
* config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
|
||
(cstore<mode>4"): Apply cris_reduce_compare in expanders.
|
||
|
||
2020-02-10 Richard Earnshaw <rearnsha@arm.com>
|
||
|
||
PR target/91913
|
||
* config/arm/arm.md (movsi_compare0): Allow SP as a source register
|
||
in Thumb state and also as a destination in Arm state. Add T16
|
||
variants.
|
||
|
||
2020-02-10 Hans-Peter Nilsson <hp@axis.com>
|
||
|
||
* md.texi (Define Subst): Match closing paren in example.
|
||
|
||
2020-02-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/58218
|
||
PR other/93641
|
||
* config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
|
||
arguments of strncmp.
|
||
|
||
2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
|
||
|
||
PR ipa/93203
|
||
* ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
|
||
but different source value.
|
||
(adjust_callers_for_value_intersection): New function.
|
||
(gather_edges_for_value): Adjust order of callers to let a
|
||
non-self-recursive caller be the first element.
|
||
(self_recursive_pass_through_p): Add a new parameter "simple", and
|
||
check generalized self-recursive pass-through jump function.
|
||
(self_recursive_agg_pass_through_p): Likewise.
|
||
(find_more_scalar_values_for_callers_subset): Compute value from
|
||
pass-through jump function for self-recursive.
|
||
(intersect_with_plats): Cleanup previous implementation code for value
|
||
itersection with self-recursive call edge.
|
||
(intersect_with_agg_replacements): Likewise.
|
||
(intersect_aggregates_with_edge): Deduce value from pass-through jump
|
||
function for self-recursive call edge. Cleanup previous implementation
|
||
code for value intersection with self-recursive call edge.
|
||
(decide_whether_version_node): Remove dead callers and adjust order
|
||
to let a non-self-recursive caller be the first element.
|
||
|
||
2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* recog.c: Move pass_split_before_sched2 code in front of
|
||
pass_split_before_regstack.
|
||
(pass_data_split_before_sched2): Rename pass to split3 from split4.
|
||
(pass_data_split_before_regstack): Rename pass to split4 from split3.
|
||
(rest_of_handle_split_before_sched2): Remove.
|
||
(pass_split_before_sched2::execute): Unconditionally call
|
||
split_all_insns.
|
||
(enable_split_before_sched2): New function.
|
||
(pass_split_before_sched2::gate): Use enable_split_before_sched2.
|
||
(pass_split_before_regstack::gate): Ditto.
|
||
* config/nds32/nds32.c (nds32_split_double_word_load_store_p):
|
||
Update name check for renamed split4 pass.
|
||
* config/sh/sh.c (register_sh_passes): Update pass insertion
|
||
point for renamed split4 pass.
|
||
|
||
2020-02-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* gimplify.c (gimplify_adjust_omp_clauses_1): Promote
|
||
DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
|
||
copying them around between host and target.
|
||
|
||
2020-02-08 Andrew Pinski <apinski@marvell.com>
|
||
|
||
PR target/91927
|
||
* config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
|
||
STRICT_ALIGNMENT also.
|
||
|
||
2020-02-08 Jim Wilson <jimw@sifive.com>
|
||
|
||
PR target/93532
|
||
* config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
|
||
|
||
2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
|
||
Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/65782
|
||
* config/i386/i386.h (CALL_USED_REGISTERS): Make
|
||
xmm16-xmm31 call-used even in 64-bit ms-abi.
|
||
|
||
2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
|
||
(simd_ummla, simd_usmmla): Likewise.
|
||
* config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
|
||
* config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
|
||
(vusmmlaq_s32): New.
|
||
|
||
2020-02-07 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93519
|
||
* tree-inline.c (fold_marked_statements): Do a PRE walk,
|
||
skipping unreachable regions.
|
||
(optimize_inline_calls): Skip folding stmts when we didn't
|
||
inline.
|
||
|
||
2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/85667
|
||
* config/i386/i386.c (function_arg_ms_64): Add a type argument.
|
||
Don't return aggregates with only SFmode and DFmode in SSE
|
||
register.
|
||
(ix86_function_arg): Pass arg.type to function_arg_ms_64.
|
||
|
||
2020-02-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93122
|
||
* config/rs6000/rs6000-logue.c
|
||
(rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
|
||
if it fails, move rs into end_addr and retry. Add
|
||
REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
|
||
the insn pattern doesn't describe well what exactly happens to
|
||
dwarf2cfi.c.
|
||
|
||
PR target/93594
|
||
* config/i386/predicates.md (avx_identity_operand): Remove.
|
||
* config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
|
||
(avx_<castmode><avxsizesuffix>_<castmode>,
|
||
avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
|
||
a VEC_CONCAT of the operand and UNSPEC_CAST.
|
||
(avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
|
||
a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
|
||
UNSPEC_CAST.
|
||
|
||
PR target/93611
|
||
* config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
|
||
recog_data.insn if distance_non_agu_define changed it.
|
||
|
||
2020-02-06 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
PR target/93569
|
||
* config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
|
||
we only had X-FORM (reg+reg) addressing for vectors. Also before
|
||
ISA 3.0, we only had X-FORM addressing for scalars in the
|
||
traditional Altivec registers.
|
||
|
||
2020-02-06 <zhongyunde@huawei.com>
|
||
Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/93561
|
||
* lra-assigns.c (spill_for): Check that tested hard regno is not out of
|
||
hard register range.
|
||
|
||
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
|
||
attribute.
|
||
|
||
2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
|
||
where the low and the high 32 bits are equal to each other specially,
|
||
with an rldimi instruction.
|
||
|
||
2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
|
||
|
||
2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* config/arm/arm-tables.opt: Regenerate.
|
||
|
||
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/87763
|
||
* config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
|
||
* config/aarch64/aarch64.c (aarch64_movk_shift): New function.
|
||
* config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
|
||
|
||
2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/87763
|
||
* config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
|
||
|
||
2020-02-06 Delia Burduv <delia.burduv@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def
|
||
(bfmlaq): New built-in function.
|
||
(bfmlalb): New built-in function.
|
||
(bfmlalt): New built-in function.
|
||
(bfmlalb_lane): New built-in function.
|
||
(bfmlalt_lane): New built-in function.
|
||
* config/aarch64/aarch64-simd.md
|
||
(aarch64_bfmmlaqv4sf): New pattern.
|
||
(aarch64_bfmlal<bt>v4sf): New pattern.
|
||
(aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
|
||
* config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
|
||
(vbfmlalbq_f32): New intrinsic.
|
||
(vbfmlaltq_f32): New intrinsic.
|
||
(vbfmlalbq_lane_f32): New intrinsic.
|
||
(vbfmlaltq_lane_f32): New intrinsic.
|
||
(vbfmlalbq_laneq_f32): New intrinsic.
|
||
(vbfmlaltq_laneq_f32): New intrinsic.
|
||
* config/aarch64/iterators.md (BF_MLA): New int iterator.
|
||
(bt): New int attribute.
|
||
|
||
2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (*pushtf): Emit "#" instead of
|
||
calling gcc_unreachable in insn output.
|
||
(*pushxf): Ditto.
|
||
(*pushdf): Ditto.
|
||
(*pushsf_rex64): Ditto for alternatives other than 1.
|
||
(*pushsf): Ditto for alternatives other than 1.
|
||
|
||
2020-02-06 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/91971
|
||
PR gcov-profile/93466
|
||
* coverage.c (coverage_init): Revert mangling of
|
||
path into filename. It can lead to huge filename length.
|
||
Creation of subfolders seem more natural.
|
||
|
||
2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
PR target/93300
|
||
* config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
|
||
(arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
|
||
Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
|
||
|
||
2020-02-06 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93594
|
||
* config/i386/predicates.md (avx_identity_operand): New predicate.
|
||
* config/i386/sse.md (*avx_vec_concat<mode>_1): New
|
||
define_insn_and_split.
|
||
|
||
PR libgomp/93515
|
||
* omp-low.c (use_pointer_for_field): For nested constructs, also
|
||
look for map clauses on target construct.
|
||
(scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
|
||
taskreg_nesting_level.
|
||
|
||
PR libgomp/93515
|
||
* gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
|
||
shared clause, call omp_notice_variable on outer context if any.
|
||
|
||
2020-02-05 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/92003
|
||
* symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
|
||
non-zero address even if weak and not yet defined.
|
||
|
||
2020-02-05 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/92765
|
||
* gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
|
||
* tree-ssa-strlen.c (compute_string_length): Remove.
|
||
(determine_min_objsize): Remove.
|
||
(get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
|
||
Avoid using type size as the upper bound on string length.
|
||
(handle_builtin_string_cmp): Add an argument. Adjust.
|
||
(strlen_check_and_optimize_call): Pass additional argument to
|
||
handle_builtin_string_cmp.
|
||
|
||
2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
|
||
(*pushdi2_rex64 peephole2): Unconditionally split after
|
||
epilogue_completed.
|
||
(*ashl<mode>3_doubleword): Ditto.
|
||
(*<shift_insn><mode>3_doubleword): Ditto.
|
||
|
||
2020-02-05 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
PR target/93568
|
||
* config/rs6000/rs6000.c (get_vector_offset): Fix
|
||
|
||
2020-02-05 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
|
||
|
||
2020-02-05 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/analyzer.texi
|
||
(Special Functions for Debugging the Analyzer): Update description
|
||
of __analyzer_dump_exploded_nodes.
|
||
|
||
2020-02-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/92190
|
||
* config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
|
||
include sets and not clobbers in the vzeroupper pattern.
|
||
* config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
|
||
the parallel has 17 (64-bit) or 9 (32-bit) elts.
|
||
(*avx_vzeroupper_1): New define_insn_and_split.
|
||
|
||
PR target/92190
|
||
* recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
|
||
don't run when !optimize.
|
||
(pass_split_before_regstack::gate): For STACK_REGS targets, run even
|
||
when !optimize.
|
||
|
||
2020-02-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/90648
|
||
* genmatch.c (dt_node::gen_kids_1): Emit number of argument
|
||
checks before matching calls.
|
||
|
||
2020-02-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
|
||
function comment typo.
|
||
|
||
PR middle-end/93555
|
||
* omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
|
||
simd_clone_create failed when i == 0, adjust clone->nargs by
|
||
clone->inbranch.
|
||
|
||
2020-02-05 Martin Liska <mliska@suse.cz>
|
||
|
||
PR c++/92717
|
||
* doc/invoke.texi: Document that one should
|
||
not combine ASLR and -fpch.
|
||
|
||
2020-02-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93538
|
||
* match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
|
||
|
||
2020-02-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/91123
|
||
* tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
|
||
(vn_walk_cb_data::last_vuse): New member.
|
||
(vn_walk_cb_data::saved_operands): Likewsie.
|
||
(vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
|
||
(vn_walk_cb_data::push_partial_def): Use finish.
|
||
(vn_reference_lookup_2): Update last_vuse and use finish if
|
||
we've saved operands.
|
||
(vn_reference_lookup_3): Use finish and update calls to
|
||
push_partial_defs everywhere. When translating through
|
||
memcpy or aggregate copies save off operands and alias-set.
|
||
(eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
|
||
operation for redundant store removal.
|
||
|
||
2020-02-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/92819
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
|
||
generating more stmts than before.
|
||
|
||
2020-02-04 Martin Liska <mliska@suse.cz>
|
||
|
||
* config/arm/arm.c (arm_gen_far_branch): Move the function
|
||
outside of selftests.
|
||
|
||
2020-02-03 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
|
||
function to adjust PC-relative vector addresses.
|
||
(rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
|
||
handle vectors with PC-relative addresses.
|
||
|
||
2020-02-03 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
|
||
reference.
|
||
(hard_reg_and_mode_to_addr_mask): Delete.
|
||
(rs6000_adjust_vec_address): If the original vector address
|
||
was REG+REG or REG+OFFSET and the element is not zero, do the add
|
||
of the elements in the original address before adding the offset
|
||
for the vector element. Use address_to_insn_form to validate the
|
||
address using the register being loaded, rather than guessing
|
||
whether the address is a DS-FORM or DQ-FORM address.
|
||
|
||
2020-02-03 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (get_vector_offset): New helper function
|
||
to calculate the offset in memory from the start of a vector of a
|
||
particular element. Add code to keep the element number in
|
||
bounds if the element number is variable.
|
||
(rs6000_adjust_vec_address): Move calculation of offset of the
|
||
vector element to get_vector_offset.
|
||
(rs6000_split_vec_extract_var): Do not do the initial AND of
|
||
element here, move the code to get_vector_offset.
|
||
|
||
2020-02-03 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
|
||
gcc_asserts.
|
||
|
||
2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
|
||
|
||
* config/rs6000/constraints.md: Improve documentation.
|
||
|
||
2020-02-03 Richard Earnshaw <rearnsha@arm.com>
|
||
|
||
PR target/93548
|
||
* config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
|
||
($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
|
||
|
||
2020-02-03 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config.gcc: Remove "carrizo" support.
|
||
* config/gcn/gcn-opts.h (processor_type): Likewise.
|
||
* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
|
||
* config/gcn/gcn.opt (gpu_type): Likewise.
|
||
* config/gcn/t-omp-device: Likewise.
|
||
|
||
2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
PR target/91816
|
||
* config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
|
||
* config/arm/arm.c (arm_gen_far_branch): New function
|
||
arm_gen_far_branch.
|
||
* config/arm/arm.md: Update b<cond> for Thumb2 range checks.
|
||
|
||
2020-02-03 Julian Brown <julian@codesourcery.com>
|
||
Tobias Burnus <tobias@codesourcery.com>
|
||
|
||
* doc/invoke.texi: Update mention of OpenACC version to 2.6.
|
||
|
||
2020-02-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93533
|
||
* config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
|
||
valid RTL to sum up the lowest and second lowest bytes of the popcnt
|
||
result.
|
||
|
||
2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/91333
|
||
* ira-color.c (struct allocno_color_data): Add member
|
||
hard_reg_prefs.
|
||
(init_allocno_threads): Set the member up.
|
||
(bucket_allocno_compare_func): Add compare hard reg
|
||
prefs.
|
||
|
||
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
|
||
|
||
nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
|
||
|
||
* configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
|
||
* config.in: Regenerated.
|
||
* configure: Regenerated.
|
||
* config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
|
||
for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
|
||
(ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
|
||
|
||
2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
|
||
|
||
* configure: Regenerate.
|
||
|
||
2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/91333
|
||
* ira-color.c (bucket_allocno_compare_func): Move conflict hard
|
||
reg preferences comparison up.
|
||
|
||
2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
|
||
aarch64-sve-builtins-base.h.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
|
||
aarch64-sve-builtins-base.cc.
|
||
* config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
|
||
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
|
||
(svcvtnt): Declare.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
|
||
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
|
||
(svcvtnt): New functions.
|
||
* config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
|
||
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
|
||
(svcvtnt): New functions.
|
||
(svcvt): Add a form that converts f32 to bf16.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
|
||
(ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
|
||
Declare.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
|
||
Treat B as bfloat16_t.
|
||
(ternary_bfloat_lane_base): New class.
|
||
(ternary_bfloat_def): Likewise.
|
||
(ternary_bfloat): New shape.
|
||
(ternary_bfloat_lane_def): New class.
|
||
(ternary_bfloat_lane): New shape.
|
||
(ternary_bfloat_lanex2_def): New class.
|
||
(ternary_bfloat_lanex2): New shape.
|
||
(ternary_bfloat_opt_n_def): New class.
|
||
(ternary_bfloat_opt_n): New shape.
|
||
* config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
|
||
* config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
|
||
(@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
|
||
(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
|
||
(@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
|
||
(*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
|
||
(@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
|
||
* config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
|
||
the pattern off the narrow mode instead of the wider one.
|
||
* config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
|
||
(UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
|
||
(sve_fp_op): Handle them.
|
||
(SVE_BFLOAT_TERNARY_LONG): New int itertor.
|
||
(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
|
||
|
||
2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/arm_sve.h: Include arm_bf16.h.
|
||
* config/aarch64/aarch64-modes.def (BF): Move definition before
|
||
VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
|
||
(SVE_MODES): Handle BF modes.
|
||
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
|
||
BF modes.
|
||
(aarch64_full_sve_mode): Likewise.
|
||
* config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
|
||
and VNx32BF.
|
||
(SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
|
||
(Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
|
||
(V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
|
||
(insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
|
||
new SVE BF modes.
|
||
* config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
|
||
type_class_index.
|
||
* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
|
||
(TYPES_all_data): Add bf16.
|
||
(TYPES_reinterpret1, TYPES_reinterpret): Likewise.
|
||
(register_tuple_type): Increase buffer size.
|
||
* config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
|
||
(bf16): New type suffix.
|
||
* config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
|
||
(svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
|
||
(svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
|
||
Change type from all_data to all_arith.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
|
||
(svminp): Likewise.
|
||
|
||
2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
|
||
Matthew Malcomson <matthew.malcomson@arm.com>
|
||
Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
|
||
__ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
|
||
__ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
|
||
__ARM_FEATURE_MATMUL_FP64.
|
||
* config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
|
||
(sve): Add AARCH64_FL_F32MM to the list of extensions that should
|
||
be disabled at the same time.
|
||
(f32mm): New extension.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
|
||
(AARCH64_FL_F64MM): Bump to the next bit up.
|
||
(AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
|
||
(TARGET_SVE_F64MM): New macros.
|
||
* config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
|
||
(UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
|
||
(UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
|
||
(UNSPEC_ZIP2Q): New unspeccs.
|
||
(DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
|
||
(optab, sur, perm_insn): Handle the new unspecs.
|
||
(sve_fp_op): Handle UNSPEC_FMMLA. Resort.
|
||
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
|
||
TARGET_SVE_F64MM instead of separate tests.
|
||
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
|
||
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
|
||
(@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
|
||
(@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
|
||
(@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
|
||
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
|
||
(TYPES_s_signed): New macro.
|
||
(TYPES_s_integer): Use it.
|
||
(TYPES_d_float): New macro.
|
||
(TYPES_d_data): Use it.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
|
||
(ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
|
||
(ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
|
||
(svmmla): New shape.
|
||
(ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
|
||
template parameters.
|
||
(ternary_resize2_lane_base): Likewise.
|
||
(ternary_resize2_base): New class.
|
||
(ternary_qq_lane_base): Likewise.
|
||
(ternary_intq_uintq_lane_def): Likewise.
|
||
(ternary_intq_uintq_lane): New shape.
|
||
(ternary_intq_uintq_opt_n_def): New class
|
||
(ternary_intq_uintq_opt_n): New shape.
|
||
(ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
|
||
(ternary_uintq_intq_def): New class.
|
||
(ternary_uintq_intq): New shape.
|
||
(ternary_uintq_intq_lane_def): New class.
|
||
(ternary_uintq_intq_lane): New shape.
|
||
(ternary_uintq_intq_opt_n_def): New class.
|
||
(ternary_uintq_intq_opt_n): New shape.
|
||
* config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
|
||
(svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
|
||
(svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
|
||
Generalize to...
|
||
(svdotprod_lane_impl): ...this new class.
|
||
(svmmla_impl, svusdot_impl): New classes.
|
||
(svdot_lane): Update to use svdotprod_lane_impl.
|
||
(svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
|
||
(svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
|
||
functions.
|
||
* config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
|
||
function, with no types defined.
|
||
(svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
|
||
AARCH64_FL_I8MM functions.
|
||
(svmmla): New AARCH64_FL_F32MM function.
|
||
(svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
|
||
(svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
|
||
AARCH64_FL_F64MM function.
|
||
(REQUIRED_EXTENSIONS):
|
||
|
||
2020-01-31 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
|
||
alternative only.
|
||
|
||
2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (*movoi_internal_avx): Do not check for
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
|
||
(*movti_internal): Do not check for
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
|
||
(*movtf_internal): Move check for TARGET_SSE2 and size optimization
|
||
just after check for TARGET_AVX.
|
||
(*movdf_internal): Ditto.
|
||
* config/i386/mmx.md (*mov<mode>_internal): Do not check for
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
|
||
* config/i386/sse.md (mov<mode>_internal): Only check
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
|
||
for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
|
||
(<sse>_andnot<mode>3<mask_name>): Move check for
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
|
||
(<code><mode>3<mask_name>): Ditto.
|
||
(*andnot<mode>3): Ditto.
|
||
(*andnottf3): Ditto.
|
||
(*<code><mode>3): Ditto.
|
||
(*<code>tf3): Ditto.
|
||
(*andnot<VI:mode>3): Remove
|
||
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
|
||
(<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
|
||
(*<code><VI12_AVX_AVX512F:mode>3): Ditto.
|
||
(sse4_1_blendv<ssemodesuffix>): Ditto.
|
||
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
|
||
Explain that tune applies to 128bit instructions only.
|
||
|
||
2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
|
||
|
||
* config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
|
||
to definition of hsa_kernel_description. Parse assembly to find SGPR
|
||
and VGPR count of kernel and store in hsa_kernel_description.
|
||
|
||
2020-01-31 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR rtl-optimization/91838
|
||
* simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
|
||
to truncate if allowed or reject combination.
|
||
|
||
2020-01-31 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
|
||
(find_inv_vars_cb): Likewise.
|
||
|
||
2020-01-31 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* calls.c (special_function_p): Split out the check for DECL_NAME
|
||
being non-NULL and fndecl being extern at file scope into a
|
||
new maybe_special_function_p and call it. Drop check for fndecl
|
||
being non-NULL that was after a usage of DECL_NAME (fndecl).
|
||
* tree.h (maybe_special_function_p): New inline function.
|
||
|
||
2020-01-30 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
|
||
(mask_gather_load<mode>): ... here, and zero-initialize the
|
||
destination.
|
||
(maskload<mode>di): Zero-initialize the destination.
|
||
* config/gcn/gcn.c:
|
||
|
||
2020-01-30 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR analyzer/93356
|
||
* doc/analyzer.texi (Limitations): Note that constraints on
|
||
floating-point values are currently ignored.
|
||
|
||
2020-01-30 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR lto/93384
|
||
* symtab.c (symtab_node::noninterposable_alias): If localalias
|
||
already exists, but is not usable, append numbers after it until
|
||
a unique name is found. Formatting fix.
|
||
|
||
PR middle-end/93505
|
||
* combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
|
||
rotate counts.
|
||
|
||
2020-01-30 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn.c (print_operand): Handle LTGT.
|
||
* config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
|
||
|
||
2020-01-30 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
|
||
and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
|
||
|
||
2020-01-30 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
|
||
without a DECL in .data.rel.ro.local.
|
||
|
||
2020-01-30 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93494
|
||
* config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
|
||
returned.
|
||
|
||
PR target/91824
|
||
* config/i386/sse.md
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
|
||
any_extend code iterator instead of always zero_extend.
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
|
||
Use any_extend code iterator instead of always zero_extend.
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
|
||
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
|
||
Use any_extend code iterator instead of always zero_extend.
|
||
(*sse2_pmovmskb_ext): New define_insn.
|
||
(*sse2_pmovmskb_ext_lt): New define_insn_and_split.
|
||
|
||
PR target/91824
|
||
* config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
|
||
(*popcountsi2_zext_falsedep): New define_insn.
|
||
|
||
2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
|
||
|
||
* config.in: Regenerated.
|
||
* configure: Regenerated.
|
||
|
||
2020-01-29 Tobias Burnus <tobias@codesourcery.com>
|
||
|
||
PR bootstrap/93409
|
||
* config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
|
||
LLVM's assembler changed the default in version 9.
|
||
|
||
2020-01-24 Jeff Law <law@redhat.com>
|
||
|
||
PR tree-optimization/89689
|
||
* builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
|
||
|
||
2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
Revert:
|
||
|
||
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/87763
|
||
* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
|
||
simplification to handle subregs as well as bare regs.
|
||
* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
|
||
|
||
2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
|
||
|
||
PR target/93221
|
||
* ira.c (ira): Revert use of simplified LRA algorithm.
|
||
|
||
2020-01-29 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/92706
|
||
* tree-sra.c (struct access): Fields first_link, last_link,
|
||
next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
|
||
next_rhs_queued and grp_rhs_queued respectively, new fields
|
||
first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
|
||
(struct assign_link): Field next renamed to next_rhs, new field
|
||
next_lhs. Updated comment.
|
||
(work_queue_head): Renamed to rhs_work_queue_head.
|
||
(lhs_work_queue_head): New variable.
|
||
(add_link_to_lhs): New function.
|
||
(relink_to_new_repr): Also relink LHS lists.
|
||
(add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
|
||
(add_access_to_lhs_work_queue): New function.
|
||
(pop_access_from_work_queue): Renamed to
|
||
pop_access_from_rhs_work_queue.
|
||
(pop_access_from_lhs_work_queue): New function.
|
||
(build_accesses_from_assign): Also add links to LHS lists and to LHS
|
||
work_queue.
|
||
(child_would_conflict_in_lacc): Renamed to
|
||
child_would_conflict_in_acc. Adjusted parameter names.
|
||
(create_artificial_child_access): New parameter set_grp_read, use it.
|
||
(subtree_mark_written_and_enqueue): Renamed to
|
||
subtree_mark_written_and_rhs_enqueue.
|
||
(propagate_subaccesses_across_link): Renamed to
|
||
propagate_subaccesses_from_rhs.
|
||
(propagate_subaccesses_from_lhs): New function.
|
||
(propagate_all_subaccesses): Also propagate subaccesses from LHSs to
|
||
RHSs.
|
||
|
||
2020-01-29 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR tree-optimization/92706
|
||
* tree-sra.c (struct access): Adjust comment of
|
||
grp_total_scalarization.
|
||
(find_access_in_subtree): Look for single children spanning an entire
|
||
access.
|
||
(scalarizable_type_p): Allow register accesses, adjust callers.
|
||
(completely_scalarize): Remove function.
|
||
(scalarize_elem): Likewise.
|
||
(create_total_scalarization_access): Likewise.
|
||
(sort_and_splice_var_accesses): Do not track total scalarization
|
||
flags.
|
||
(analyze_access_subtree): New parameter totally, adjust to new meaning
|
||
of grp_total_scalarization.
|
||
(analyze_access_trees): Pass new parameter to analyze_access_subtree.
|
||
(can_totally_scalarize_forest_p): New function.
|
||
(create_total_scalarization_access): Likewise.
|
||
(create_total_access_and_reshape): Likewise.
|
||
(total_should_skip_creating_access): Likewise.
|
||
(totally_scalarize_subtree): Likewise.
|
||
(analyze_all_variable_accesses): Perform total scalarization after
|
||
subaccess propagation using the new functions above.
|
||
(initialize_constant_pool_replacements): Output initializers by
|
||
traversing the access tree.
|
||
|
||
2020-01-29 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* tree-sra.c (verify_sra_access_forest): New function.
|
||
(verify_all_sra_access_forests): Likewise.
|
||
(create_artificial_child_access): Set parent.
|
||
(analyze_all_variable_accesses): Call the verifier.
|
||
|
||
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
|
||
if called on indirect edge.
|
||
(cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
|
||
speculative call if needed.
|
||
|
||
2020-01-29 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93428
|
||
* tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
|
||
permutation when the load node is created.
|
||
(vect_analyze_slp_instance): Re-use it here.
|
||
|
||
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
|
||
|
||
2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/93272
|
||
* ira-lives.c (process_out_of_region_eh_regs): New function.
|
||
(process_bb_node_lives): Call it.
|
||
|
||
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* coverage.c (read_counts_file): Make error message lowercase.
|
||
|
||
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* profile-count.c (profile_quality_display_names): Fix ordering.
|
||
|
||
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/93318
|
||
* cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
|
||
hash only when edge is first within the sequence.
|
||
(cgraph_edge::set_call_stmt): Update handling of speculative calls.
|
||
(symbol_table::create_edge): Do not set target_prob.
|
||
(cgraph_edge::remove_caller): Watch for speculative calls when updating
|
||
the call site hash.
|
||
(cgraph_edge::make_speculative): Drop target_prob parameter.
|
||
(cgraph_edge::speculative_call_info): Remove.
|
||
(cgraph_edge::first_speculative_call_target): New member function.
|
||
(update_call_stmt_hash_for_removing_direct_edge): New function.
|
||
(cgraph_edge::resolve_speculation): Rewrite to new API.
|
||
(cgraph_edge::speculative_call_for_target): New member function.
|
||
(cgraph_edge::make_direct): Rewrite to new API; fix handling of
|
||
multiple speculation targets.
|
||
(cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
|
||
of profile.
|
||
(verify_speculative_call): Verify that targets form an interval.
|
||
* cgraph.h (cgraph_edge::speculative_call_info): Remove.
|
||
(cgraph_edge::first_speculative_call_target): New member function.
|
||
(cgraph_edge::next_speculative_call_target): New member function.
|
||
(cgraph_edge::speculative_call_target_ref): New member function.
|
||
(cgraph_edge;:speculative_call_indirect_edge): New member funtion.
|
||
(cgraph_edge): Remove target_prob.
|
||
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
|
||
Fix handling of speculative calls.
|
||
* ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
|
||
* ipa-fnsummary.c (analyze_function_body): Likewise.
|
||
* ipa-inline.c (speculation_useful_p): Use new speculative call API.
|
||
* ipa-profile.c (dump_histogram): Fix formating.
|
||
(ipa_profile_generate_summary): Watch for overflows.
|
||
(ipa_profile): Do not require probablity to be 1/2; update to new API.
|
||
* ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
|
||
(update_indirect_edges_after_inlining): Update to new API.
|
||
* ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
|
||
profiles.
|
||
* profile-count.h: (profile_probability::adjusted): New.
|
||
* tree-inline.c (copy_bb): Update to new speculative call API; fix
|
||
updating of profile.
|
||
* value-prof.c (gimple_ic_transform): Rename to ...
|
||
(dump_ic_profile): ... this one; update dumping.
|
||
(stream_in_histogram_value): Fix formating.
|
||
(gimple_value_profile_transformations): Update.
|
||
|
||
2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/91461
|
||
* config/i386/i386.md (*movoi_internal_avx): Remove
|
||
TARGET_SSE_TYPELESS_STORES check.
|
||
(*movti_internal): Prefer TARGET_AVX over
|
||
TARGET_SSE_TYPELESS_STORES.
|
||
(*movtf_internal): Likewise.
|
||
* config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
|
||
TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
|
||
from TARGET_SSE_TYPELESS_STORES.
|
||
|
||
2020-01-28 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* diagnostic-core.h (warning_at): Rename overload to...
|
||
(warning_meta): ...this.
|
||
(emit_diagnostic_valist): Delete decl of overload taking
|
||
diagnostic_metadata.
|
||
* diagnostic.c (emit_diagnostic_valist): Likewise for defn.
|
||
(warning_at): Rename overload taking diagnostic_metadata to...
|
||
(warning_meta): ...this.
|
||
|
||
2020-01-28 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93439
|
||
* tree-parloops.c (create_loop_fn): Move clique bookkeeping...
|
||
* tree-cfg.c (move_sese_region_to_fn): ... here.
|
||
(verify_types_in_gimple_reference): Verify used cliques are
|
||
tracked.
|
||
|
||
2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/91399
|
||
* config/i386/i386-options.c (set_ix86_tune_features): Add an
|
||
argument of a pointer to struct gcc_options and pass it to
|
||
parse_mtune_ctrl_str.
|
||
(ix86_function_specific_restore): Pass opts to
|
||
set_ix86_tune_features.
|
||
(ix86_option_override_internal): Likewise.
|
||
(parse_mtune_ctrl_str): Add an argument of a pointer to struct
|
||
gcc_options and use it for x_ix86_tune_ctrl_string.
|
||
|
||
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/87763
|
||
* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
|
||
simplification to handle subregs as well as bare regs.
|
||
* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
|
||
|
||
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-loop.c (vectorizable_reduction): Fail gracefully
|
||
for reduction chains that (now) include a call.
|
||
|
||
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/92822
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): When filling
|
||
out the don't-care elements of a vector whose significant elements
|
||
are duplicates, make the don't-care elements duplicates too.
|
||
|
||
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/93434
|
||
* tree-predcom.c (split_data_refs_to_components): Record which
|
||
components have had aliasing loads removed. Prevent store-store
|
||
commoning for all such components.
|
||
|
||
2020-01-28 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93418
|
||
* config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
|
||
-1 or is_vshift is true, use new_vector with number of elts npatterns
|
||
rather than new_unary_operation.
|
||
|
||
PR tree-optimization/93454
|
||
* gimple-fold.c (fold_array_ctor_reference): Perform
|
||
elt_size.to_uhwi () just once, instead of calling it in every
|
||
iteration. Punt if that value is above size of the temporary
|
||
buffer. Decrease third native_encode_expr argument when
|
||
bufoff + elt_sz is above size of buf.
|
||
|
||
2020-01-27 Joseph Myers <joseph@codesourcery.com>
|
||
|
||
* config/mips/mips.c (mips_declare_object_name)
|
||
[USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
|
||
|
||
2020-01-27 Martin Liska <mliska@suse.cz>
|
||
|
||
PR gcov-profile/93403
|
||
* tree-profile.c (gimple_init_gcov_profiler): Generate
|
||
both __gcov_indirect_call_profiler_v4 and
|
||
__gcov_indirect_call_profiler_v4_atomic.
|
||
|
||
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/92822
|
||
* config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
|
||
expander.
|
||
(@aarch64_split_simd_mov<mode>): Use it.
|
||
(aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
|
||
Leave the vec_extract patterns to handle 2-element vectors.
|
||
(aarch64_simd_mov_from_<mode>high): Likewise.
|
||
(vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
|
||
(vec_extractv2dfv1df): Likewise.
|
||
|
||
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
|
||
jump conditions for *compare_condjump<GPI:mode>.
|
||
|
||
2020-01-27 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR analyzer/93276
|
||
* digraph.cc (test_edge::test_edge): Specify template for base
|
||
class initializer.
|
||
|
||
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
|
||
|
||
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc-protos.h (gen_mlo): Remove.
|
||
(gen_mhi): Likewise.
|
||
* config/arc/arc.c (AUX_MULHI): Define.
|
||
(arc_must_save_reister): Special handling for r58/59.
|
||
(arc_compute_frame_size): Consider mlo/mhi registers.
|
||
(arc_save_callee_saves): Emit fp/sp move only when emit_move
|
||
paramter is true.
|
||
(arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
|
||
mlo/mhi name selection.
|
||
(arc_restore_callee_saves): Don't early restore blink when ISR.
|
||
(arc_expand_prologue): Add mlo/mhi saving.
|
||
(arc_expand_epilogue): Add mlo/mhi restoring.
|
||
(gen_mlo): Remove.
|
||
(gen_mhi): Remove.
|
||
* config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
|
||
numbering when MUL64 option is used.
|
||
(DWARF2_FRAME_REG_OUT): Define.
|
||
* config/arc/arc.md (arc600_stall): New pattern.
|
||
(VUNSPEC_ARC_ARC600_STALL): Define.
|
||
(mulsi64): Use correct mlo/mhi registers.
|
||
(mulsi_600): Clean it up.
|
||
* config/arc/predicates.md (mlo_operand): Remove any dependency on
|
||
TARGET_BIG_ENDIAN.
|
||
(mhi_operand): Likewise.
|
||
|
||
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
|
||
Petro Karashchenko <petro.karashchenko@ring.com>
|
||
|
||
* config/arc/arc.c (arc_is_uncached_mem_p): Check struct
|
||
attributes if needed.
|
||
(prepare_move_operands): Generate special unspec instruction for
|
||
direct access.
|
||
(arc_isuncached_mem_p): Propagate uncached attribute to each
|
||
structure member.
|
||
* config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
|
||
(VUNSPEC_ARC_STDI): Likewise.
|
||
(ALLI): New mode iterator.
|
||
(mALLI): New mode attribute.
|
||
(lddi): New instruction pattern.
|
||
(stdi): Likewise.
|
||
(stdidi_split): Split instruction for architectures which are not
|
||
supporting ll64 option.
|
||
(lddidi_split): Likewise.
|
||
|
||
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/92989
|
||
* lra-lives.c (process_bb_lives): Update the live-in set before
|
||
processing additional clobbers.
|
||
|
||
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/93170
|
||
* cselib.c (cselib_invalidate_regno_val): New function, split out
|
||
from...
|
||
(cselib_invalidate_regno): ...here.
|
||
(cselib_invalidated_by_call_p): New function.
|
||
(cselib_process_insn): Iterate over all the hard-register entries in
|
||
REG_VALUES and invalidate any that cross call-clobbered registers.
|
||
|
||
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* dojump.c (split_comparison): Use HONOR_NANS rather than
|
||
HONOR_SNANS when splitting LTGT.
|
||
|
||
2020-01-27 Martin Liska <mliska@suse.cz>
|
||
|
||
PR driver/91220
|
||
* opts.c (print_filtered_help): Exclude language-specific
|
||
options from --help=common unless enabled in all FEs.
|
||
|
||
2020-01-27 Martin Liska <mliska@suse.cz>
|
||
|
||
* opts.c (print_help): Exclude params from
|
||
all except --help=param.
|
||
|
||
2020-01-27 Martin Liska <mliska@suse.cz>
|
||
|
||
PR target/93274
|
||
* config/i386/i386-features.c (make_resolver_func):
|
||
Align the code with ppc64 target implementation.
|
||
Do not generate a unique name for resolver function.
|
||
|
||
2020-01-27 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93397
|
||
* tree-vect-slp.c (vect_analyze_slp_instance): Delay
|
||
converted reduction chain SLP graph adjustment.
|
||
|
||
2020-01-26 Marek Polacek <polacek@redhat.com>
|
||
|
||
PR sanitizer/93436
|
||
* sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
|
||
null DECL_NAME.
|
||
|
||
2020-01-26 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/92601
|
||
* tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
|
||
of complete types.
|
||
|
||
2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
|
||
|
||
* config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
|
||
(rx_setmem): Likewise.
|
||
|
||
2020-01-26 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93412
|
||
* config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
|
||
Use nonimmediate_operand instead of x86_64_hilo_general_operand and
|
||
drop <di> from constraint of last operand.
|
||
|
||
PR target/93430
|
||
* config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
|
||
TARGET_AVX2 and V4DFmode not in the split condition, but in the
|
||
pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
|
||
|
||
2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
|
||
|
||
PR ipa/93166
|
||
* ipa-cp.c (get_info_about_necessary_edges): Remove value
|
||
check assertion.
|
||
|
||
2020-01-24 Jeff Law <law@redhat.com>
|
||
|
||
PR tree-optimization/92788
|
||
* tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
|
||
not EDGE_ABNORMAL.
|
||
|
||
2020-01-24 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93395
|
||
* config/i386/sse.md (*avx_vperm_broadcast_v4sf,
|
||
*avx_vperm_broadcast_<mode>,
|
||
<sse2_avx_avx512f>_vpermil<mode><mask_name>,
|
||
*<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
|
||
Move before avx2_perm<mode>/avx512f_perm<mode>.
|
||
|
||
PR target/93376
|
||
* simplify-rtx.c (simplify_const_unary_operation,
|
||
simplify_const_binary_operation): Punt for mode precision above
|
||
MAX_BITSIZE_MODE_ANY_INT.
|
||
|
||
2020-01-24 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
|
||
alu.shift_reg to 0.
|
||
|
||
2020-01-24 Jeff Law <law@redhat.com>
|
||
|
||
PR target/13721
|
||
* config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
|
||
for REGs. Call output_operand_lossage to get more reasonable
|
||
diagnostics.
|
||
|
||
2020-01-24 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
|
||
gcn_fp_compare_operator.
|
||
(vec_cmpu<mode>di): Use gcn_compare_operator.
|
||
(vec_cmp<u>v64qidi): Use gcn_compare_operator.
|
||
(vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
|
||
(vec_cmpu<mode>di_exec): Use gcn_compare_operator.
|
||
(vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
|
||
(vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
|
||
(vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
|
||
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
|
||
gcn_fp_compare_operator.
|
||
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
|
||
gcn_fp_compare_operator.
|
||
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
|
||
gcn_fp_compare_operator.
|
||
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
|
||
gcn_fp_compare_operator.
|
||
|
||
2020-01-24 Maciej W. Rozycki <macro@wdc.com>
|
||
|
||
* doc/install.texi (Cross-Compiler-Specific Options): Document
|
||
`--with-toolexeclibdir' option.
|
||
|
||
2020-01-24 Hans-Peter Nilsson <hp@axis.com>
|
||
|
||
* target.def (flags_regnum): Also mention effect on delay slot filling.
|
||
* doc/tm.texi: Regenerate.
|
||
|
||
2020-01-23 Jeff Law <law@redhat.com>
|
||
|
||
PR translation/90162
|
||
* config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
|
||
|
||
2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
|
||
|
||
PR target/92269
|
||
* config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
|
||
profiling label
|
||
|
||
2020-01-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/93402
|
||
* postreload.c (reload_combine_recognize_pattern): Don't try to adjust
|
||
USE insns.
|
||
|
||
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
|
||
|
||
* config.in: Regenerated.
|
||
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
|
||
for TARGET_LIBC_GNUSTACK.
|
||
* configure: Regenerated.
|
||
* configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
|
||
found to be 2.31 or greater.
|
||
|
||
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
|
||
|
||
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
|
||
TARGET_SOFT_FLOAT.
|
||
* config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
|
||
(mips_asm_file_end): New function. Delegate to
|
||
file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
|
||
* config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
|
||
|
||
2020-01-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93376
|
||
* config/i386/i386-modes.def (POImode): New mode.
|
||
(MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
|
||
* config/i386/i386.md (DPWI): New mode attribute.
|
||
(addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
|
||
(QWI): Rename to...
|
||
(QPWI): ... this. Use POI instead of OI for TImode.
|
||
(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
|
||
*subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
|
||
instead of <QWI>.
|
||
|
||
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/93341
|
||
* config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
|
||
unspec.
|
||
(speculation_tracker_rev): New pattern.
|
||
* config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
|
||
Use speculation_tracker_rev to track the inverse condition.
|
||
|
||
2020-01-23 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93381
|
||
* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
|
||
alias-set of the def as argument and record the first one.
|
||
(vn_walk_cb_data::first_set): New member.
|
||
(vn_reference_lookup_3): Pass the alias-set of the current def
|
||
to push_partial_def. Fix alias-set used in the aggregate copy
|
||
case.
|
||
(vn_reference_lookup): Consistently set *last_vuse_ptr.
|
||
* real.c (clear_significand_below): Fix out-of-bound access.
|
||
|
||
2020-01-23 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93346
|
||
* config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
|
||
New define_insn patterns.
|
||
|
||
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* doc/sourcebuild.texi (check-function-bodies): Add an
|
||
optional target/xfail selector.
|
||
|
||
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/93124
|
||
* auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
|
||
bare USE and CLOBBER insns.
|
||
|
||
2020-01-22 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* config/arc/arc.c (output_short_suffix): Check insn for nullness.
|
||
|
||
2020-01-22 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR analyzer/93307
|
||
* gdbinit.in (break-on-saved-diagnostic): Update for move of
|
||
diagnostic_manager into "ana" namespace.
|
||
* selftest-run-tests.c (selftest::run_tests): Update for move of
|
||
selftest::run_analyzer_selftests to
|
||
ana::selftest::run_analyzer_selftests.
|
||
|
||
2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* cfgexpand.c (union_stack_vars): Update the size.
|
||
|
||
2020-01-22 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93381
|
||
* tree-ssa-structalias.c (find_func_aliases): Assume offsetting
|
||
throughout, handle all conversions the same.
|
||
|
||
2020-01-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93335
|
||
* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
|
||
gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
|
||
predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
|
||
Call force_reg on high_in2 unconditionally.
|
||
|
||
2020-01-22 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/92924
|
||
* profile.c (compute_value_histograms): Divide
|
||
all counter values.
|
||
|
||
2020-01-22 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/91298
|
||
* output.h (assemble_name_resolve): Declare.
|
||
* varasm.c (assemble_name_resolve): New function.
|
||
(assemble_name): Use it.
|
||
* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
|
||
|
||
2020-01-22 Joseph Myers <joseph@codesourcery.com>
|
||
|
||
* doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
|
||
update_web_docs_git instead of update_web_docs_svn.
|
||
|
||
2020-01-21 Andrew Pinski <apinski@marvell.com>
|
||
|
||
PR target/9311
|
||
* config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
|
||
as PTR mode. Have operand 1 as being modeless, it can be P mode.
|
||
(*tlsgd_small_<mode>): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
|
||
<case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
|
||
register. Convert that register back to dest using convert_mode.
|
||
|
||
2020-01-21 Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
|
||
instead of XINT.
|
||
|
||
2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
|
||
Uros Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/93319
|
||
* config/i386/i386.c (ix86_tls_module_base): Replace Pmode
|
||
with ptr_mode.
|
||
(legitimize_tls_address): Do GNU2 TLS address computation in
|
||
ptr_mode and zero-extend result to Pmode.
|
||
* config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
|
||
:P with :PTR and Pmode with ptr_mode.
|
||
(*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
|
||
(*tls_dynamic_gnu2_call_64_<mode>): Likewise.
|
||
(*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
|
||
|
||
2020-01-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93333
|
||
* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
|
||
the last two operands are CONST_INT_P before using them as such.
|
||
|
||
2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
|
||
to get the integer element types.
|
||
|
||
2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins.h
|
||
(function_expander::convert_to_pmode): Declare.
|
||
* config/aarch64/aarch64-sve-builtins.cc
|
||
(function_expander::convert_to_pmode): New function.
|
||
(function_expander::get_contiguous_base): Use it.
|
||
(function_expander::prepare_gather_address_operands): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.cc
|
||
(svwhilerw_svwhilewr_impl::expand): Likewise.
|
||
|
||
2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
|
||
|
||
PR target/92424
|
||
* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
|
||
cfun->machine->label_is_assembled.
|
||
(aarch64_print_patchable_function_entry): New.
|
||
(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
|
||
* config/aarch64/aarch64.h (struct machine_function): New field,
|
||
label_is_assembled.
|
||
|
||
2020-01-21 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
PR ipa/93315
|
||
* ipa-profile.c (ipa_profile): Delete call_sums and set it to
|
||
NULL on exit.
|
||
|
||
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/93318
|
||
* cgraph.c (cgraph_edge::resolve_speculation,
|
||
cgraph_edge::redirect_call_stmt_to_callee): Fix update of
|
||
call_stmt_site_hash.
|
||
|
||
2020-01-21 Martin Liska <mliska@suse.cz>
|
||
|
||
* config/rs6000/rs6000.c (common_mode_defined): Remove
|
||
unused variable.
|
||
|
||
2020-01-21 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/92328
|
||
* tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
|
||
type when value-numbering same-sized store by inserting a
|
||
VIEW_CONVERT_EXPR.
|
||
(eliminate_dom_walker::eliminate_stmt): When eliminating
|
||
a redundant store handle bit-reinterpretation of the same value.
|
||
|
||
2020-01-21 Andrew Pinski <apinski@marvel.com>
|
||
|
||
PR tree-opt/93321
|
||
* tree-into-ssa.c (prepare_block_for_update_1): Split out
|
||
from ...
|
||
(prepare_block_for_update): This. Use a worklist instead of
|
||
recursing.
|
||
|
||
2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
|
||
* gcc/config/arm/arm.c (clear_operation_p):
|
||
Initialise last_regno, skip first iteration
|
||
based on the first_set value and use ints instead
|
||
of the unnecessary HOST_WIDE_INTs.
|
||
|
||
2020-01-21 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93073
|
||
* config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
|
||
compare_mode other than SFmode or DFmode.
|
||
|
||
2020-01-21 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
PR target/93304
|
||
* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
|
||
* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
|
||
* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
|
||
|
||
2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
|
||
|
||
2020-01-20 Andrew Pinski <apinski@marvell.com>
|
||
|
||
PR middle-end/93242
|
||
* targhooks.c (default_print_patchable_function_entry): Use
|
||
output_asm_insn to emit the nop instruction.
|
||
|
||
2020-01-20 Fangrui Song <maskray@google.com>
|
||
|
||
PR middle-end/93194
|
||
* targhooks.c (default_print_patchable_function_entry): Align to
|
||
POINTER_SIZE.
|
||
|
||
2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR target/93319
|
||
* config/i386/i386.c (legitimize_tls_address): Pass Pmode to
|
||
gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
|
||
* config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
|
||
(@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
|
||
(*tls_dynamic_gnu2_lea_64): Renamed to ...
|
||
(*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
|
||
Remove the {q} suffix from lea.
|
||
(*tls_dynamic_gnu2_call_64): Renamed to ...
|
||
(*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
|
||
(*tls_dynamic_gnu2_combine_64): Renamed to ...
|
||
(*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
|
||
Pass Pmode to gen_tls_dynamic_gnu2_64.
|
||
|
||
2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
|
||
|
||
2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins-base.cc
|
||
(svld1ro_impl::memory_vector_mode): Remove parameter name.
|
||
|
||
2020-01-20 Richard Biener <rguenther@suse.de>
|
||
|
||
PR debug/92763
|
||
* dwarf2out.c (prune_unused_types): Unconditionally mark
|
||
called function DIEs.
|
||
|
||
2020-01-20 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/93199
|
||
* tree-eh.c (struct leh_state): Add
|
||
new field outer_non_cleanup.
|
||
(cleanup_is_dead_in): Pass leh_state instead
|
||
of eh_region. Add a checking that state->outer_non_cleanup
|
||
points to outer non-clean up region.
|
||
(lower_try_finally): Record outer_non_cleanup
|
||
for this_state.
|
||
(lower_catch): Likewise.
|
||
(lower_eh_filter): Likewise.
|
||
(lower_eh_must_not_throw): Likewise.
|
||
(lower_cleanup): Likewise.
|
||
|
||
2020-01-20 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93094
|
||
* tree-vectorizer.h (vect_loop_versioning): Adjust.
|
||
(vect_transform_loop): Likewise.
|
||
* tree-vectorizer.c (try_vectorize_loop_1): Pass down
|
||
loop_vectorized_call to vect_transform_loop.
|
||
* tree-vect-loop.c (vect_transform_loop): Pass down
|
||
loop_vectorized_call to vect_loop_versioning.
|
||
* tree-vect-loop-manip.c (vect_loop_versioning): Use
|
||
the earlier discovered loop_vectorized_call.
|
||
|
||
2020-01-19 Eric S. Raymond <esr@thyrsus.com>
|
||
|
||
* doc/contribute.texi: Update for SVN -> Git transition.
|
||
* doc/install.texi: Likewise.
|
||
|
||
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/93318
|
||
* cgraph.c (cgraph_edge::make_speculative): Increase number of
|
||
speculative targets.
|
||
(verify_speculative_call): New function
|
||
(cgraph_node::verify_node): Use it.
|
||
* ipa-profile.c (ipa_profile): Fix formating; do not set number of
|
||
speculations.
|
||
|
||
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/93318
|
||
* cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
|
||
(cgraph_edge::make_direct): Remove all indirect targets.
|
||
(cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
|
||
(cgraph_node::verify_node): Verify that only one call_stmt or
|
||
lto_stmt_uid is set.
|
||
* cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
|
||
lto_stmt_uid.
|
||
* lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
|
||
(lto_output_ref): Simplify streaming of stmt.
|
||
* lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
|
||
|
||
2020-01-18 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
|
||
Mark parameter unused.
|
||
|
||
2020-01-18 Hans-Peter Nilsson <hp@axis.com>
|
||
|
||
* config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
|
||
|
||
2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
|
||
|
||
* varpool.c (ctor_useable_for_folding_p): Fix grammar.
|
||
|
||
2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* Makefile.in: Add coroutine-passes.o.
|
||
* builtin-types.def (BT_CONST_SIZE): New.
|
||
(BT_FN_BOOL_PTR): New.
|
||
(BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
|
||
* builtins.def (DEF_COROUTINE_BUILTIN): New.
|
||
* coroutine-builtins.def: New file.
|
||
* coroutine-passes.cc: New file.
|
||
* function.h (struct GTY function): Add a bit to indicate that the
|
||
function is a coroutine component.
|
||
* internal-fn.c (expand_CO_FRAME): New.
|
||
(expand_CO_YIELD): New.
|
||
(expand_CO_SUSPN): New.
|
||
(expand_CO_ACTOR): New.
|
||
* internal-fn.def (CO_ACTOR): New.
|
||
(CO_YIELD): New.
|
||
(CO_SUSPN): New.
|
||
(CO_FRAME): New.
|
||
* passes.def: Add pass_coroutine_lower_builtins,
|
||
pass_coroutine_early_expand_ifns.
|
||
* tree-pass.h (make_pass_coroutine_lower_builtins): New.
|
||
(make_pass_coroutine_early_expand_ifns): New.
|
||
* doc/invoke.texi: Document the fcoroutines command line
|
||
switch.
|
||
|
||
2020-01-18 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
|
||
|
||
PR target/93312
|
||
* config/arm/arm.c (clear_operation_p): Don't use REGNO until
|
||
after checking the argument is a REG. Don't use REGNO (reg)
|
||
again to set last_regno, reuse regno variable instead.
|
||
|
||
2020-01-17 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/analyzer.texi (Limitations): Add note about NaN.
|
||
|
||
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Sudakshina Das <sudi.das@arm.com>
|
||
|
||
* config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
|
||
and valid immediate.
|
||
(ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
|
||
(lshrdi3): Generate thumb2_lsrl for valid immediates.
|
||
* config/arm/constraints.md (Pg): New.
|
||
* config/arm/predicates.md (long_shift_imm): New.
|
||
(arm_reg_or_long_shift_imm): Likewise.
|
||
* config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
|
||
(thumb2_lsll): Likewise.
|
||
(thumb2_lsrl): New.
|
||
|
||
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Sudakshina Das <sudi.das@arm.com>
|
||
|
||
* config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
|
||
(ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
|
||
* config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
|
||
register pairs for doubleword quantities for ARMv8.1M-Mainline.
|
||
* config/arm/thumb2.md (thumb2_asrl): New.
|
||
(thumb2_lsll): Likewise.
|
||
|
||
2020-01-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
|
||
unused variable.
|
||
|
||
2020-01-17 Alexander Monakov <amonakov@ispras.ru>
|
||
|
||
* gdbinit.in (help-gcc-hooks): New command.
|
||
(pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
|
||
pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
|
||
documentation.
|
||
|
||
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
|
||
correct target macro.
|
||
|
||
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
|
||
|
||
* config/aarch64/aarch64-protos.h
|
||
(aarch64_sve_ld1ro_operand_p): New.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc
|
||
(class load_replicate): New.
|
||
(class svld1ro_impl): New.
|
||
(class svld1rq_impl): Change to inherit from load_replicate.
|
||
(svld1ro): New sve intrinsic function base.
|
||
* config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
|
||
New DEF_SVE_FUNCTION.
|
||
* config/aarch64/aarch64-sve-builtins-base.h
|
||
(svld1ro): New decl.
|
||
* config/aarch64/aarch64-sve-builtins.cc
|
||
(function_expander::add_mem_operand): Modify assert to allow
|
||
OImode.
|
||
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
|
||
pattern.
|
||
* config/aarch64/aarch64.c
|
||
(aarch64_sve_ld1rq_operand_p): Implement in terms of ...
|
||
(aarch64_sve_ld1rq_ld1ro_operand_p): This.
|
||
(aarch64_sve_ld1ro_operand_p): New.
|
||
* config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
|
||
* config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
|
||
* config/aarch64/predicates.md
|
||
(aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
|
||
|
||
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
|
||
|
||
* config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
|
||
Introduce this ACLE specified predefined macro.
|
||
* config/aarch64/aarch64-option-extensions.def (f64mm): New.
|
||
(fp): Disabling this disables f64mm.
|
||
(simd): Disabling this disables f64mm.
|
||
(fp16): Disabling this disables f64mm.
|
||
(sve): Disabling this disables f64mm.
|
||
* config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
|
||
(AARCH64_ISA_F64MM): New.
|
||
(TARGET_F64MM): New.
|
||
* doc/invoke.texi (f64mm): Document new option.
|
||
|
||
2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
|
||
(neoversen1_tunings): Likewise.
|
||
|
||
2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR target/92692
|
||
* config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
|
||
Add assert to ensure prolog has been emitted.
|
||
(aarch64_split_atomic_op): Likewise.
|
||
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
|
||
Use epilogue_completed rather than reload_completed.
|
||
(aarch64_atomic_exchange<mode>): Likewise.
|
||
(aarch64_atomic_<atomic_optab><mode>): Likewise.
|
||
(atomic_nand<mode>): Likewise.
|
||
(aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
|
||
(atomic_fetch_nand<mode>): Likewise.
|
||
(aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
|
||
(atomic_nand_fetch<mode>): Likewise.
|
||
|
||
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/93133
|
||
* config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
|
||
for FP modes.
|
||
(REVERSE_CONDITION): Delete.
|
||
* config/aarch64/iterators.md (CC_ONLY): New mode iterator.
|
||
(CCFP_CCFPE): Likewise.
|
||
(e): New mode attribute.
|
||
* config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
|
||
(@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
|
||
(fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
|
||
(@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
|
||
(@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
|
||
(@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
|
||
name of generator from gen_ccmpdi to gen_ccmpccdi.
|
||
(aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
|
||
the previous comparison but aren't able to, use the new ccmp_rev
|
||
patterns instead.
|
||
|
||
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
|
||
than testing directly for INTEGER_CST.
|
||
(gimplify_target_expr, gimplify_omp_depend): Likewise.
|
||
|
||
2020-01-17 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93292
|
||
* tree-vect-stmts.c (vectorizable_comparison): Punt also if
|
||
get_vectype_for_scalar_type returns NULL.
|
||
|
||
2020-01-16 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* params.opt (-param=max-predicted-iterations): Increase range from 0.
|
||
* predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
|
||
|
||
2020-01-16 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
|
||
dump.
|
||
* params.opt: (max-predicted-iterations): Set bounds.
|
||
* predict.c (real_almost_one, real_br_prob_base,
|
||
real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
|
||
(propagate_freq): Add max_cyclic_prob parameter; cap cyclic
|
||
probabilities; do not truncate to reg_br_prob_bases.
|
||
(estimate_loops_at_level): Pass max_cyclic_prob.
|
||
(estimate_loops): Compute max_cyclic_prob.
|
||
(estimate_bb_frequencies): Do not initialize real_*; update calculation
|
||
of back edge prob.
|
||
* profile-count.c (profile_probability::to_sreal): New.
|
||
* profile-count.h (class sreal): Move up in file.
|
||
(profile_probability::to_sreal): Declare.
|
||
|
||
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config/arm/arm.c
|
||
(arm_invalid_conversion): New function for target hook.
|
||
(arm_invalid_unary_op): New function for target hook.
|
||
(arm_invalid_binary_op): New function for target hook.
|
||
|
||
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config.gcc: Add arm_bf16.h.
|
||
* config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
|
||
(arm_simd_builtin_std_type): Add BFmode.
|
||
(arm_init_simd_builtin_types): Define element types for vector types.
|
||
(arm_init_bf16_types): New function.
|
||
(arm_init_builtins): Add arm_init_bf16_types function call.
|
||
* config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
|
||
* config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
|
||
* config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
|
||
(arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
|
||
(arm_vector_mode_supported_p): Add V4BF, V8BF.
|
||
(arm_mangle_type): Add __bf16.
|
||
* config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
|
||
VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
|
||
arm_bf16_ptr_type_node.
|
||
* config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
|
||
define_split between ARM registers.
|
||
* config/arm/arm_bf16.h: New file.
|
||
* config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
|
||
* config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
|
||
(VQXMOV): Add V8BF.
|
||
* config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
|
||
* config/arm/vfp.md: Add BFmode to movhf patterns.
|
||
|
||
2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
|
||
Andre Vieira <andre.simoesdiasvieira@arm.com>
|
||
|
||
* config/arm/arm-cpus.in (mve, mve_float): New features.
|
||
(dsp, mve, mve.fp): New options.
|
||
* config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
|
||
* config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
|
||
* doc/invoke.texi: Document the armv8.1-m mve and dps options.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
|
||
Armv8-M Mainline.
|
||
* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
|
||
error for using -mcmse when targeting Armv8.1-M Mainline.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm.md (nonsecure_call_internal): Do not force memory
|
||
address in r4 when targeting Armv8.1-M Mainline.
|
||
(nonsecure_call_value_internal): Likewise.
|
||
* config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
|
||
a register match_operand again. Emit BLXNS when targeting
|
||
Armv8.1-M Mainline.
|
||
(nonsecure_call_value_reg_thumb2): Likewise.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
|
||
(cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
|
||
variable as true when floating-point ABI is not hard. Replace
|
||
check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
|
||
Generate VLSTM and VLLDM instruction respectively before and
|
||
after a function call to cmse_nonsecure_call function.
|
||
* config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
|
||
(VUNSPEC_VLLDM): Likewise.
|
||
* config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
|
||
(lazy_load_multiple_insn): Likewise.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm.c (vfp_emit_fstmd): Declare early.
|
||
(arm_emit_vfp_multi_reg_pop): Likewise.
|
||
(cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
|
||
registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
|
||
restore callee-saved VFP registers.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
|
||
(cmse_nonsecure_call_clear_caller_saved): Rename into ...
|
||
(cmse_nonsecure_call_inline_register_clear): This. Save and clear
|
||
callee-saved GPRs as well as clear ip register before doing a nonsecure
|
||
call then restore callee-saved GPRs after it when targeting
|
||
Armv8.1-M Mainline.
|
||
(arm_reorg): Adapt to function rename.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
|
||
* config/arm/arm.c (clear_operation_p): Extend to be able to check a
|
||
clear_vfp_multiple pattern based on a new vfp parameter.
|
||
(cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
|
||
targeting Armv8.1-M Mainline.
|
||
(cmse_nonsecure_entry_clear_before_return): Clear VFP registers
|
||
unconditionally when targeting Armv8.1-M Mainline architecture. Check
|
||
whether VFP registers are available before looking call_used_regs for a
|
||
VFP register.
|
||
* config/arm/predicates.md (clear_multiple_operation): Adapt to change
|
||
of prototype of clear_operation_p.
|
||
(clear_vfp_multiple_operation): New predicate.
|
||
* config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
|
||
* config/arm/vfp.md (clear_vfp_multiple): New define_insn.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm-protos.h (clear_operation_p): Declare.
|
||
* config/arm/arm.c (clear_operation_p): New function.
|
||
(cmse_clear_registers): Generate clear_multiple instruction pattern if
|
||
targeting Armv8.1-M Mainline or successor.
|
||
(output_return_instruction): Only output APSR register clearing if
|
||
Armv8.1-M Mainline instructions not available.
|
||
(thumb_exit): Likewise.
|
||
* config/arm/predicates.md (clear_multiple_operation): New predicate.
|
||
* config/arm/thumb2.md (clear_apsr): New define_insn.
|
||
(clear_multiple): Likewise.
|
||
* config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm.c (fp_sysreg_names): Declare and define.
|
||
(use_return_insn): Also return false for Armv8.1-M Mainline.
|
||
(output_return_instruction): Skip FPSCR clearing if Armv8.1-M
|
||
Mainline instructions are available.
|
||
(arm_compute_frame_layout): Allocate space in frame for FPCXTNS
|
||
when targeting Armv8.1-M Mainline Security Extensions.
|
||
(arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
|
||
Mainline entry function.
|
||
(cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
|
||
targeting Armv8.1-M Mainline or successor.
|
||
(arm_expand_epilogue): Fix indentation of caller-saved register
|
||
clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
|
||
entry function.
|
||
* config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
|
||
(FP_SYSREGS): Likewise.
|
||
(enum vfp_sysregs_encoding): Define enum.
|
||
(fp_sysreg_names): Declare.
|
||
* config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
|
||
* config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
|
||
(pop_fpsysreg_insn): Likewise.
|
||
|
||
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
|
||
Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* config/arm/arm-cpus.in (armv8_1m_main): New feature.
|
||
(ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
|
||
ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
|
||
ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
|
||
ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
|
||
(ARMv8_1m_main): New feature group.
|
||
(armv8.1-m.main): New architecture.
|
||
* config/arm/arm-tables.opt: Regenerate.
|
||
* config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
|
||
(arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
|
||
(arm_options_perform_arch_sanity_checks): Error out when targeting
|
||
Armv8.1-M Mainline Security Extensions.
|
||
* config/arm/arm.h (arm_arch8_1m_main): Declare.
|
||
|
||
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
|
||
aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
|
||
* config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
|
||
aarch64_bfdot_laneq): New.
|
||
* config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
|
||
vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
|
||
vbfdotq_laneq_f32): New.
|
||
* config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
|
||
VBFMLA_W, VBF): New.
|
||
(isquadop): Add V4BF, V8BF.
|
||
|
||
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
|
||
New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
|
||
TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
|
||
(aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
|
||
(aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
|
||
* config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
|
||
usdot_laneq, sudot_lane,sudot_laneq): New.
|
||
* config/aarch64/aarch64-simd.md (aarch64_usdot): New.
|
||
(aarch64_<sur>dot_lane): New.
|
||
* config/aarch64/arm_neon.h (vusdot_s32): New.
|
||
(vusdotq_s32): New.
|
||
(vusdot_lane_s32): New.
|
||
(vsudot_lane_s32): New.
|
||
* config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
|
||
(UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
|
||
|
||
2020-01-16 Martin Liska <mliska@suse.cz>
|
||
|
||
* value-prof.c (dump_histogram_value): Fix
|
||
obvious spacing issue.
|
||
|
||
2020-01-16 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
|
||
!storage_order_barrier_p.
|
||
|
||
2020-01-16 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* sched-int.h (_dep): Add unused bit-field field for the padding.
|
||
* sched-deps.c (init_dep_1): Init unused field.
|
||
|
||
2020-01-16 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* optabs.h (create_expand_operand): Initialize target field also.
|
||
|
||
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
||
|
||
PR tree-optimization/92429
|
||
* tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
|
||
* tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
|
||
control folding.
|
||
* tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
|
||
tree.
|
||
|
||
2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
|
||
aarch64_sve_int_mode to each mode.
|
||
|
||
2020-01-15 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/analyzer.texi (Overview): Add note about
|
||
-fdump-ipa-analyzer.
|
||
|
||
2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR tree-optimization/93231
|
||
* tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
|
||
input_type is unsigned. Use tree_to_shwi for shift constant.
|
||
Check CST_STRING element size is CHAR_TYPE_SIZE bits.
|
||
(simplify_count_trailing_zeroes): Add test to handle known non-zero
|
||
inputs more efficiently.
|
||
|
||
2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (*movsf_internal): Do not require
|
||
SSE2 ISA for alternatives 14 and 15.
|
||
|
||
2020-01-15 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93273
|
||
* tree-eh.c (sink_clobbers): If we already visited the destination
|
||
block do not defer insertion.
|
||
(pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
|
||
the purpose of defered insertion.
|
||
|
||
2020-01-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* BASE-VER: Bump to 10.0.1.
|
||
|
||
2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/93247
|
||
* tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
|
||
type of the stmt that we're going to vectorize.
|
||
|
||
2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
|
||
VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
|
||
type from the lhs.
|
||
|
||
2020-01-15 Martin Liska <mliska@suse.cz>
|
||
|
||
* ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
|
||
2 calls of streamer_read_hwi in a function call.
|
||
|
||
2020-01-15 Richard Biener <rguenther@suse.de>
|
||
|
||
* alias.c (record_alias_subset): Avoid redundant work when
|
||
subset is already recorded.
|
||
|
||
2020-01-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
|
||
the analyzer options provide CWE identifiers.
|
||
|
||
2020-01-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* tree-diagnostic-path.cc (path_summary::event_range::print):
|
||
When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
|
||
using get_pure_location.
|
||
|
||
2020-01-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93262
|
||
* tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
|
||
perform head trimming only if the last argument is constant,
|
||
either all ones, or larger or equal to head trim, in the latter
|
||
case decrease the last argument by head_trim.
|
||
|
||
PR tree-optimization/93249
|
||
* tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
|
||
(maybe_trim_memstar_call): Move head_trim and tail_trim vars to
|
||
function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
|
||
perform head trim unless we can prove there are no '\0' chars
|
||
from the source among the first head_trim chars.
|
||
|
||
2020-01-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
|
||
|
||
2020-01-15 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93009
|
||
* config/i386/sse.md
|
||
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
|
||
*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
|
||
*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
|
||
*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
|
||
just a single alternative instead of two, make operands 1 and 2
|
||
commutative.
|
||
|
||
2020-01-14 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
PR lto/91576
|
||
* ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
|
||
TYPE_MODE.
|
||
|
||
2020-01-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* Makefile.in (lang_opt_files): Add analyzer.opt.
|
||
(ANALYZER_OBJS): New.
|
||
(OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
|
||
tristate.o and ANALYZER_OBJS.
|
||
(TEXI_GCCINT_FILES): Add analyzer.texi.
|
||
* common.opt (-fanalyzer): New driver option.
|
||
* config.in: Regenerate.
|
||
* configure: Regenerate.
|
||
* configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
|
||
(gccdepdir): Also create depdir for "analyzer" subdir.
|
||
* digraph.cc: New file.
|
||
* digraph.h: New file.
|
||
* doc/analyzer.texi: New file.
|
||
* doc/gccint.texi ("Static Analyzer") New menu item.
|
||
(analyzer.texi): Include it.
|
||
* doc/invoke.texi ("Static Analyzer Options"): New list and new section.
|
||
("Warning Options"): Add static analysis warnings to the list.
|
||
(-Wno-analyzer-double-fclose): New option.
|
||
(-Wno-analyzer-double-free): New option.
|
||
(-Wno-analyzer-exposure-through-output-file): New option.
|
||
(-Wno-analyzer-file-leak): New option.
|
||
(-Wno-analyzer-free-of-non-heap): New option.
|
||
(-Wno-analyzer-malloc-leak): New option.
|
||
(-Wno-analyzer-possible-null-argument): New option.
|
||
(-Wno-analyzer-possible-null-dereference): New option.
|
||
(-Wno-analyzer-null-argument): New option.
|
||
(-Wno-analyzer-null-dereference): New option.
|
||
(-Wno-analyzer-stale-setjmp-buffer): New option.
|
||
(-Wno-analyzer-tainted-array-index): New option.
|
||
(-Wno-analyzer-use-after-free): New option.
|
||
(-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
|
||
(-Wno-analyzer-use-of-uninitialized-value): New option.
|
||
(-Wanalyzer-too-complex): New option.
|
||
(-fanalyzer-call-summaries): New warning.
|
||
(-fanalyzer-checker=): New warning.
|
||
(-fanalyzer-fine-grained): New warning.
|
||
(-fno-analyzer-state-merge): New warning.
|
||
(-fno-analyzer-state-purge): New warning.
|
||
(-fanalyzer-transitivity): New warning.
|
||
(-fanalyzer-verbose-edges): New warning.
|
||
(-fanalyzer-verbose-state-changes): New warning.
|
||
(-fanalyzer-verbosity=): New warning.
|
||
(-fdump-analyzer): New warning.
|
||
(-fdump-analyzer-callgraph): New warning.
|
||
(-fdump-analyzer-exploded-graph): New warning.
|
||
(-fdump-analyzer-exploded-nodes): New warning.
|
||
(-fdump-analyzer-exploded-nodes-2): New warning.
|
||
(-fdump-analyzer-exploded-nodes-3): New warning.
|
||
(-fdump-analyzer-supergraph): New warning.
|
||
* doc/sourcebuild.texi (dg-require-dot): New.
|
||
(dg-check-dot): New.
|
||
* gdbinit.in (break-on-saved-diagnostic): New command.
|
||
* graphviz.cc: New file.
|
||
* graphviz.h: New file.
|
||
* ordered-hash-map-tests.cc: New file.
|
||
* ordered-hash-map.h: New file.
|
||
* passes.def (pass_analyzer): Add before
|
||
pass_ipa_whole_program_visibility.
|
||
* selftest-run-tests.c (selftest::run_tests): Call
|
||
selftest::ordered_hash_map_tests_cc_tests.
|
||
* selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
|
||
decl.
|
||
* shortest-paths.h: New file.
|
||
* timevar.def (TV_ANALYZER): New timevar.
|
||
(TV_ANALYZER_SUPERGRAPH): Likewise.
|
||
(TV_ANALYZER_STATE_PURGE): Likewise.
|
||
(TV_ANALYZER_PLAN): Likewise.
|
||
(TV_ANALYZER_SCC): Likewise.
|
||
(TV_ANALYZER_WORKLIST): Likewise.
|
||
(TV_ANALYZER_DUMP): Likewise.
|
||
(TV_ANALYZER_DIAGNOSTICS): Likewise.
|
||
(TV_ANALYZER_SHORTEST_PATHS): Likewise.
|
||
* tree-pass.h (make_pass_analyzer): New decl.
|
||
* tristate.cc: New file.
|
||
* tristate.h: New file.
|
||
|
||
2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/93254
|
||
* config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
|
||
alternatives 9 and 10.
|
||
|
||
2020-01-14 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* attribs.c (excl_hash_traits::empty_zero_p): New static constant.
|
||
* gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
|
||
* graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
|
||
* hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
|
||
(selftest::hash_map_tests_c_tests): Call it.
|
||
* hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
|
||
New static constant, using the value of = H::empty_zero_p.
|
||
(unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
|
||
from default_hash_traits <Value>.
|
||
* hash-map.h (hash_map::empty_zero_p): Likewise, using the value
|
||
from Traits.
|
||
* hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
|
||
* hash-table.h (hash_table::alloc_entries): Guard the loop of
|
||
calls to mark_empty with !Descriptor::empty_zero_p.
|
||
(hash_table::empty_slow): Conditionalize the memset call with a
|
||
check that Descriptor::empty_zero_p; otherwise, loop through the
|
||
entries calling mark_empty on them.
|
||
* hash-traits.h (int_hash::empty_zero_p): New static constant.
|
||
(pointer_hash::empty_zero_p): Likewise.
|
||
(pair_hash::empty_zero_p): Likewise.
|
||
* ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
|
||
Likewise.
|
||
* ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
|
||
(ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
|
||
* profile.c (location_triplet_hash::empty_zero_p): Likewise.
|
||
* sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
|
||
(sanopt_tree_couple_hash::empty_zero_p): Likewise.
|
||
* tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
|
||
* tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
|
||
* tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
|
||
* tree-vectorizer.h
|
||
(default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
|
||
Likewise.
|
||
|
||
2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
|
||
|
||
* cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
|
||
fix typo on return value.
|
||
|
||
2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
|
||
|
||
PR ipa/69678
|
||
* cgraph.c (symbol_table::create_edge): Init speculative_id and
|
||
target_prob.
|
||
(cgraph_edge::make_speculative): Add param for setting speculative_id
|
||
and target_prob.
|
||
(cgraph_edge::speculative_call_info): Update comments and find reference
|
||
by speculative_id for multiple indirect targets.
|
||
(cgraph_edge::resolve_speculation): Decrease the speculations
|
||
for indirect edge, drop it's speculative if not direct target
|
||
left. Update comments.
|
||
(cgraph_edge::redirect_call_stmt_to_callee): Likewise.
|
||
(cgraph_node::dump): Print num_speculative_call_targets.
|
||
(cgraph_node::verify_node): Don't report error if speculative
|
||
edge not include statement.
|
||
(cgraph_edge::num_speculative_call_targets_p): New function.
|
||
* cgraph.h (int common_target_id): Remove.
|
||
(int common_target_probability): Remove.
|
||
(num_speculative_call_targets): New variable.
|
||
(make_speculative): Add param for setting speculative_id.
|
||
(cgraph_edge::num_speculative_call_targets_p): New declare.
|
||
(target_prob): New variable.
|
||
(speculative_id): New variable.
|
||
* ipa-fnsummary.c (analyze_function_body): Create and duplicate
|
||
call summaries for multiple speculative call targets.
|
||
* cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
|
||
* ipa-profile.c (struct speculative_call_target): New struct.
|
||
(class speculative_call_summary): New class.
|
||
(class speculative_call_summaries): New class.
|
||
(call_sums): New variable.
|
||
(ipa_profile_generate_summary): Generate indirect multiple targets summaries.
|
||
(ipa_profile_write_edge_summary): New function.
|
||
(ipa_profile_write_summary): Stream out indirect multiple targets summaries.
|
||
(ipa_profile_dump_all_summaries): New function.
|
||
(ipa_profile_read_edge_summary): New function.
|
||
(ipa_profile_read_summary_section): New function.
|
||
(ipa_profile_read_summary): Stream in indirect multiple targets summaries.
|
||
(ipa_profile): Generate num_speculative_call_targets from
|
||
profile summaries.
|
||
* ipa-ref.h (speculative_id): New variable.
|
||
* ipa-utils.c (ipa_merge_profiles): Update with target_prob.
|
||
* lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
|
||
common_target_probability. Stream out speculative_id and
|
||
num_speculative_call_targets.
|
||
(input_edge): Likewise.
|
||
* predict.c (dump_prediction): Remove edges count assert to be
|
||
precise.
|
||
* symtab.c (symtab_node::create_reference): Init speculative_id.
|
||
(symtab_node::clone_references): Clone speculative_id.
|
||
(symtab_node::clone_referring): Clone speculative_id.
|
||
(symtab_node::clone_reference): Clone speculative_id.
|
||
(symtab_node::clear_stmts_in_references): Clear speculative_id.
|
||
* tree-inline.c (copy_bb): Duplicate all the speculative edges
|
||
if indirect call contains multiple speculative targets.
|
||
* value-prof.h (check_ic_target): Remove.
|
||
* value-prof.c (gimple_value_profile_transformations):
|
||
Use void function gimple_ic_transform.
|
||
* value-prof.c (gimple_ic_transform): Handle topn case.
|
||
Fix comment typos. Change it to a void function.
|
||
|
||
2020-01-13 Andrew Pinski <apinski@marvell.com>
|
||
|
||
* config/aarch64/aarch64-cores.def (octeontx2): New define.
|
||
(octeontx2t98): New define.
|
||
(octeontx2t96): New define.
|
||
(octeontx2t93): New define.
|
||
(octeontx2f95): New define.
|
||
(octeontx2f95n): New define.
|
||
(octeontx2f95mm): New define.
|
||
* config/aarch64/aarch64-tune.md: Regenerate.
|
||
* doc/invoke.texi (-mcpu=): Document the new cpu types.
|
||
|
||
2020-01-13 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/33799 - destroy return value if local cleanup throws.
|
||
* gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
|
||
|
||
2020-01-13 Martin Liska <mliska@suse.cz>
|
||
|
||
* ipa-cp.c (get_max_overall_size): Use newly
|
||
renamed param param_ipa_cp_unit_growth.
|
||
* params.opt: Remove legacy param name.
|
||
|
||
2020-01-13 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR tree-optimization/93213
|
||
* tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
|
||
stores to be eliminated.
|
||
|
||
2020-01-13 Martin Liska <mliska@suse.cz>
|
||
|
||
* opts.c (print_help): Do not print CL_PARAM
|
||
and CL_WARNING for CL_OPTIMIZATION.
|
||
|
||
2020-01-13 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
PR driver/92757
|
||
* doc/invoke.texi (Warning Options): Add caveat about some warnings
|
||
depending on optimization settings.
|
||
|
||
2020-01-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/90838
|
||
* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
|
||
SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
|
||
argument rather than to initialize temporary for targets that
|
||
don't use the mode argument at all. Initialize ctzval to avoid
|
||
warning at -O0.
|
||
|
||
2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
|
||
|
||
* tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
|
||
* tree-core.h: Document it.
|
||
* gimplify.c (gimplify_omp_workshare): Set it.
|
||
* omp-low.c (lower_omp_target): Use it.
|
||
* tree-pretty-print.c (dump_omp_clause): Print it.
|
||
|
||
* omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
|
||
Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
|
||
|
||
2020-01-10 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* Makefile.in (OBJS): Add tree-diagnostic-path.o.
|
||
* common.opt (fdiagnostics-path-format=): New option.
|
||
(diagnostic_path_format): New enum.
|
||
(fdiagnostics-show-path-depths): New option.
|
||
* coretypes.h (diagnostic_event_id_t): New forward decl.
|
||
* diagnostic-color.c (color_dict): Add "path".
|
||
* diagnostic-event-id.h: New file.
|
||
* diagnostic-format-json.cc (json_from_expanded_location): Make
|
||
non-static.
|
||
(json_end_diagnostic): Call context->make_json_for_path if it
|
||
exists and the diagnostic has a path.
|
||
(diagnostic_output_format_init): Clear context->print_path.
|
||
* diagnostic-path.h: New file.
|
||
* diagnostic-show-locus.c (colorizer::set_range): Special-case
|
||
when printing a run of events in a diagnostic_path so that they
|
||
all get the same color.
|
||
(layout::m_diagnostic_path_p): New field.
|
||
(layout::layout): Initialize it.
|
||
(layout::print_any_labels): Don't colorize the label text for an
|
||
event in a diagnostic_path.
|
||
(gcc_rich_location::add_location_if_nearby): Add
|
||
"restrict_to_current_line_spans" and "label" params. Pass the
|
||
former to layout.maybe_add_location_range; pass the latter
|
||
when calling add_range.
|
||
* diagnostic.c: Include "diagnostic-path.h".
|
||
(diagnostic_initialize): Initialize context->path_format and
|
||
context->show_path_depths.
|
||
(diagnostic_show_any_path): New function.
|
||
(diagnostic_path::interprocedural_p): New function.
|
||
(diagnostic_report_diagnostic): Call diagnostic_show_any_path.
|
||
(simple_diagnostic_path::num_events): New function.
|
||
(simple_diagnostic_path::get_event): New function.
|
||
(simple_diagnostic_path::add_event): New function.
|
||
(simple_diagnostic_event::simple_diagnostic_event): New ctor.
|
||
(simple_diagnostic_event::~simple_diagnostic_event): New dtor.
|
||
(debug): New overload taking a diagnostic_path *.
|
||
* diagnostic.def (DK_DIAGNOSTIC_PATH): New.
|
||
* diagnostic.h (enum diagnostic_path_format): New enum.
|
||
(json::value): New forward decl.
|
||
(diagnostic_context::path_format): New field.
|
||
(diagnostic_context::show_path_depths): New field.
|
||
(diagnostic_context::print_path): New callback field.
|
||
(diagnostic_context::make_json_for_path): New callback field.
|
||
(diagnostic_show_any_path): New decl.
|
||
(json_from_expanded_location): New decl.
|
||
* doc/invoke.texi (-fdiagnostics-path-format=): New option.
|
||
(-fdiagnostics-show-path-depths): New option.
|
||
(-fdiagnostics-color): Add "path" to description of default
|
||
GCC_COLORS; describe it.
|
||
(-fdiagnostics-format=json): Document how diagnostic paths are
|
||
represented in the JSON output format.
|
||
* gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
|
||
Add optional params "restrict_to_current_line_spans" and "label".
|
||
* opts.c (common_handle_option): Handle
|
||
OPT_fdiagnostics_path_format_ and
|
||
OPT_fdiagnostics_show_path_depths.
|
||
* pretty-print.c: Include "diagnostic-event-id.h".
|
||
(pp_format): Implement "%@" format code for printing
|
||
diagnostic_event_id_t *.
|
||
(selftest::test_pp_format): Add tests for "%@".
|
||
* selftest-run-tests.c (selftest::run_tests): Call
|
||
selftest::tree_diagnostic_path_cc_tests.
|
||
* selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
|
||
* toplev.c (general_init): Initialize global_dc->path_format and
|
||
global_dc->show_path_depths.
|
||
* tree-diagnostic-path.cc: New file.
|
||
* tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
|
||
non-static. Drop "diagnostic" param in favor of storing the
|
||
original value of "where" and re-using it.
|
||
(virt_loc_aware_diagnostic_finalizer): Update for dropped param of
|
||
maybe_unwind_expanded_macro_loc.
|
||
(tree_diagnostics_defaults): Initialize context->print_path and
|
||
context->make_json_for_path.
|
||
* tree-diagnostic.h (default_tree_diagnostic_path_printer): New
|
||
decl.
|
||
(default_tree_make_json_for_path): New decl.
|
||
(maybe_unwind_expanded_macro_loc): New decl.
|
||
|
||
2020-01-10 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93210
|
||
* fold-const.h (native_encode_initializer,
|
||
can_native_interpret_type_p): Declare.
|
||
* fold-const.c (native_encode_string): Fix up handling with off != -1,
|
||
simplify.
|
||
(native_encode_initializer): New function, moved from dwarf2out.c.
|
||
Adjust to native_encode_expr compatible arguments, including dry-run
|
||
and partial extraction modes. Don't handle STRING_CST.
|
||
(can_native_interpret_type_p): No longer static.
|
||
* gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
|
||
offset / BITS_PER_UNIT fits into int and don't call it if
|
||
can_native_interpret_type_p fails. If suboff is NULL and for
|
||
CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
|
||
native_encode_initializer.
|
||
(fold_const_aggregate_ref_1): Formatting fix.
|
||
* dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
|
||
(tree_add_const_value_attribute): Adjust caller.
|
||
|
||
PR tree-optimization/90838
|
||
* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
|
||
SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
|
||
CTZ_DEFINED_VALUE_AT_ZERO.
|
||
|
||
2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
|
||
|
||
PR inline-asm/93027
|
||
* lra-constraints.c (match_reload): Permit input operands have the
|
||
same mode as output while other input operands have a different
|
||
mode.
|
||
|
||
2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
|
||
|
||
PR tree-optimization/90838
|
||
* tree-ssa-forwprop.c (check_ctz_array): Add new function.
|
||
(check_ctz_string): Likewise.
|
||
(optimize_count_trailing_zeroes): Likewise.
|
||
(simplify_count_trailing_zeroes): Likewise.
|
||
(pass_forwprop::execute): Try ctz simplification.
|
||
* match.pd: Add matching for ctz idioms.
|
||
|
||
2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
|
||
for target hook.
|
||
(aarch64_invalid_unary_op): New function for target hook.
|
||
(aarch64_invalid_binary_op): New function for target hook.
|
||
|
||
2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
|
||
|
||
* config.gcc: Add arm_bf16.h.
|
||
* config/aarch64/aarch64-builtins.c
|
||
(aarch64_simd_builtin_std_type): Add BFmode.
|
||
(aarch64_init_simd_builtin_types): Define element types for vector
|
||
types.
|
||
(aarch64_init_bf16_types): New function.
|
||
(aarch64_general_init_builtins): Add arm_init_bf16_types function call.
|
||
* config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
|
||
modes.
|
||
* config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
|
||
* config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
|
||
patterns.
|
||
* config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
|
||
(AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
|
||
* config/aarch64/aarch64.c
|
||
(aarch64_classify_vector_mode): Add support for BF types.
|
||
(aarch64_gimplify_va_arg_expr): Add support for BF types.
|
||
(aarch64_vq_mode): Add support for BF types.
|
||
(aarch64_simd_container_mode): Add support for BF types.
|
||
(aarch64_mangle_type): Add support for BF scalar type.
|
||
* config/aarch64/aarch64.md: Add BFmode to movhf pattern.
|
||
* config/aarch64/arm_bf16.h: New file.
|
||
* config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
|
||
* config/aarch64/iterators.md: Add BF types to mode attributes.
|
||
(HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
|
||
|
||
2020-01-10 Jason Merrill <jason@redhat.com>
|
||
|
||
PR c++/93173 - incorrect tree sharing.
|
||
* gimplify.c (copy_if_shared): No longer static.
|
||
* gimplify.h: Declare it.
|
||
|
||
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* doc/invoke.texi (-msve-vector-bits=): Document that
|
||
-msve-vector-bits=128 now generates VL-specific code for
|
||
little-endian targets.
|
||
* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
|
||
build_vector_type_for_mode to construct the data vector types.
|
||
* config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
|
||
VL-specific code for -msve-vector-bits=128 on little-endian targets.
|
||
(aarch64_simd_container_mode): Always prefer Advanced SIMD modes
|
||
for 128-bit vectors.
|
||
|
||
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
|
||
invocation.
|
||
|
||
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-builtins.c
|
||
(aarch64_builtin_vectorized_function): Check for specific vector modes,
|
||
rather than checking the number of elements and the element mode.
|
||
|
||
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
|
||
get_related_vectype_for_scalar_type rather than build_vector_type
|
||
to create the index type for a conditional reduction.
|
||
|
||
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
|
||
for any type of gather or scatter, including strided accesses.
|
||
|
||
2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
||
|
||
* tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
|
||
comment.
|
||
|
||
2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
||
|
||
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
|
||
get_dr_vinfo_offset
|
||
* tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
|
||
parameter and its use to reset DR_OFFSET's.
|
||
(vect_transform_loop): Remove orig_drs_init argument.
|
||
* tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
|
||
member of dr_vec_info rather than the offset of the associated
|
||
data_reference's innermost_loop_behavior.
|
||
(vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
|
||
(vect_do_peeling): Remove orig_drs_init parameter and its construction.
|
||
* tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
|
||
get_dr_vinfo_offset.
|
||
(vectorizable_store): Likewise.
|
||
(vectorizable_load): Likewise.
|
||
|
||
2020-01-10 Richard Biener <rguenther@suse.de>
|
||
|
||
* gimple-ssa-store-merging
|
||
(pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
|
||
|
||
2020-01-10 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/93217
|
||
* ipa-inline-analysis.c (offline_size): Make proper parenthesis
|
||
encapsulation that was there before r280040.
|
||
|
||
2020-01-10 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93199
|
||
* tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
|
||
sequences to avoid walking them again for secondary opportunities.
|
||
(pass_lower_eh_dispatch::execute): Instead actually insert
|
||
them here.
|
||
|
||
2020-01-10 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93199
|
||
* tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
|
||
(cleanup_all_empty_eh): Walk landing pads in reverse order to
|
||
avoid quadraticness.
|
||
|
||
2020-01-10 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
|
||
* ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
|
||
to get param_ipa_sra_max_replacements.
|
||
(param_splitting_across_edge): Pass the caller to
|
||
pull_accesses_from_callee.
|
||
|
||
2020-01-10 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* params.opt (param_ipcp_unit_growth): Mark as Optimization.
|
||
* ipa-cp.c (max_new_size): Removed.
|
||
(orig_overall_size): New variable.
|
||
(get_max_overall_size): New function.
|
||
(estimate_local_effects): Use it. Adjust dump.
|
||
(decide_about_value): Likewise.
|
||
(ipcp_propagate_stage): Do not calculate max_new_size, just store
|
||
orig_overall_size. Adjust dump.
|
||
(ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
|
||
|
||
2020-01-10 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* params.opt (param_ipa_max_agg_items): Mark as Optimization
|
||
* ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
|
||
instead of param_ipa_max_agg_items.
|
||
(merge_aggregate_lattices): Extract param_ipa_max_agg_items from
|
||
optimization info for the callee.
|
||
|
||
2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
|
||
|
||
* lto-streamer-in.c (input_function): Remove streamed-in inline debug
|
||
markers if debug_inline_points is false.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
|
||
extra_objs.
|
||
* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
|
||
aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
|
||
aarch64-sve-builtins-sve2.h.
|
||
(aarch64-sve-builtins-sve2.o): New rule.
|
||
* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
|
||
(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
|
||
(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
|
||
(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
|
||
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
|
||
TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
|
||
TARGET_SVE2_SM4.
|
||
* config/aarch64/aarch64-sve.md: Update comments with SVE2
|
||
instructions that are handled here.
|
||
(@cond_asrd<mode>): Generalize to...
|
||
(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
|
||
(*cond_asrd<mode>_2): Generalize to...
|
||
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
|
||
(*cond_asrd<mode>_z): Generalize to...
|
||
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
|
||
* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
|
||
(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
|
||
(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
|
||
* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
|
||
pattern.
|
||
(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
|
||
(@aarch64_scatter_stnt<mode>): Likewise.
|
||
(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
|
||
(@aarch64_mul_lane_<mode>): Likewise.
|
||
(@aarch64_sve_suqadd<mode>_const): Likewise.
|
||
(*<sur>h<addsub><mode>): Generalize to...
|
||
(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
|
||
new pattern.
|
||
(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
|
||
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
|
||
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
|
||
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
|
||
(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
|
||
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
|
||
(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
|
||
(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
|
||
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
|
||
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
|
||
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_add_mul_lane_<mode>): Likewise.
|
||
(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
|
||
(@aarch64_sve2_xar<mode>): Likewise.
|
||
(@aarch64_sve2_bcax<mode>): Likewise.
|
||
(*aarch64_sve2_eor3<mode>): Rename to...
|
||
(@aarch64_sve2_eor3<mode>): ...this.
|
||
(@aarch64_sve2_bsl<mode>): New expander.
|
||
(@aarch64_sve2_nbsl<mode>): Likewise.
|
||
(@aarch64_sve2_bsl1n<mode>): Likewise.
|
||
(@aarch64_sve2_bsl2n<mode>): Likewise.
|
||
(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
|
||
(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
|
||
(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
|
||
(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
|
||
(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
|
||
(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
|
||
(<su>mull<bt><Vwide>): Generalize to...
|
||
(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
|
||
pattern.
|
||
(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
|
||
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
|
||
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
|
||
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
|
||
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
|
||
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
|
||
(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
|
||
(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
|
||
(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
|
||
(<SHRNB:r>shrnb<mode>): Generalize to...
|
||
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
|
||
new pattern.
|
||
(<SHRNT:r>shrnt<mode>): Generalize to...
|
||
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
|
||
new pattern.
|
||
(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
|
||
(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
|
||
(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
|
||
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
|
||
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
|
||
(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
|
||
(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
|
||
(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
|
||
(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
|
||
(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
|
||
(@aarch64_sve2_cvtnt<mode>): Likewise.
|
||
(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
|
||
(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
|
||
(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
|
||
(@aarch64_sve2_cvtxnt<mode>): Likewise.
|
||
(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
|
||
(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
|
||
(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
|
||
(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
|
||
(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
|
||
(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
|
||
(@aarch64_sve2_pmul<mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
|
||
(@aarch64_sve2_tbl2<mode>): Likewise.
|
||
(@aarch64_sve2_tbx<mode>): Likewise.
|
||
(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
|
||
(@aarch64_sve2_histcnt<mode>): Likewise.
|
||
(@aarch64_sve2_histseg<mode>): Likewise.
|
||
(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
|
||
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
|
||
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
|
||
(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
|
||
(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
|
||
(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
|
||
(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
|
||
(<su>mulh<r>s<mode>3): Update after above pattern name changes.
|
||
* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
|
||
(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
|
||
(SVE2_PMULL_PAIR_I): New mode iterators.
|
||
(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
|
||
(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
|
||
(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
|
||
(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
|
||
(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
|
||
(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
|
||
(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
|
||
(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
|
||
(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
|
||
(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
|
||
(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
|
||
(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
|
||
(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
|
||
(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
|
||
(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
|
||
(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
|
||
(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
|
||
(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
|
||
(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
|
||
(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
|
||
(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
|
||
(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
|
||
(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
|
||
(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
|
||
(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
|
||
(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
|
||
(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
|
||
(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
|
||
(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
|
||
(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
|
||
(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
|
||
further down file.
|
||
(VNARROW, Ventype): New mode attributes.
|
||
(Vewtype): Handle VNx2DI. Fix typo in comment.
|
||
(VDOUBLE): New mode attribute.
|
||
(sve_lane_con): Handle VNx8HI.
|
||
(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
|
||
(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
|
||
(sve_int_op, sve_int_op_rev): Handle the above codes.
|
||
(sve_pred_int_rhs2_operand): Likewise.
|
||
(MULLBT, SHRNB, SHRNT): Delete.
|
||
(SVE_INT_SHIFT_IMM): New int iterator.
|
||
(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
|
||
and UNSPEC_WHILEHS for TARGET_SVE2.
|
||
(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
|
||
(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
|
||
(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
|
||
(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
|
||
(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
|
||
(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
|
||
(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
|
||
(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
|
||
(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
|
||
(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
|
||
(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
|
||
(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
|
||
(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
|
||
(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
|
||
(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
|
||
(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
|
||
(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
|
||
(optab): Handle the new unspecs.
|
||
(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
|
||
and UNSPEC_RSHRNT.
|
||
(lr): Handle the new unspecs.
|
||
(bt): Delete.
|
||
(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
|
||
(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
|
||
(sve_int_qsub_op): New int attributes.
|
||
(sve_fp_op, rot): Handle the new unspecs.
|
||
* config/aarch64/aarch64-sve-builtins.h
|
||
(function_resolver::require_matching_pointer_type): Declare.
|
||
(function_resolver::resolve_unary): Add an optional boolean argument.
|
||
(function_resolver::finish_opt_n_resolution): Add an optional
|
||
type_suffix_index argument.
|
||
(gimple_folder::redirect_call): Declare.
|
||
(gimple_expander::prepare_gather_address_operands): Add an optional
|
||
bool parameter.
|
||
* config/aarch64/aarch64-sve-builtins.cc: Include
|
||
aarch64-sve-builtins-sve2.h.
|
||
(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
|
||
(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
|
||
(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
|
||
(TYPES_hsd_integer): Use TYPES_hsd_signed.
|
||
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
|
||
(TYPES_s_unsigned): Likewise.
|
||
(TYPES_s_integer): Use TYPES_s_unsigned.
|
||
(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
|
||
(TYPES_sd_integer): Use them.
|
||
(TYPES_d_unsigned): New macro.
|
||
(TYPES_d_integer): Use it.
|
||
(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
|
||
(TYPES_cvt_narrow): Likewise.
|
||
(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
|
||
(preds_mx): New variable.
|
||
(function_builder::add_overloaded_function): Allow the new feature
|
||
set to be more restrictive than the original one.
|
||
(function_resolver::infer_pointer_type): Remove qualifiers from
|
||
the pointer type before printing it.
|
||
(function_resolver::require_matching_pointer_type): New function.
|
||
(function_resolver::resolve_sv_displacement): Handle functions
|
||
that don't support 32-bit vector indices or svint32_t vector offsets.
|
||
(function_resolver::finish_opt_n_resolution): Take the inferred type
|
||
as a separate argument.
|
||
(function_resolver::resolve_unary): Optionally treat all forms in
|
||
the same way as normal merging functions.
|
||
(gimple_folder::redirect_call): New function.
|
||
(function_expander::prepare_gather_address_operands): Add an argument
|
||
that says whether scaled forms are available. If they aren't,
|
||
handle scaling of vector indices and don't add the extension and
|
||
scaling operands.
|
||
(function_expander::map_to_unspecs): If aarch64_sve isn't available,
|
||
fall back to using cond_* instead.
|
||
* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
|
||
Split out the member variables into...
|
||
(rtx_code_function_base): ...this new base class.
|
||
(rtx_code_function_rotated): Inherit rtx_code_function_base.
|
||
(unspec_based_function): Split out the member variables into...
|
||
(unspec_based_function_base): ...this new base class.
|
||
(unspec_based_function_rotated): Inherit unspec_based_function_base.
|
||
(unspec_based_function_exact_insn): New class.
|
||
(unspec_based_add_function, unspec_based_add_lane_function)
|
||
(unspec_based_lane_function, unspec_based_pred_function)
|
||
(unspec_based_qadd_function, unspec_based_qadd_lane_function)
|
||
(unspec_based_qsub_function, unspec_based_qsub_lane_function)
|
||
(unspec_based_sub_function, unspec_based_sub_lane_function): New
|
||
typedefs.
|
||
(unspec_based_fused_function): New class.
|
||
(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
|
||
(unspec_based_fused_lane_function): New class.
|
||
(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
|
||
typedefs.
|
||
(CODE_FOR_MODE1): New macro.
|
||
(fixed_insn_function): New class.
|
||
(while_comparison): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
|
||
(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
|
||
(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
|
||
(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
|
||
(load_gather_sv_restricted, shift_left_imm_long): Declare.
|
||
(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
|
||
(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
|
||
(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
|
||
(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
|
||
(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
|
||
(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
|
||
(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
|
||
(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
|
||
Also add an initial argument for unary_convert_narrowt, regardless
|
||
of the predication type.
|
||
(build_32_64): Allow loads and stores to specify MODE_none.
|
||
(build_sv_index64, build_sv_uint_offset): New functions.
|
||
(long_type_suffix): New function.
|
||
(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
|
||
(binary_imm_long_base, load_gather_sv_base): Likewise.
|
||
(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
|
||
(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
|
||
(unary_narrowb_base, unary_narrowt_base): Likewise.
|
||
(binary_long_lane_def, binary_long_lane): New shape.
|
||
(binary_long_opt_n_def, binary_long_opt_n): Likewise.
|
||
(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
|
||
(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
|
||
(binary_to_uint_def, binary_to_uint): Likewise.
|
||
(binary_wide_def, binary_wide): Likewise.
|
||
(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
|
||
(compare_def, compare): Likewise.
|
||
(compare_ptr_def, compare_ptr): Likewise.
|
||
(load_ext_gather_index_restricted_def,
|
||
load_ext_gather_index_restricted): Likewise.
|
||
(load_ext_gather_offset_restricted_def,
|
||
load_ext_gather_offset_restricted): Likewise.
|
||
(load_gather_sv_def): Inherit from load_gather_sv_base.
|
||
(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
|
||
(shift_left_imm_def, shift_left_imm): Likewise.
|
||
(shift_left_imm_long_def, shift_left_imm_long): Likewise.
|
||
(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
|
||
(store_scatter_index_restricted_def,
|
||
store_scatter_index_restricted): Likewise.
|
||
(store_scatter_offset_restricted_def,
|
||
store_scatter_offset_restricted): Likewise.
|
||
(tbl_tuple_def, tbl_tuple): Likewise.
|
||
(ternary_long_lane_def, ternary_long_lane): Likewise.
|
||
(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
|
||
(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
|
||
(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
|
||
(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
|
||
(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
|
||
(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
|
||
(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
|
||
(ternary_uint_def, ternary_uint): Likewise.
|
||
(unary_convert): Fix typo in comment.
|
||
(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
|
||
(unary_long_def, unary_long): Likewise.
|
||
(unary_narrowb_def, unary_narrowb): Likewise.
|
||
(unary_narrowt_def, unary_narrowt): Likewise.
|
||
(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
|
||
(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
|
||
(unary_to_int_def, unary_to_int): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
|
||
(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
|
||
(svasrd_impl): Delete.
|
||
(svcadd_impl::expand): Handle integer operations too.
|
||
(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
|
||
new functions to derive the unspec numbers.
|
||
(svmla_svmls_lane_impl): Replace with...
|
||
(svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
|
||
integer operations too.
|
||
(svwhile_impl): Rename to...
|
||
(svwhilelx_impl): ...this and inherit from while_comparison.
|
||
(svasrd): Use unspec_based_function.
|
||
(svmla_lane): Use svmla_lane_impl.
|
||
(svmls_lane): Use svmls_lane_impl.
|
||
(svrecpe, svrsqrte): Handle unsigned integer operations too.
|
||
(svwhilele, svwhilelt): Use svwhilelx_impl.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
|
||
* config/aarch64/aarch64-sve-builtins.def: Include
|
||
aarch64-sve-builtins-sve2.def.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
|
||
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
|
||
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
|
||
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
|
||
immediates as well as vector ones.
|
||
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
|
||
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
|
||
(aarch64_sve_qsub_immediate): Update calls accordingly.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve2.md: Add banner comments.
|
||
(<su>mulh<r>s<mode>3): Move further up file.
|
||
(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
|
||
(*aarch64_sve2_sra<mode>): Move further down file.
|
||
* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
|
||
and UNSPEC_WHILEWR.
|
||
(while_optab_cmp): Handle them.
|
||
* config/aarch64/aarch64-sve.md
|
||
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
|
||
and add a "@" marker.
|
||
* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
|
||
instead of gen_aarch64_sve2_while_ptest.
|
||
(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
|
||
(UNSPEC_WHILELE): ...this.
|
||
(UNSPEC_WHILE_LO): Rename to...
|
||
(UNSPEC_WHILELO): ...this.
|
||
(UNSPEC_WHILE_LS): Rename to...
|
||
(UNSPEC_WHILELS): ...this.
|
||
(UNSPEC_WHILE_LT): Rename to...
|
||
(UNSPEC_WHILELT): ...this.
|
||
* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
|
||
(cmp_op, while_optab_cmp): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
|
||
(svwhilelt): Likewise.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
|
||
(unary_to_uint): Define.
|
||
* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
|
||
(unary_count): Rename to...
|
||
(unary_to_uint_def, unary_to_uint): ...this.
|
||
* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve-builtins-functions.h
|
||
(code_for_mode_function): New class.
|
||
(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
|
||
(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
|
||
(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
|
||
(svmul_lane, svtmad): Use CODE_FOR_MODE0.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/iterators.md (addsub): New code attribute.
|
||
* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
|
||
Re-express as...
|
||
(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
|
||
in the asm string and attributes. Fix indentation.
|
||
* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
|
||
Re-express as...
|
||
(@aarch64_sve_<optab><mode>): ...this.
|
||
* config/aarch64/aarch64-sve-builtins.h
|
||
(function_expander::expand_signed_unpred_op): Delete.
|
||
* config/aarch64/aarch64-sve-builtins.cc
|
||
(function_expander::expand_signed_unpred_op): Likewise.
|
||
(function_expander::map_to_rtx_codes): If the optab isn't defined,
|
||
try using code_for_aarch64_sve instead.
|
||
* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
|
||
(svqsub_impl): Likewise.
|
||
(svqadd, svqsub): Use rtx_code_function instead.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
|
||
(HADDSUB, sur, addsub): Remove them.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-nrv.c (pass_return_slot::execute): Handle all internal
|
||
functions the same way, rather than singling out those that
|
||
aren't mapped directly to optabs.
|
||
|
||
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* target.def (compatible_vector_types_p): New target hook.
|
||
* hooks.h (hook_bool_const_tree_const_tree_true): Declare.
|
||
* hooks.c (hook_bool_const_tree_const_tree_true): New function.
|
||
* doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
|
||
* doc/tm.texi: Regenerate.
|
||
* gimple-expr.c: Include target.h.
|
||
(useless_type_conversion_p): Use targetm.compatible_vector_types_p.
|
||
* config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
|
||
function.
|
||
(TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
|
||
* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
|
||
Use the original predicate if it already has a suitable type.
|
||
|
||
2020-01-09 Martin Jambor <mjambor@suse.cz>
|
||
|
||
* cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
|
||
resolve_speculation and redirect_call_stmt_to_callee static. Change
|
||
return type of set_call_stmt to cgraph_edge *.
|
||
* auto-profile.c (afdo_indirect_call): Adjust call to
|
||
redirect_call_stmt_to_callee.
|
||
* cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
|
||
make the this pointer explicit, adjust self-recursive calls and the
|
||
call top make_direct. Return the resulting edge.
|
||
(cgraph_edge::remove): Make this pointer explicit.
|
||
(cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
|
||
(cgraph_edge::make_direct): Likewise, adjust call to
|
||
resolve_speculation.
|
||
(cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
|
||
call to set_call_stmt.
|
||
(cgraph_update_edges_for_call_stmt_node): Update call to
|
||
set_call_stmt and remove.
|
||
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
|
||
Renamed edge to master_edge. Adjusted calls to set_call_stmt.
|
||
(cgraph_node::create_edge_including_clones): Moved "first" definition
|
||
of edge to the block where it was used. Adjusted calls to
|
||
set_call_stmt.
|
||
(cgraph_node::remove_symbol_and_inline_clones): Adjust call to
|
||
cgraph_edge::remove.
|
||
* cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
|
||
make_direct and redirect_call_stmt_to_callee.
|
||
* ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
|
||
resolve_speculation and make_direct.
|
||
* ipa-inline-transform.c (inline_transform): Adjust call to
|
||
redirect_call_stmt_to_callee.
|
||
(check_speculations_1):: Adjust call to resolve_speculation.
|
||
* ipa-inline.c (resolve_noninline_speculation): Adjust call to
|
||
resolve-speculation.
|
||
(inline_small_functions): Adjust call to resolve_speculation.
|
||
(ipa_inline): Likewise.
|
||
* ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
|
||
make_direct.
|
||
* ipa-visibility.c (function_and_variable_visibility): Make iteration
|
||
safe with regards to edge removal, adjust calls to
|
||
redirect_call_stmt_to_callee.
|
||
* ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
|
||
and redirect_call_stmt_to_callee.
|
||
* multiple_target.c (create_dispatcher_calls): Adjust call to
|
||
redirect_call_stmt_to_callee
|
||
(redirect_to_specific_clone): Likewise.
|
||
* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
|
||
Adjust calls to cgraph_edge::remove.
|
||
* tree-inline.c (copy_bb): Adjust call to set_call_stmt.
|
||
(redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
|
||
(expand_call_inline): Adjust call to cgraph_edge::remove.
|
||
|
||
2020-01-09 Martin Liska <mliska@suse.cz>
|
||
|
||
* params.opt: Set Optimization for
|
||
param_max_speculative_devirt_maydefs.
|
||
|
||
2020-01-09 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR middle-end/93200
|
||
PR fortran/92956
|
||
* builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
|
||
|
||
2020-01-09 Martin Liska <mliska@suse.cz>
|
||
|
||
* auto-profile.c (auto_profile): Use opt_for_fn
|
||
for a parameter.
|
||
* ipa-cp.c (ipcp_lattice::add_value): Likewise.
|
||
(propagate_vals_across_arith_jfunc): Likewise.
|
||
(hint_time_bonus): Likewise.
|
||
(incorporate_penalties): Likewise.
|
||
(good_cloning_opportunity_p): Likewise.
|
||
(perform_estimation_of_a_value): Likewise.
|
||
(estimate_local_effects): Likewise.
|
||
(ipcp_propagate_stage): Likewise.
|
||
* ipa-fnsummary.c (decompose_param_expr): Likewise.
|
||
(set_switch_stmt_execution_predicate): Likewise.
|
||
(analyze_function_body): Likewise.
|
||
* ipa-inline-analysis.c (offline_size): Likewise.
|
||
* ipa-inline.c (early_inliner): Likewise.
|
||
* ipa-prop.c (ipa_analyze_node): Likewise.
|
||
(ipcp_transform_function): Likewise.
|
||
* ipa-sra.c (process_scan_results): Likewise.
|
||
(ipa_sra_summarize_function): Likewise.
|
||
* params.opt: Rename ipcp-unit-growth to
|
||
ipa-cp-unit-growth. Add Optimization for various
|
||
IPA-related parameters.
|
||
|
||
2020-01-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93054
|
||
* gimplify.c (gimplify_expr): Deal with NOP definitions.
|
||
|
||
2020-01-09 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/93040
|
||
* gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
|
||
|
||
2020-01-09 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
* common/config/avr/avr-common.c (avr_option_optimization_table)
|
||
[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
|
||
|
||
2020-01-09 Martin Liska <mliska@suse.cz>
|
||
|
||
* cgraphclones.c (symbol_table::materialize_all_clones):
|
||
Use cgraph_node::dump_name.
|
||
|
||
2020-01-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR inline-asm/93202
|
||
* config/riscv/riscv.c (riscv_print_operand_reloc): Use
|
||
output_operand_lossage instead of gcc_unreachable.
|
||
* doc/md.texi (riscv f constraint): Fix typo.
|
||
|
||
PR target/93141
|
||
* config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
|
||
SWI. Use <general_hilo_operand> instead of <general_operand>. Use
|
||
CONST_SCALAR_INT_P instead of CONST_INT_P.
|
||
(*subv<mode>4_1): Rename to ...
|
||
(subv<mode>4_1): ... this.
|
||
(*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
|
||
define_insn_and_split patterns.
|
||
(*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
|
||
patterns.
|
||
|
||
2020-01-08 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* vec.c (class selftest::count_dtor): New class.
|
||
(selftest::test_auto_delete_vec): New test.
|
||
(selftest::vec_c_tests): Call it.
|
||
* vec.h (class auto_delete_vec): New class template.
|
||
(auto_delete_vec<T>::~auto_delete_vec): New dtor.
|
||
|
||
2020-01-08 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
|
||
|
||
2020-01-08 Jim Wilson <jimw@sifive.com>
|
||
|
||
* config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
|
||
use of TLS_MODEL_LOCAL_EXEC when not pic.
|
||
|
||
2020-01-08 David Malcolm <dmalcolm@redhat.com>
|
||
|
||
* hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
|
||
memory leak.
|
||
|
||
2020-01-08 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93187
|
||
* config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
|
||
*stack_protect_set_3 peephole2): Also check that the second
|
||
insns source is general_operand.
|
||
|
||
PR target/93174
|
||
* config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
|
||
predicate for output operand instead of register_operand.
|
||
(addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
|
||
memory destination and non-memory operands[2].
|
||
|
||
2020-01-08 Martin Liska <mliska@suse.cz>
|
||
|
||
* cgraph.c (cgraph_node::dump): Use ::dump_name or
|
||
::dump_asm_name instead of (::name or ::asm_name).
|
||
* cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
|
||
* cgraphunit.c (walk_polymorphic_call_targets): Likewise.
|
||
(analyze_functions): Likewise.
|
||
(expand_all_functions): Likewise.
|
||
* ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
|
||
(propagate_bits_across_jump_function): Likewise.
|
||
(dump_profile_updates): Likewise.
|
||
(ipcp_store_bits_results): Likewise.
|
||
(ipcp_store_vr_results): Likewise.
|
||
* ipa-devirt.c (dump_targets): Likewise.
|
||
* ipa-fnsummary.c (analyze_function_body): Likewise.
|
||
* ipa-hsa.c (check_warn_node_versionable): Likewise.
|
||
(process_hsa_functions): Likewise.
|
||
* ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
|
||
(set_alias_uids): Likewise.
|
||
* ipa-inline-transform.c (save_inline_function_body): Likewise.
|
||
* ipa-inline.c (recursive_inlining): Likewise.
|
||
(inline_to_all_callers_1): Likewise.
|
||
(ipa_inline): Likewise.
|
||
* ipa-profile.c (ipa_propagate_frequency_1): Likewise.
|
||
(ipa_propagate_frequency): Likewise.
|
||
* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
|
||
(remove_described_reference): Likewise.
|
||
* ipa-pure-const.c (worse_state): Likewise.
|
||
(check_retval_uses): Likewise.
|
||
(analyze_function): Likewise.
|
||
(propagate_pure_const): Likewise.
|
||
(propagate_nothrow): Likewise.
|
||
(dump_malloc_lattice): Likewise.
|
||
(propagate_malloc): Likewise.
|
||
(pass_local_pure_const::execute): Likewise.
|
||
* ipa-visibility.c (optimize_weakref): Likewise.
|
||
(function_and_variable_visibility): Likewise.
|
||
* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
|
||
(ipa_discover_variable_flags): Likewise.
|
||
* lto-streamer-out.c (output_function): Likewise.
|
||
(output_constructor): Likewise.
|
||
* tree-inline.c (copy_bb): Likewise.
|
||
* tree-ssa-structalias.c (ipa_pta_execute): Likewise.
|
||
* varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
|
||
|
||
2020-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93199
|
||
* tree-eh.c (sink_clobbers): Update virtual operands for
|
||
the first and last stmt only. Add a dry-run capability.
|
||
(pass_lower_eh_dispatch::execute): Perform clobber sinking
|
||
after CFG manipulations and in RPO order to catch all
|
||
secondary opportunities reliably.
|
||
|
||
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
PR target/93182
|
||
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
|
||
|
||
2019-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR middle-end/93199
|
||
* gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
|
||
* tree-ssa-loop-im.c (move_computations_worker): Properly adjust
|
||
virtual operand, also updating SSA use.
|
||
* gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
|
||
Update stmt after resetting virtual operand.
|
||
(tree_loop_interchange::move_code_to_inner_loop): Likewise.
|
||
* gimple-iterator.c (gsi_remove): When not removing the stmt
|
||
permanently do not delink immediate uses or mark the stmt modified.
|
||
|
||
2020-01-08 Martin Liska <mliska@suse.cz>
|
||
|
||
* ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
|
||
(ipa_call_context::estimate_size_and_time): Likewise.
|
||
(inline_analyze_function): Likewise.
|
||
|
||
2020-01-08 Martin Liska <mliska@suse.cz>
|
||
|
||
* cgraph.c (cgraph_node::dump): Use systematically
|
||
dump_asm_name.
|
||
|
||
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
Add -nodevicespecs option for avr.
|
||
|
||
PR target/93182
|
||
* config/avr/avr.opt (-nodevicespecs): New driver option.
|
||
* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
|
||
"-specs=device-specs/..." if that option is not set.
|
||
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
|
||
|
||
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
|
||
|
||
Implement 64-bit double functions for avr.
|
||
|
||
PR target/92055
|
||
* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
|
||
--with-double-comparison.
|
||
* doc/install.texi: Document them.
|
||
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
|
||
<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
|
||
<WITH_DOUBLE_COMPARISON>: New built-in defines.
|
||
* doc/invoke.texi (AVR Built-in Macros): Document them.
|
||
* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
|
||
* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
|
||
* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
|
||
|
||
2020-01-08 Richard Earnshaw <rearnsha@arm.com>
|
||
|
||
PR target/93188
|
||
* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
|
||
armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
|
||
when only building rm-profile multilibs.
|
||
|
||
2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
|
||
|
||
PR ipa/93084
|
||
* ipa-cp.c (self_recursively_generated_p): Find matched aggregate
|
||
lattice for a value to check.
|
||
(propagate_vals_across_arith_jfunc): Add an assertion to ensure
|
||
finite propagation in self-recursive scc.
|
||
|
||
2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
|
||
|
||
* ipa-inline.c (caller_growth_limits): Restore the AND.
|
||
|
||
2020-01-07 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
|
||
(VEC_ALLREG_ALT): New iterator.
|
||
(VEC_ALLREG_INT_MODE): New iterator.
|
||
(VCMP_MODE): New iterator.
|
||
(VCMP_MODE_INT): New iterator.
|
||
(vec_cmpu<mode>di): Use VCMP_MODE_INT.
|
||
(vec_cmp<u>v64qidi): New define_expand.
|
||
(vec_cmp<mode>di_exec): Use VCMP_MODE.
|
||
(vec_cmpu<mode>di_exec): New define_expand.
|
||
(vec_cmp<u>v64qidi_exec): New define_expand.
|
||
(vec_cmp<mode>di_dup): Use VCMP_MODE.
|
||
(vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
|
||
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
|
||
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
|
||
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
|
||
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
|
||
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
|
||
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
|
||
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
|
||
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
|
||
this.
|
||
* config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
|
||
* config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
|
||
|
||
2020-01-07 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/constraints.md (DA): Update description and match.
|
||
(DB): Likewise.
|
||
(Db): New constraint.
|
||
* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
|
||
parameter.
|
||
* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
|
||
Implement 'Db' mixed immediate type.
|
||
* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
|
||
(addcv64si3_dup<exec_vcc>): Delete.
|
||
(subcv64si3<exec_vcc>): Rework constraints.
|
||
(addv64di3): Rework constraints.
|
||
(addv64di3_exec): Rework constraints.
|
||
(subv64di3): Rework constraints.
|
||
(addv64di3_dup): Delete.
|
||
(addv64di3_dup_exec): Delete.
|
||
(addv64di3_zext): Rework constraints.
|
||
(addv64di3_zext_exec): Rework constraints.
|
||
(addv64di3_zext_dup): Rework constraints.
|
||
(addv64di3_zext_dup_exec): Rework constraints.
|
||
(addv64di3_zext_dup2): Rework constraints.
|
||
(addv64di3_zext_dup2_exec): Rework constraints.
|
||
(addv64di3_sext_dup2): Rework constraints.
|
||
(addv64di3_sext_dup2_exec): Rework constraints.
|
||
|
||
2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
|
||
|
||
* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
|
||
existing target checks.
|
||
|
||
2020-01-07 Richard Biener <rguenther@suse.de>
|
||
|
||
* doc/install.texi: Bump minimal supported MPC version.
|
||
|
||
2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* langhooks-def.h (lhd_simulate_enum_decl): Declare.
|
||
(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
|
||
* langhooks.c: Include stor-layout.h.
|
||
(lhd_simulate_enum_decl): New function.
|
||
* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
|
||
handle_arm_sve_h for the LTO frontend.
|
||
(register_vector_type): Cope with null returns from pushdecl.
|
||
|
||
2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
|
||
(aarch64_sve::nvectors_if_data_type): Replace with...
|
||
(aarch64_sve::builtin_type_p): ...this.
|
||
* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
|
||
(find_vector_type): Delete.
|
||
(add_sve_type_attribute): New function.
|
||
(lookup_sve_type_attribute): Likewise.
|
||
(register_builtin_types): Add an "SVE type" attribute to each type.
|
||
(register_tuple_type): Likewise.
|
||
(svbool_type_p, nvectors_if_data_type): Delete.
|
||
(mangle_builtin_type): Use lookup_sve_type_attribute.
|
||
(builtin_type_p): Likewise. Add an overload that returns the
|
||
number of constituent vector and predicate registers.
|
||
* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
|
||
(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
|
||
instead of aarch64_sve_argument_p.
|
||
(aarch64_takes_arguments_in_sve_regs_p): Likewise.
|
||
(aarch64_pass_by_reference): Likewise.
|
||
(aarch64_function_value_1): Likewise.
|
||
(aarch64_return_in_memory): Likewise.
|
||
(aarch64_layout_arg): Likewise.
|
||
|
||
2020-01-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93156
|
||
* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
|
||
least significant bit is always clear.
|
||
|
||
PR tree-optimization/93118
|
||
* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
|
||
simplifier with two intermediate conversions.
|
||
|
||
2020-01-07 Martin Liska <mliska@suse.cz>
|
||
|
||
* params.opt: Add Optimization for various parameters.
|
||
|
||
2020-01-07 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/83411
|
||
* doc/extend.texi: Explain cloning for target_clone
|
||
attribute.
|
||
|
||
2020-01-07 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/92860
|
||
* common.opt: Make in Optimization option
|
||
as it is affected by -O0, which is an Optimization
|
||
option.
|
||
* tree-inline.c (tree_inlinable_function_p):
|
||
Use opt_for_fn for warn_inline.
|
||
(expand_call_inline): Likewise.
|
||
|
||
2020-01-07 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/92860
|
||
* common.opt: Make flag_ree as optimization
|
||
attribute.
|
||
|
||
2020-01-07 Martin Liska <mliska@suse.cz>
|
||
|
||
PR optimization/92860
|
||
* params.opt: Mark param_min_crossjump_insns with Optimization
|
||
keyword.
|
||
|
||
2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
|
||
|
||
* ipa-inline-analysis.c (estimate_growth): Fix typo.
|
||
* ipa-inline.c (caller_growth_limits): Use OR instead of AND.
|
||
|
||
2020-01-06 Michael Meissner <meissner@linux.ibm.com>
|
||
|
||
* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
|
||
helper function to return the valid addressing formats for a given
|
||
hard register and mode.
|
||
(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
|
||
|
||
* config/rs6000/constraints.md (Q constraint): Update
|
||
documentation.
|
||
* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
|
||
documentation.
|
||
|
||
* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
|
||
Use 'Q' for doing vector extract from memory.
|
||
(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
|
||
memory.
|
||
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
|
||
doing vector extract from memory.
|
||
(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
|
||
extract from memory.
|
||
|
||
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
|
||
for the offset being 34-bits when -mcpu=future is used.
|
||
|
||
2020-01-06 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
* config/pa/pa.md: Revert change to use ordered_comparison_operator
|
||
instead of cmpib_comparison_operator in cmpib patterns.
|
||
* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
|
||
of cmpib_comparison_operator. Revise comment.
|
||
|
||
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
|
||
in an IFN_DIV_POW2 node to be equal.
|
||
|
||
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
|
||
(vect_check_scalar_mask): ...this.
|
||
(vectorizable_store, vectorizable_load): Update call accordingly.
|
||
(vectorizable_call): Use vect_check_scalar_mask to check the mask
|
||
argument in calls to conditional internal functions.
|
||
|
||
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
|
||
'0' matching inputs.
|
||
(subv64di3_exec): Likewise.
|
||
|
||
2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
|
||
|
||
* config/mips/mips.c (vr4130_align_insns): Fix typo.
|
||
* doc/md.texi (movstr): Likewise.
|
||
|
||
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
|
||
clobber.
|
||
|
||
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
|
||
Depend on...
|
||
(s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
|
||
to a temporary file and use move-if-change to update the real
|
||
file where necessary.
|
||
|
||
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
|
||
rather than Upa for CPY /M.
|
||
|
||
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
|
||
|
||
* config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
|
||
immediate.
|
||
|
||
2020-01-06 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/92860
|
||
* params.opt: Mark param_max_combine_insns with Optimization
|
||
keyword.
|
||
|
||
2020-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93141
|
||
* config/i386/i386.md (SWIDWI): New mode iterator.
|
||
(DWI, dwi): Add TImode variants.
|
||
(addv<mode>4): Use SWIDWI iterator instead of SWI. Use
|
||
<general_hilo_operand> instead of <general_operand>. Use
|
||
CONST_SCALAR_INT_P instead of CONST_INT_P.
|
||
(*addv<mode>4_1): Rename to ...
|
||
(addv<mode>4_1): ... this.
|
||
(QWI): New mode attribute.
|
||
(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
|
||
define_insn_and_split patterns.
|
||
(*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
|
||
patterns.
|
||
(uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
|
||
<general_hilo_operand> instead of <general_operand>.
|
||
(*addcarry<mode>_1): New define_insn.
|
||
(*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
|
||
|
||
2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
|
||
|
||
* gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
|
||
Use "call" instead of "set".
|
||
|
||
2020-01-03 Martin Jambor <mjambor@suse.cz>
|
||
|
||
PR ipa/92917
|
||
* ipa-cp.c (print_all_lattices): Skip functions without info.
|
||
|
||
2020-01-03 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/93089
|
||
* config/i386/i386-options.c (ix86_simd_clone_adjust): If
|
||
TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
|
||
simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
|
||
for 'e' simd clones.
|
||
|
||
PR target/93089
|
||
* config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
|
||
entry.
|
||
(mprefer-vector-width=): Add Save.
|
||
* config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
|
||
-mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
|
||
(ix86_debug_options, ix86_function_specific_print): Adjust
|
||
ix86_target_string callers.
|
||
(ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
|
||
(ix86_valid_target_attribute_tree): Likewise.
|
||
* config/i386/i386-options.h (ix86_target_string): Add PVW argument.
|
||
* config/i386/i386-expand.c (ix86_expand_builtin): Adjust
|
||
ix86_target_string caller.
|
||
|
||
PR target/93110
|
||
* config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
|
||
emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
|
||
instead of gen_int_shift_amount + convert_modes.
|
||
|
||
PR rtl-optimization/93088
|
||
* loop-iv.c (find_single_def_src): Punt after looking through
|
||
128 reg copies for regs with single definitions. Move definitions
|
||
to first uses.
|
||
|
||
2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
|
||
|
||
* config/arm/arm-c.c (arm_cpu_builtins): Define
|
||
__ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
|
||
__ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
|
||
__ARM_BF16_FORMAT_ALTERNATIVE when enabled.
|
||
* config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
|
||
* config/arm/arm-tables.opt: Regenerated.
|
||
* config/arm/arm.c (arm_option_reconfigure_globals): Initialize
|
||
arm_arch_i8mm and arm_arch_bf16 when enabled.
|
||
* config/arm/arm.h (TARGET_I8MM): New macro.
|
||
(TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
|
||
* config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
|
||
* config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
|
||
* config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
|
||
(v8_6_a_simd_variants): New.
|
||
(v8_*_a_simd_variants): Add i8mm and bf16.
|
||
* doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
|
||
|
||
2020-01-02 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR ipa/93087
|
||
* predict.c (compute_function_frequency): Don't call
|
||
warn_function_cold on functions that already have cold attribute.
|
||
|
||
2020-01-01 John David Anglin <danglin@gcc.gnu.org>
|
||
|
||
PR target/67834
|
||
* config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
|
||
COMDAT group function labels in .data.rel.ro.local section.
|
||
* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
|
||
|
||
PR target/93111
|
||
* config/pa/pa.md (scc): Use ordered_comparison_operator instead of
|
||
comparison_operator in B and S integer comparisons. Likewise, use
|
||
ordered_comparison_operator instead of cmpib_comparison_operator in
|
||
cmpib patterns.
|
||
* config/pa/predicates.md (cmpib_comparison_operator): Remove.
|
||
|
||
2020-01-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
Update copyright years.
|
||
|
||
* gcc.c (process_command): Update copyright notice dates.
|
||
* gcov-dump.c (print_version): Ditto.
|
||
* gcov.c (print_version): Ditto.
|
||
* gcov-tool.c (print_version): Ditto.
|
||
* gengtype.c (create_file): Ditto.
|
||
* doc/cpp.texi: Bump @copying's copyright year.
|
||
* doc/cppinternals.texi: Ditto.
|
||
* doc/gcc.texi: Ditto.
|
||
* doc/gccint.texi: Ditto.
|
||
* doc/gcov.texi: Ditto.
|
||
* doc/install.texi: Ditto.
|
||
* doc/invoke.texi: Ditto.
|
||
|
||
2020-01-01 Jan Hubicka <hubicka@ucw.cz>
|
||
|
||
* ipa.c (walk_polymorphic_call_targets): Fix updating of overall
|
||
summary.
|
||
|
||
2020-01-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/93098
|
||
* match.pd (popcount): For shift amounts, use integer_onep
|
||
or wi::to_widest () == cst instead of tree_to_uhwi () == cst
|
||
tests. Make sure that precision is power of two larger than or equal
|
||
to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
|
||
instead of ULL suffixed constants. Formatting fixes.
|
||
|
||
Copyright (C) 2020 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|