74 lines
1.5 KiB
SQL
74 lines
1.5 KiB
SQL
;; GCC assembler includefile for AS1750
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;;
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;; Macros defined:
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;; EFLR.M #d,#s Load the three regs starting at R#s to R#d following.
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;; RET.M #fs Return from function (uses the framesize #fs)
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UC SET 15
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; Return from function ; parameter: framesize
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MACRO RET.M
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IF `1` > 0
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IF `1` <= 16
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AISP R14,`1`
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ELSE
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AIM R14,`1`
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ENDIF
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ENDIF
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LR R15,R14
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URS R15
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ENDMACRO
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; Useful instructions missing from the 1750A standard:
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; Extended Float Load from Registers
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MACRO EFLR.M ; args : #1=dest-regno, #2=source-regno
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ONE SET `1` + 2
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TWO SET `2` + 2
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IF `1` >= `2` || `1`+2 < `2`
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LR R`ONE`,R`TWO`
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DLR R`1`,R`2`
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ELSE
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DLR R`1`,R`2`
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LR R`ONE`,R`TWO`
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DLR R`1`,R`1` ; Just to update condition codes
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ENDIF
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ENDMACRO
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; The following leave the condition codes haywire. But that is
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; accounted for (see notice_update_cc in config/1750a.c.)
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; Double ANd Register with Register
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MACRO DANR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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ANDR R`1`,R`2`
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ANDR R`ONE`,R`TWO`
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ENDMACRO
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; Double OR Register with Register
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MACRO DORR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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ORR R`1`,R`2`
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ORR R`ONE`,R`TWO`
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ENDMACRO
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; Double eXoR Register with Register
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MACRO DXRR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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XORR R`1`,R`2`
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XORR R`ONE`,R`TWO`
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ENDMACRO
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; Double Nand Register with register
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MACRO DNR.M
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ONE SET `1` + 1
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TWO SET `2` + 1
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NR R`1`,R`2`
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NR R`ONE`,R`TWO`
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ENDMACRO
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