678 lines
15 KiB
C
678 lines
15 KiB
C
/* Subroutines for insn-output.c for Convex.
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Copyright (C) 1988, 1993, 1994 Free Software Foundation, Inc.
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This file is part of GNU CC.
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GNU CC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 1, or (at your option)
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any later version.
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GNU CC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GNU CC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "config.h"
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#include "tree.h"
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#include "rtl.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "real.h"
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#include "insn-config.h"
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#include "conditions.h"
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#include "insn-flags.h"
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#include "insn-attr.h"
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#include "output.h"
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#include "expr.h"
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#undef NULL
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#include <stdio.h>
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/* Tables used in convex.h */
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char regno_ok_for_index_p_base[1 + LAST_VIRTUAL_REGISTER + 1];
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enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
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enum reg_class reg_class_from_letter[256];
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/* Target cpu index. */
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int target_cpu;
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/* Boolean to keep track of whether the current section is .text or not.
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Used by .align handler in convex.h. */
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int current_section_is_text;
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/* Communication between output_compare and output_condjump. */
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static rtx cmp_operand0, cmp_operand1;
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static char cmp_modech;
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/* Forwards */
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static rtx frame_argblock;
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static int frame_argblock_size;
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static rtx convert_arg_pushes ();
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static void expand_movstr_call ();
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/* Here from OVERRIDE_OPTIONS at startup. Initialize constant tables. */
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init_convex ()
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{
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int regno;
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/* Set A and S reg classes. */
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for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
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if (A_REGNO_P (regno))
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{
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regno_ok_for_index_p[regno] = 1;
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regno_reg_class[regno] = INDEX_REGS;
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}
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else
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{
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regno_ok_for_index_p[regno] = 0;
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regno_reg_class[regno] = S_REGS;
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}
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/* Can't index off the stack pointer, register 0. */
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regno_ok_for_index_p[STACK_POINTER_REGNUM] = 0;
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regno_reg_class[STACK_POINTER_REGNUM] = SP_REGS;
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/* Can't index off aliases of the stack pointer. */
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regno_ok_for_index_p[VIRTUAL_INCOMING_ARGS_REGNUM] = 1;
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regno_ok_for_index_p[VIRTUAL_STACK_VARS_REGNUM] = 1;
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regno_ok_for_index_p[VIRTUAL_STACK_DYNAMIC_REGNUM] = 0;
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regno_ok_for_index_p[VIRTUAL_OUTGOING_ARGS_REGNUM] = 0;
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/* Can't index off hard reg -1 == pseudos not assigned */
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regno_ok_for_index_p[-1] = 0;
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/* Set reg class letters */
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reg_class_from_letter['a'] = A_REGS;
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reg_class_from_letter['A'] = INDEX_REGS;
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reg_class_from_letter['d'] = S_REGS;
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/* Turn off floating point exception enables in the psw. */
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psw_disable_float ();
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}
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psw_disable_float ()
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{
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#if __convex__ && __GNUC__
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register int *p;
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asm ("mov fp,%0" : "=a" (p));
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while (p)
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{
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p[1] &= ~0x1000c400;
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p = (int *) p[2];
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}
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#endif
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}
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/* Here to output code for a compare insn. Output nothing, just
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record the operands and their mode. */
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char *
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output_cmp (operand0, operand1, modech)
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rtx operand0, operand1;
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char modech;
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{
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cmp_operand0 = operand0;
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cmp_operand1 = operand1;
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cmp_modech = modech;
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return "";
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}
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/* Output code for a conditional jump. The preceding instruction
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is necessarily a compare. Output two instructions, for example
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eq.w a1,a2
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jbra.t L5
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for
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(cmpsi a1 a2)
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(beq L5)
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*/
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char *
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output_condjump (label, cond, jbr_sense)
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rtx label;
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char *cond;
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char jbr_sense;
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{
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rtx operands[3];
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char cmp_op[4];
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char buf[80];
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char jbr_regch;
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strcpy (cmp_op, cond);
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/* [BL] mean the value is being compared against immediate 0.
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Use neg.x, which produces the same carry that eq.x #0 would if it
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existed. In this case operands[1] is a scratch register, not a
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compare operand. */
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if (cmp_modech == 'B' || cmp_modech == 'L')
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{
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cmp_modech = cmp_modech - 'A' + 'a';
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strcpy (cmp_op, "neg");
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}
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/* [WH] mean the value being compared resulted from "add.[wh] #-1,rk"
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when rk was nonnegative -- we can omit equality compares against -1
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or inequality compares against 0. */
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else if (cmp_modech == 'W' || cmp_modech == 'H')
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{
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if (! strcmp (cmp_op, "eq") && cmp_operand1 == constm1_rtx)
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jbr_sense ^= 't' ^ 'f';
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else if (! strcmp (cmp_op, "lt") && cmp_operand1 == const0_rtx)
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;
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else
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cmp_modech = cmp_modech - 'A' + 'a';
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}
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/* Constant must be first; swap operands if necessary.
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If lt, le, ltu, leu are swapped, change to le, lt, leu, ltu
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and reverse the sense of the jump. */
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if (! REG_P (cmp_operand1))
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{
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operands[0] = cmp_operand1;
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operands[1] = cmp_operand0;
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if (cmp_op[0] == 'l')
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{
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cmp_op[1] ^= 'e' ^ 't';
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jbr_sense ^= 't' ^ 'f';
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}
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}
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else
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{
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operands[0] = cmp_operand0;
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operands[1] = cmp_operand1;
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}
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operands[2] = label;
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if (S_REG_P (operands[1]))
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jbr_regch = 's';
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else if (A_REG_P (operands[1]))
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jbr_regch = 'a';
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else
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abort ();
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if (cmp_modech == 'W' || cmp_modech == 'H')
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sprintf (buf, "jbr%c.%c %%l2", jbr_regch, jbr_sense);
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else
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sprintf (buf, "%s.%c %%0,%%1\n\tjbr%c.%c %%l2",
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cmp_op, cmp_modech, jbr_regch, jbr_sense);
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output_asm_insn (buf, operands);
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return "";
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}
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/* Return 1 if OP is valid for cmpsf.
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In IEEE mode, +/- zero compares are not handled by
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the immediate versions of eq.s and on some machines, lt.s, and le.s.
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So disallow 0.0 as the immediate operand of xx.s compares in IEEE mode. */
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int
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nonmemory_cmpsf_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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{
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#if _IEEE_FLOAT_
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if (op == CONST0_RTX (SFmode))
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return 0;
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#endif
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return nonmemory_operand (op, mode);
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}
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/* Convex /bin/as does not like unary minus in some contexts.
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Simplify CONST addresses to remove it. */
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rtx
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simplify_for_convex (x)
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rtx x;
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{
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switch (GET_CODE (x))
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{
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case MINUS:
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if (GET_CODE (XEXP (x, 1)) == CONST_INT
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&& INTVAL (XEXP (x, 1)) < 0)
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{
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PUT_CODE (x, PLUS);
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XEXP (x, 1) = GEN_INT (- INTVAL (XEXP (x, 1)));
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}
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break;
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case CONST:
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return simplify_for_convex (XEXP (x, 0));
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}
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return x;
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}
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/* Routines to separate CONST_DOUBLEs into component parts. */
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int
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const_double_high_int (x)
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rtx x;
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{
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if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
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return CONST_DOUBLE_LOW (x);
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else
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return CONST_DOUBLE_HIGH (x);
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}
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int
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const_double_low_int (x)
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rtx x;
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{
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if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
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return CONST_DOUBLE_HIGH (x);
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else
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return CONST_DOUBLE_LOW (x);
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}
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/* Inline block copy. */
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void
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expand_movstr (operands)
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rtx *operands;
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{
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rtx dest = operands[0];
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rtx src = operands[1];
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int align = INTVAL (operands[3]);
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int nregs, maxsize;
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unsigned len;
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enum machine_mode mode;
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rtx reg, load, store, prev_store, prev_store_2;
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int size;
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/* Decide how many regs to use, depending on load latency, and what
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size pieces to move, depending on whether machine does unaligned
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loads and stores efficiently. */
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if (TARGET_C1)
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{
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/* ld.l latency is 4, no alignment problems. */
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nregs = 3, maxsize = 8;
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}
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else if (TARGET_C2)
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{
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/* loads are latency 2 if we avoid ld.l not at least word aligned. */
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if (align >= 4)
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nregs = 2, maxsize = 8;
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else
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nregs = 2, maxsize = 4;
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}
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else if (TARGET_C34)
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{
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/* latency is 4 if aligned, horrible if not. */
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nregs = 3, maxsize = align;
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}
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else if (TARGET_C38)
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{
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/* latency is 2 if at least word aligned, 3 or 4 if unaligned. */
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if (align >= 4)
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nregs = 2, maxsize = 8;
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else
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nregs = 3, maxsize = 8;
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}
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else
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abort ();
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/* Caller is not necessarily prepared for us to fail in this
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expansion. So fall back by generating memcpy call here. */
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if (GET_CODE (operands[2]) != CONST_INT
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|| (len = INTVAL (operands[2])) > (unsigned) 32 * maxsize)
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{
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expand_movstr_call (operands);
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return;
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}
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reg = 0;
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prev_store = prev_store_2 = 0;
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while (len > 0)
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{
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if (len >= 8 && maxsize >= 8)
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mode = DImode;
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else if (len >= 4 && maxsize >= 4)
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mode = SImode;
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else if (len >= 2 && maxsize >= 2)
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mode = HImode;
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else
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mode = QImode;
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/* If no temp pseudo to reuse, or not the right mode, make one */
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if (! reg || GET_MODE (reg) != mode)
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reg = gen_reg_rtx (mode);
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/* Get src and dest in the right mode */
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if (GET_MODE (src) != mode)
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src = change_address (src, mode, 0),
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dest = change_address (dest, mode, 0);
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/* Make load and store patterns for this piece */
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load = gen_rtx (SET, VOIDmode, reg, src);
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store = gen_rtx (SET, VOIDmode, dest, reg);
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/* Emit the load and the store from last time.
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When we emit a store, we can reuse its temp reg. */
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emit_insn (load);
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if (prev_store)
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{
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reg = SET_SRC (prev_store);
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emit_insn (prev_store);
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}
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else
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reg = 0;
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/* Queue up the store, for next time or the time after that. */
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if (nregs == 2)
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prev_store = store;
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else
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prev_store = prev_store_2, prev_store_2 = store;
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/* Advance to next piece. */
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size = GET_MODE_SIZE (mode);
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src = adj_offsettable_operand (src, size);
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dest = adj_offsettable_operand (dest, size);
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len -= size;
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}
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/* Finally, emit the last stores. */
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if (prev_store)
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emit_insn (prev_store);
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if (prev_store_2)
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emit_insn (prev_store_2);
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}
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static void
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expand_movstr_call (operands)
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rtx *operands;
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{
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emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
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VOIDmode, 3,
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XEXP (operands[0], 0), Pmode,
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XEXP (operands[1], 0), Pmode,
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convert_to_mode (TYPE_MODE (sizetype), operands[2],
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TREE_UNSIGNED (sizetype)),
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TYPE_MODE (sizetype));
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}
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#if _IEEE_FLOAT_
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#define MAX_FLOAT 3.4028234663852886e+38
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#define MIN_FLOAT 1.1754943508222875e-38
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#else
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#define MAX_FLOAT 1.7014117331926443e+38
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#define MIN_FLOAT 2.9387358770557188e-39
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#endif
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int
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check_float_value (mode, dp, overflow)
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enum machine_mode mode;
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REAL_VALUE_TYPE *dp;
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int overflow;
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{
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REAL_VALUE_TYPE d = *dp;
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if (overflow)
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{
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*dp = MAX_FLOAT;
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return 1;
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}
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if (mode == SFmode)
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{
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if (d > MAX_FLOAT)
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{
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*dp = MAX_FLOAT;
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return 1;
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}
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else if (d < -MAX_FLOAT)
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{
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*dp = -MAX_FLOAT;
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return 1;
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}
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else if ((d > 0 && d < MIN_FLOAT) || (d < 0 && d > -MIN_FLOAT))
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{
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*dp = 0.0;
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return 1;
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}
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}
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return 0;
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}
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/* Output the label at the start of a function.
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Precede it with the number of formal args so debuggers will have
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some idea of how many args to print. */
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void
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asm_declare_function_name (file, name, decl)
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FILE *file;
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char *name;
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tree decl;
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{
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tree parms;
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int nargs = list_length (DECL_ARGUMENTS (decl));
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char *p, c;
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extern char *version_string;
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static char vers[4];
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int i;
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p = version_string;
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for (i = 0; i < 3; ) {
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c = *p;
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if (c - '0' < (unsigned) 10)
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vers[i++] = c;
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if (c == 0 || c == ' ')
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vers[i++] = '0';
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else
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p++;
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}
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fprintf (file, "\tds.b \"g%s\"\n", vers);
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if (nargs < 100)
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fprintf (file, "\tds.b \"+%02d\\0\"\n", nargs);
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else
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fprintf (file, "\tds.b \"+00\\0\"\n");
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ASM_OUTPUT_LABEL (file, name);
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}
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/* Print an instruction operand X on file FILE.
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CODE is the code from the %-spec that requested printing this operand;
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if `%z3' was used to print operand 3, then CODE is 'z'. */
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/* Convex codes:
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%u prints a CONST_DOUBLE's high word
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%v prints a CONST_DOUBLE's low word
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%z prints a CONST_INT shift count as a multiply operand -- viz. 1 << n.
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*/
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print_operand (file, x, code)
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FILE *file;
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rtx x;
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char code;
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{
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long u[2];
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REAL_VALUE_TYPE d;
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switch (GET_CODE (x))
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{
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case REG:
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fprintf (file, "%s", reg_names[REGNO (x)]);
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break;
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case MEM:
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output_address (XEXP (x, 0));
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break;
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case CONST_DOUBLE:
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REAL_VALUE_FROM_CONST_DOUBLE (d, x);
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switch (GET_MODE (x)) {
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case DFmode:
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#if 0 /* doesn't work, produces dfloats */
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REAL_VALUE_TO_TARGET_DOUBLE (d, u);
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#else
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{
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union { double d; int i[2]; } t;
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t.d = d;
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u[0] = t.i[0];
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u[1] = t.i[1];
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}
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#endif
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if (code == 'u')
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fprintf (file, "#%#x", u[0]);
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else if (code == 'v')
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fprintf (file, "#%#x", u[1]);
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else
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outfloat (file, d, "%.17e", "#", "");
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break;
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case SFmode:
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outfloat (file, d, "%.9e", "#", "");
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break;
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default:
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if (code == 'u')
|
||
fprintf (file, "#%d", CONST_DOUBLE_HIGH (x));
|
||
else
|
||
fprintf (file, "#%d", CONST_DOUBLE_LOW (x));
|
||
}
|
||
break;
|
||
|
||
default:
|
||
if (code == 'z')
|
||
{
|
||
if (GET_CODE (x) != CONST_INT)
|
||
abort ();
|
||
fprintf (file, "#%d", 1 << INTVAL (x));
|
||
}
|
||
else
|
||
{
|
||
putc ('#', file);
|
||
output_addr_const (file, x);
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Print a memory operand whose address is X, on file FILE. */
|
||
|
||
print_operand_address (file, addr)
|
||
FILE *file;
|
||
rtx addr;
|
||
{
|
||
rtx index = 0;
|
||
rtx offset = 0;
|
||
|
||
if (GET_CODE (addr) == MEM)
|
||
{
|
||
fprintf (file, "@");
|
||
addr = XEXP (addr, 0);
|
||
}
|
||
|
||
switch (GET_CODE (addr))
|
||
{
|
||
case REG:
|
||
index = addr;
|
||
break;
|
||
|
||
case PLUS:
|
||
index = XEXP (addr, 0);
|
||
if (REG_P (index))
|
||
offset = XEXP (addr, 1);
|
||
else
|
||
{
|
||
offset = XEXP (addr, 0);
|
||
index = XEXP (addr, 1);
|
||
if (! REG_P (index))
|
||
abort ();
|
||
}
|
||
break;
|
||
|
||
default:
|
||
offset = addr;
|
||
break;
|
||
}
|
||
|
||
if (offset)
|
||
output_addr_const (file, offset);
|
||
|
||
if (index)
|
||
fprintf (file, "(%s)", reg_names[REGNO (index)]);
|
||
}
|
||
|
||
/* Output a float to FILE, value VALUE, format FMT, preceded by PFX
|
||
and followed by SFX. */
|
||
|
||
outfloat (file, value, fmt, pfx, sfx)
|
||
FILE *file;
|
||
REAL_VALUE_TYPE value;
|
||
char *fmt, *pfx, *sfx;
|
||
{
|
||
char buf[64];
|
||
fputs (pfx, file);
|
||
REAL_VALUE_TO_DECIMAL (value, fmt, buf);
|
||
fputs (buf, file);
|
||
fputs (sfx, file);
|
||
}
|
||
|
||
/* Here during RTL generation of return. If we are at the final return
|
||
in a function, go through the function and replace pushes with stores
|
||
into a frame arg block. This is similar to what ACCUMULATE_OUTGOING_ARGS
|
||
does, but we must index off the frame pointer, not the stack pointer,
|
||
and the calling sequence does not require the arg block to be at the
|
||
top of the stack. */
|
||
|
||
replace_arg_pushes ()
|
||
{
|
||
/* Doesn't work yet. */
|
||
}
|
||
|
||
/* Output the insns needed to do a call. operands[] are
|
||
0 - MEM, the place to call
|
||
1 - CONST_INT, the number of bytes in the arg list
|
||
2 - CONST_INT, the number of arguments
|
||
3 - CONST_INT, the number of bytes to pop
|
||
4 - address of the arg list.
|
||
*/
|
||
|
||
char *
|
||
output_call (insn, operands)
|
||
rtx insn, *operands;
|
||
{
|
||
if (operands[4] == stack_pointer_rtx)
|
||
output_asm_insn ("mov sp,ap", operands);
|
||
else
|
||
abort ();
|
||
|
||
if (TARGET_ARGCOUNT)
|
||
output_asm_insn ("pshea %a2", operands);
|
||
|
||
output_asm_insn ("calls %0", operands);
|
||
|
||
output_asm_insn ("ld.w 12(fp),ap", operands);
|
||
|
||
if (operands[4] == stack_pointer_rtx && operands[3] != const0_rtx)
|
||
output_asm_insn ("add.w %3,sp", operands);
|
||
|
||
return "";
|
||
}
|
||
|
||
|
||
/* Here after reloading, before the second scheduling pass. */
|
||
|
||
emit_ap_optimizations ()
|
||
{
|
||
/* Removed for now. */
|
||
}
|
||
|