1479 lines
50 KiB
Plaintext
1479 lines
50 KiB
Plaintext
2021-01-15 Carl Love <cel@us.ibm.com>
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* config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
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New defines.
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* config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
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* config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
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DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
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DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
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MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
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Add builtin define.
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(MULH, DIVE, MOD): Add new BU_P10_OVERLOAD_2 definitions.
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* config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
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VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
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New overloaded definitions.
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(builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
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P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
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P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
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P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
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P10V_BUILTIN_MULHU_V4SI]: Add case
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statement for builtins.
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* config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
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* config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
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(UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
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(vsx_mul_v2di): Add if TARGET_POWER10 statement.
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(vsx_udiv_v2di): Add if TARGET_POWER10 statement.
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(dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
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mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
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Add define_insn, mode is VIlong.
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* doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
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Add builtin descriptions.
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2021-01-15 Eric Botcazou <ebotcazou@adacore.com>
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* final.c (final_start_function_1): Reset force_source_line.
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2021-01-15 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/96669
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* match.pd (((1 << A) & 1) != 0 -> A == 0,
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((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
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possibly different power of two constants and to right shift too.
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2021-01-15 Jakub Jelinek <jakub@redhat.com>
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PR tree-optimization/96681
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* match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
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((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
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((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
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((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.
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2021-01-15 Alexandre Oliva <oliva@adacore.com>
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* opts.c (gen_command_line_string): Exclude -dumpbase-ext.
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2021-01-15 Tamar Christina <tamar.christina@arm.com>
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* config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
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cmul<conj_op><mode>3): New.
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* config/aarch64/iterators.md (UNSPEC_FCMUL,
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UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
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UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
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FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
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sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
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(rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
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(rot_op): Renamed to conj_op.
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* config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
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cmul<conj_op><mode>3): New.
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* config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
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cmul<conj_op><mode>3): New.
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2021-01-15 David Malcolm <dmalcolm@redhat.com>
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PR bootstrap/98696
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* diagnostic.c
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(selftest::test_print_parseable_fixits_bytes_vs_display_columns):
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Escape the tempfile name when constructing the expected output.
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2021-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
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Rename to...
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(aarch64_<su>mlsl_hi<mode>): ... This.
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(aarch64_<su>mlsl_hi<mode>): Define.
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(*aarch64_<su>mlsl<mode): Rename to...
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(aarch64_<su>mlsl<mode): ... This.
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* config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
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smlsl_hi, umlsl_hi): Define builtins.
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* config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
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vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
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vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
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vmlsl_u16, vmlsl_u32): Reimplement with builtins.
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2021-01-15 Uroš Bizjak <ubizjak@gmail.com>
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* config/i386/i386-c.c (ix86_target_macros):
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Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.
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2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
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PR target/88836
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* config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
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* Makefile.in (RTL_SSA_H): New variable.
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* config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
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* config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
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* config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
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pass_combine.
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* config/aarch64/aarch64-cc-fusion.cc: New file.
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2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
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* recog.h (insn_change_watermark::~insn_change_watermark): Avoid
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calling cancel_changes for changes that no longer exist.
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2021-01-15 Richard Sandiford <richard.sandiford@arm.com>
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* rtl-ssa/functions.h (function_info::ref_defs): Rename to...
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(function_info::reg_defs): ...this.
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* rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
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(function_info::reg_defs): ...this.
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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PR target/71233
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* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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Revert:
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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PR target/71233
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* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
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2021-01-15 Richard Biener <rguenther@suse.de>
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PR tree-optimization/96376
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* tree-vect-stmts.c (get_load_store_type): Disregard alignment
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for VMAT_INVARIANT.
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2021-01-15 Martin Liska <mliska@suse.cz>
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* doc/install.texi: Document that some tests need pytest module.
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* doc/sourcebuild.texi: Likewise.
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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PR target/71233
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* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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* config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
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(mve_vshrq_n_u<mode>_imm): Likewise.
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* config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
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* config/arm/vec-common.md: ... here.
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2021-01-15 Christophe Lyon <christophe.lyon@linaro.org>
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* config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
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vec-commond.md.
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* config/arm/neon.md (vashl<mode>3): Delete.
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* config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
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(vasl<mode>3): New expander.
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2021-01-15 Richard Biener <rguenther@suse.de>
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PR tree-optimization/98685
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* tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
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of vector extern defs.
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2021-01-14 David Malcolm <dmalcolm@redhat.com>
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PR jit/98586
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* diagnostic.c (diagnostic_kind_text): Break out this array
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from...
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(diagnostic_build_prefix): ...here.
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(fancy_abort): Detect when diagnostic_initialize has not yet been
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called and fall back to a minimal implementation of printing the
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ICE, rather than segfaulting in internal_error.
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2021-01-14 David Malcolm <dmalcolm@redhat.com>
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* diagnostic.c (diagnostic_initialize): Eliminate
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parseable_fixits_p in favor of initializing extra_output_kind from
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GCC_EXTRA_DIAGNOSTIC_OUTPUT.
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(convert_column_unit): New function, split out from...
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(diagnostic_converted_column): ...this.
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(print_parseable_fixits): Add "column_unit" and "tabstop" params.
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Use them to call convert_column_unit on the column values.
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(diagnostic_report_diagnostic): Eliminate conditional on
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parseable_fixits_p in favor of a switch statement on
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extra_output_kind, passing the appropriate values to the new
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params of print_parseable_fixits.
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(selftest::test_print_parseable_fixits_none): Update for new
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params of print_parseable_fixits.
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(selftest::test_print_parseable_fixits_insert): Likewise.
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(selftest::test_print_parseable_fixits_remove): Likewise.
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(selftest::test_print_parseable_fixits_replace): Likewise.
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(selftest::test_print_parseable_fixits_bytes_vs_display_columns):
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New.
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(selftest::diagnostic_c_tests): Call it.
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* diagnostic.h (enum diagnostics_extra_output_kind): New.
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(diagnostic_context::parseable_fixits_p): Delete field in favor
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of...
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(diagnostic_context::extra_output_kind): ...this new field.
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* doc/invoke.texi (Environment Variables): Add
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GCC_EXTRA_DIAGNOSTIC_OUTPUT.
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* opts.c (common_handle_option): Update handling of
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OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
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fields.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* tree-vect-slp-patterns.c (class complex_operations_pattern,
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complex_operations_pattern::matches,
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complex_operations_pattern::recognize,
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complex_operations_pattern::build): New.
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(slp_patterns): Use it.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
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* optabs.def (cmls_optab, cmls_conj_optab): New.
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* doc/md.texi: Document them.
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* tree-vect-slp-patterns.c (class complex_fms_pattern,
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complex_fms_pattern::matches, complex_fms_pattern::recognize,
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complex_fms_pattern::build): New.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
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* optabs.def (cmla_optab, cmla_conj_optab): New.
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* doc/md.texi: Document them.
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* tree-vect-slp-patterns.c (vect_match_call_p,
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class complex_fma_pattern, vect_slp_reset_pattern,
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complex_fma_pattern::matches, complex_fma_pattern::recognize,
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complex_fma_pattern::build): New.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
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* optabs.def (cmul_optab, cmul_conj_optab): New.
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* doc/md.texi: Document them.
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* tree-vect-slp-patterns.c (vect_match_call_complex_mla,
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vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
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vect_build_combine_node, class complex_mul_pattern,
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complex_mul_pattern::matches, complex_mul_pattern::recognize,
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complex_mul_pattern::build): New.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* tree-vect-slp.c (optimize_load_redistribution_1): New.
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(optimize_load_redistribution, vect_is_slp_load_node): New.
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(vect_match_slp_patterns): Use it.
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2021-01-14 Tamar Christina <tamar.christina@arm.com>
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* tree-vect-slp-patterns.c (complex_add_pattern::build):
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Elide nodes.
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2021-01-14 Thomas Schwinge <thomas@codesourcery.com>
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* config/gcn/mkoffload.c (main): Create an offload image only in
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64-bit configurations.
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2021-01-14 H.J. Lu <hjl.tools@gmail.com>
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PR target/98667
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* config/i386/i386-options.c (ix86_option_override_internal):
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Issue an error for -fcf-protection with CF_BRANCH when compiling
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for 32-bit non-TARGET_CMOV targets.
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2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
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PR target/98671
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* config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
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Remove declaration and initialization of shadow variable "ret".
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(ix86_option_override_internal): Remove delcaration of
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shadow variable "i". Redeclare shadowed variable to unsigned.
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* common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
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* config/i386/i386-builtins.c (get_builtin_code_for_version):
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Update for redeclaration.
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* config/i386/i386.h (pta_size): Ditto.
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2021-01-14 Richard Biener <rguenther@suse.de>
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PR tree-optimization/98674
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* tree-data-ref.c (base_supports_access_fn_components_p): New.
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(initialize_data_dependence_relation): For two bases without
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possible access fns resort to type size equality when determining
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shape compatibility.
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2021-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
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PR target/66791
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* config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
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<=, >= operators in vcle and vcge intrinsics respectively.
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* config/arm/arm_neon_builtins.def: Remove entry for
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vcge and vcgeu.
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2021-01-14 Uroš Bizjak <ubizjak@gmail.com>
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PR target/98671
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* config/i386/i386-options.c (ix86_function_specific_save):
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Remove redundant assignment to opts->x_ix86_branch_cost.
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* config/i386/i386.c (ix86_prefetch_sse):
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Rename from x86_prefetch_sse. Update all uses.
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* config/i386/i386.h: Update for rename.
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* config/i386/i386-options.h: Ditto.
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2021-01-14 Jakub Jelinek <jakub@redhat.com>
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PR target/98670
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* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
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*sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
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Use Bm instead of m for non-avx. Add isa attribute.
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|
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2021-01-14 Jakub Jelinek <jakub@redhat.com>
|
||
|
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PR tree-optimization/96688
|
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* match.pd (~(X >> Y) -> ~X >> Y): New simplification if
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~X can be simplified.
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2021-01-14 Richard Sandiford <richard.sandiford@arm.com>
|
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* tree-vect-stmts.c (vect_model_load_cost): Account for unused
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IFN_LOAD_LANES results.
|
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|
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2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
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* config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
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Define.
|
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(aarch64_xtn<mode>): Likewise.
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* config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
|
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Define
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builtins.
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* config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
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builtin.
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(vmovl_s16): Likewise.
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(vmovl_s32): Likewise.
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(vmovl_u8): Likewise.
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(vmovl_u16): Likewise.
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(vmovl_u32): Likewise.
|
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(vmovn_s16): Likewise.
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(vmovn_s32): Likewise.
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(vmovn_s64): Likewise.
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(vmovn_u16): Likewise.
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(vmovn_u32): Likewise.
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(vmovn_u64): Likewise.
|
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|
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2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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|
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* config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
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Define.
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(aarch64_<su>qxtn2<mode>_be): Likewise.
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(aarch64_<su>qxtn2<mode>): Likewise.
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* config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
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Define builtins.
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* config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
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(su): Handle ss_truncate and us_truncate.
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* config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
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builtin.
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(vqmovn_high_s32): Likewise.
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(vqmovn_high_s64): Likewise.
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(vqmovn_high_u16): Likewise.
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(vqmovn_high_u32): Likewise.
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(vqmovn_high_u64): Likewise.
|
||
|
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2021-01-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
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* config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
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Define.
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(aarch64_xtn2<mode>_be): Likewise.
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(aarch64_xtn2<mode>): Likewise.
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* config/aarch64/aarch64-simd-builtins.def (xtn2): Define
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builtins.
|
||
* config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
|
||
builtins.
|
||
(vmovn_high_s32): Likewise.
|
||
(vmovn_high_s64): Likewise.
|
||
(vmovn_high_u16): Likewise.
|
||
(vmovn_high_u32): Likewise.
|
||
(vmovn_high_u64): Likewise.
|
||
|
||
2021-01-13 Stafford Horne <shorne@gmail.com>
|
||
|
||
* config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.
|
||
|
||
2021-01-13 Stafford Horne <shorne@gmail.com>
|
||
|
||
* config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.
|
||
|
||
2021-01-13 Stafford Horne <shorne@gmail.com>
|
||
|
||
* config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
|
||
define for __or1k_hard_float__.
|
||
|
||
2021-01-13 Stafford Horne <shorne@gmail.com>
|
||
|
||
* config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
|
||
(PROFILE_HOOK): Define to call _mcount.
|
||
(FUNCTION_PROFILER): Change from abort to no-op.
|
||
|
||
2021-01-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/96691
|
||
* match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
|
||
(~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
|
||
(~D ^ C) or (D ^ C) can be simplified.
|
||
|
||
2021-01-13 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/92645
|
||
* match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
|
||
until after vector lowering.
|
||
|
||
2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
|
||
to SVE_I.
|
||
(@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
|
||
(*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.
|
||
|
||
2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
|
||
to SVE_I.
|
||
(@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
|
||
(*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.
|
||
|
||
2021-01-13 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/92645
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
|
||
BIT_FIELD_REF argument.
|
||
(vect_build_slp_tree_2): Record the desired vector type
|
||
on the external vector def.
|
||
(vectorizable_slp_permutation): Handle required punning
|
||
of existing vector defs.
|
||
|
||
2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.
|
||
|
||
2021-01-13 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/sh/sh.md (movsf_ie): Remove operands[2] test.
|
||
|
||
2021-01-13 Samuel Thibault <samuel.thibault@ens-lyon.org>
|
||
|
||
* config.gcc [$target == *-*-gnu*]: Enable
|
||
'default_gnu_indirect_function'.
|
||
|
||
2021-01-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/95905
|
||
* optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
|
||
registers before calling targetm.vectorize.vec_perm_const, only after
|
||
that.
|
||
* config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
|
||
two argument permutation when one operand is zero vector and only
|
||
after that force operands into registers.
|
||
* config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
|
||
define_insn_and_split pattern.
|
||
(*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
|
||
(*avx512f_zero_extendv16hiv16si2_1): Likewise.
|
||
(*avx2_zero_extendv8hiv8si2_1): Likewise.
|
||
(*avx512f_zero_extendv8siv8di2_1): Likewise.
|
||
(*avx2_zero_extendv4siv4di2_1): Likewise.
|
||
* config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
|
||
into registers.
|
||
* config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
|
||
* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
|
||
* config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
|
||
* config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
|
||
* config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
|
||
* config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise. Use std::swap.
|
||
|
||
2021-01-13 Martin Liska <mliska@suse.cz>
|
||
|
||
PR tree-optimization/98455
|
||
* gimple-if-to-switch.cc (condition_info::record_phi_mapping):
|
||
Record also virtual PHIs.
|
||
(pass_if_to_switch::execute): Return TODO_cleanup_cfg only
|
||
conditionally.
|
||
|
||
2021-01-13 Jonathan Wakely <jwakely@redhat.com>
|
||
|
||
* doc/invoke.texi (C++ Modules): Fix typos.
|
||
|
||
2021-01-13 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98640
|
||
* tree-ssa-sccvn.c (visit_nary_op): Do not try to
|
||
handle plus or minus from a truncated operand to be
|
||
sign-extended.
|
||
|
||
2021-01-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/96938
|
||
* config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
|
||
define_insn_and_split patterns.
|
||
(splitter after *btr<mode>_2): New splitter.
|
||
|
||
2021-01-13 Martin Liska <mliska@suse.cz>
|
||
|
||
PR ipa/98652
|
||
* cgraphunit.c (analyze_functions): Remove dead code.
|
||
|
||
2021-01-13 Qian Jianhua <qianjh@cn.fujitsu.com>
|
||
|
||
* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
|
||
* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
|
||
(a64fx_regmove_cost, a64fx_vector_cost): New.
|
||
(a64fx_tunings): Use the new added cost tables.
|
||
|
||
2021-01-13 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/95905
|
||
* config/i386/predicates.md (pmovzx_parallel): New predicate.
|
||
* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
|
||
define_insn_and_split pattern.
|
||
(*sse4_1_zero_extendv4hiv4si2_3): Likewise.
|
||
(*sse4_1_zero_extendv2siv2di2_3): Likewise.
|
||
|
||
2021-01-13 Julian Brown <julian@codesourcery.com>
|
||
|
||
* config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
|
||
to fix v0 register.
|
||
|
||
2021-01-13 Julian Brown <julian@codesourcery.com>
|
||
|
||
* config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
|
||
on entry to a BB.
|
||
|
||
2021-01-13 Julian Brown <julian@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
|
||
for reciprocal-approximation instructions.
|
||
(div<mode>3): Use fused multiply-accumulate operations for reciprocal
|
||
refinement and division result.
|
||
* config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.
|
||
|
||
2021-01-13 Julian Brown <julian@codesourcery.com>
|
||
|
||
* config/gcn/gcn-valu.md (subdf): Rename to...
|
||
(subdf3): This.
|
||
|
||
2021-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* gcov.c (source_info::debug): Fix printf format for 32-bit hosts.
|
||
|
||
2021-01-12 Andrea Corallo <andrea.corallo@arm.com>
|
||
|
||
* function-abi.h: Fix typo.
|
||
|
||
2021-01-12 Christophe Lyon <christophe.lyon@linaro.org>
|
||
|
||
PR target/97875
|
||
PR target/97875
|
||
* config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
|
||
(ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
|
||
(ARM_HAVE_NEON_V2DI_LDST): Likewise.
|
||
(ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
|
||
(ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
|
||
(ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
|
||
(ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
|
||
(ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
|
||
(ARM_HAVE_V2DI_LDST): Likewise.
|
||
* config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
|
||
(*movmisalign<mode>_mve_load): New pattern.
|
||
* config/arm/neon.md (movmisalign<mode>): Move to ...
|
||
* config/arm/vec-common.md: ... here.
|
||
|
||
2021-01-12 Vladimir N. Makarov <vmakarov@redhat.com>
|
||
|
||
PR target/97969
|
||
* lra-eliminations.c (eliminate_regs_in_insn): Add transformation
|
||
of pattern 'plus (plus (hard reg, const), pseudo)'.
|
||
|
||
2021-01-12 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98550
|
||
* tree-vect-slp.c (vect_record_max_nunits): Check whether
|
||
the group size is a multiple of the vector element count.
|
||
(vect_build_slp_tree_1): When we need to fail because
|
||
the vector type choosen causes unrolling do so lazily
|
||
without affecting matches only at the end to guide group splitting.
|
||
|
||
2021-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
PR c++/97284
|
||
* optc-save-gen.awk: Compare also n_target_save vars with
|
||
strcmp.
|
||
|
||
2021-01-12 Martin Liska <mliska@suse.cz>
|
||
|
||
* gcov.c (source_info::debug): New.
|
||
(print_usage): Add --debug (-D) option.
|
||
(process_args): Likewise.
|
||
(generate_results): Call src->debug after
|
||
accumulate_line_counts.
|
||
(read_graph_file): Properly assign id for EXIT_BLOCK.
|
||
* profile.c (branch_prob): Dump function body before it is
|
||
instrumented.
|
||
|
||
2021-01-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/98629
|
||
* tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
|
||
unless returning non-zero.
|
||
|
||
2021-01-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/95731
|
||
* tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
|
||
x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
|
||
(optimize_range_tests): Call optimize_range_tests_cmp_bitwise
|
||
only after optimize_range_tests_var_bound.
|
||
|
||
2021-01-12 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
|
||
* configure: Regenerated.
|
||
|
||
2021-01-12 liuhongt <hongtao.liu@intel.com>
|
||
|
||
PR target/98612
|
||
* config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
|
||
Deleted.
|
||
* config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
|
||
dead code.
|
||
|
||
2021-01-12 Alexandre Oliva <oliva@adacore.com>
|
||
|
||
* ssa-iterators.h (end_imm_use_stmt_traverse): Forward
|
||
declare.
|
||
(auto_end_imm_use_stmt_traverse): New struct.
|
||
(FOR_EACH_IMM_USE_STMT): Use it.
|
||
(BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
|
||
along with uses...
|
||
* gimple-ssa-strength-reduction.c: ... here, ...
|
||
* graphite-scop-detection.c: ... here, ...
|
||
* ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
|
||
* tree-predcom.c, tree-ssa-ccp.c: ... here, ...
|
||
* tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
|
||
* tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
|
||
* tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
|
||
* tree-vect-slp.c: ... and here, ...
|
||
* doc/tree-ssa.texi: ... and the example here.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
|
||
SVE_FULL_I to SVE_I. Generate an UNSPEC_PRED_X.
|
||
(*sdiv_pow2<mode>3): New pattern.
|
||
(@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
|
||
Wrap the ASRD in an UNSPEC_PRED_X.
|
||
(*cond_<sve_int_op><mode>_2): Likewise. Replace the UNSPEC_PRED_X
|
||
predicate with a constant PTRUE, if it isn't already.
|
||
(*cond_<sve_int_op><mode>_z): Replace with...
|
||
(*cond_<sve_int_op><mode>_any): ...this new pattern.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
|
||
SVE_FULL_I to SVE_I.
|
||
(*cond_bic<mode>_any): Likewise.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
|
||
(@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
|
||
to SVE_I.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
|
||
SVE_FULL_I to SVE_I.
|
||
(*aarch64_cond_<su>abd<mode>_2): Likewise.
|
||
(*aarch64_cond_<su>abd<mode>_any): Likewise.
|
||
(@aarch64_pred_<su>abd<mode>): Likewise. Use UNSPEC_PRED_X
|
||
for the max and min but not for the minus.
|
||
(*aarch64_cond_<su>abd<mode>_3): New pattern.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/iterators.md (SVE_24I): New iterator.
|
||
* config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
|
||
SVE_FULL_SDI to SVE_24I. Use containers rather than elements.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
|
||
(*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
|
||
to SVE_I.
|
||
(*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
|
||
(*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
|
||
(*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
|
||
(*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
|
||
(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
|
||
(*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
|
||
to SVE_I.
|
||
|
||
2021-01-11 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
|
||
(v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
|
||
(*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.
|
||
|
||
2021-01-11 Martin Liska <mliska@suse.cz>
|
||
|
||
PR jit/98615
|
||
* symtab-clones.h (clone_info::release): Release
|
||
symtab::m_clones with ggc_delete as it's a GGC memory.
|
||
|
||
2021-01-11 Matthias Klose <doko@ubuntu.com>
|
||
|
||
* Makefile.in (LINK_PROGRESS): Show the link target.
|
||
|
||
2021-01-11 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/91403
|
||
* tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
|
||
single-element interleaving group size at 4096 elements.
|
||
|
||
2021-01-11 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98526
|
||
* tree-vect-loop.c (vect_model_reduction_cost): Remove costing
|
||
of the actual reduction op for the regular case.
|
||
(vectorizable_reduction): Cost the stmts
|
||
vect_transform_reduction produces here.
|
||
|
||
2021-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
|
||
|
||
* tree-ssa-forwprop.c (simplify_vector_constructor): For
|
||
big-endian, use UNPACK[_FLOAT]_HI.
|
||
|
||
2021-01-11 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* tree-vect-slp-patterns.c (class complex_pattern,
|
||
class complex_add_pattern): Add parameters to matches.
|
||
(complex_add_pattern::build): Free memory.
|
||
(complex_add_pattern::matches): Move validation end of match.
|
||
(complex_add_pattern::recognize): Likewise.
|
||
|
||
2021-01-11 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* tree-vect-slp-patterns.c (linear_loads_p): Fix externals.
|
||
|
||
2021-01-11 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
* tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.
|
||
|
||
2021-01-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/95867
|
||
* tree-ssa-math-opts.h: New header.
|
||
* tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
|
||
(powi_as_mults): No longer static. Use build_one_cst instead of
|
||
build_real. Formatting fix.
|
||
* tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
|
||
(attempt_builtin_powi): Handle multiplication reassociation without
|
||
powi_fndecl using powi_as_mults.
|
||
(reassociate_bb): For integral types don't require
|
||
-funsafe-math-optimizations to call attempt_builtin_powi.
|
||
|
||
2021-01-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/95852
|
||
* tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
|
||
mul_stmts parameter type to vec<gimple *> &. Before cond_stmt
|
||
allow in the bb any of the stmts in that vector, div_stmt and
|
||
up to 3 cast stmts.
|
||
(arith_cast_equal_p): New function.
|
||
(arith_overflow_check_p): Add cast_stmt argument, handle signed
|
||
multiply overflow checks.
|
||
(match_arith_overflow): Adjust caller. Handle signed multiply
|
||
overflow checks.
|
||
|
||
2021-01-11 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/95852
|
||
* tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
|
||
(uaddsub_overflow_check_p): Renamed to ...
|
||
(arith_overflow_check_p): ... this. Handle also multiplication
|
||
with overflow check.
|
||
(match_uaddsub_overflow): Renamed to ...
|
||
(match_arith_overflow): ... this. Add cfg_changed argument. Handle
|
||
also multiplication with overflow check. Adjust function comment.
|
||
(math_opts_dom_walker::after_dom_children): Adjust callers. Call
|
||
match_arith_overflow also for MULT_EXPR.
|
||
|
||
2021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
|
||
__builtin_convertvector.
|
||
(vmovl_s16): Likewise.
|
||
(vmovl_s32): Likewise.
|
||
(vmovl_u8): Likewise.
|
||
(vmovl_u16): Likewise.
|
||
(vmovl_u32): Likewise.
|
||
(vmovn_s16): Likewise.
|
||
(vmovn_s32): Likewise.
|
||
(vmovn_s64): Likewise.
|
||
(vmovn_u16): Likewise.
|
||
(vmovn_u32): Likewise.
|
||
(vmovn_u64): Likewise.
|
||
|
||
2021-01-11 Martin Liska <mliska@suse.cz>
|
||
|
||
* gimple-if-to-switch.cc (struct condition_info): Use auto_var.
|
||
(if_chain::is_beneficial): Delete clusters
|
||
(find_conditions): Make second argument of conditions_in_bbs a
|
||
pointer so that we control over it's lifetime.
|
||
(pass_if_to_switch::execute): Delete them.
|
||
|
||
2021-01-11 Kewen Lin <linkw@linux.ibm.com>
|
||
|
||
* ira.c (move_unallocated_pseudos): Check other_reg and skip if
|
||
it isn't set.
|
||
|
||
2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
|
||
|
||
* config/vax/vax.md (cc): Remove mode attribute.
|
||
(subst_<cc>, subst_f<cc>): Rename to...
|
||
(subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
|
||
(*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
|
||
(*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
|
||
(*branch_<mode>, *branch_<mode>_reversed): Likewise.
|
||
|
||
2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
|
||
|
||
* config/vax/vax.md (subst_f<cc>): Add mode to operands and
|
||
`const_double_zero'.
|
||
|
||
2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
|
||
|
||
* config/pdp11/pdp11.md (PDPfp): New mode iterator.
|
||
(fcc_cc, fcc_ccnz): Use it. Add mode to `const_double_zero' and
|
||
operands.
|
||
|
||
2021-01-09 Maciej W. Rozycki <macro@linux-mips.org>
|
||
|
||
* genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
|
||
rtx.
|
||
* read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
|
||
with `const_double_zero'.
|
||
* doc/rtl.texi (Constant Expression Types): Document it.
|
||
|
||
2021-01-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR c++/98556
|
||
* tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
|
||
POINTER_DIFF_EXPR to be any integral type.
|
||
|
||
2021-01-09 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/98603
|
||
* function.c (instantiate_virtual_regs_in_insn): For asm goto
|
||
with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
|
||
if any, set ASM_OPERANDS mode to VOIDmode and change
|
||
ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.
|
||
|
||
2021-01-09 Alexandre Oliva <oliva@gnu.org>
|
||
|
||
PR debug/97714
|
||
* final.c (notice_source_line): Narrow down the condition to
|
||
skip a line-0 marker.
|
||
|
||
2021-01-08 Sergei Trofimovich <siarheit@google.com>
|
||
|
||
* ipa-modref.c (merge_call_side_effects): Fix
|
||
linebreak split by reordering two print calls.
|
||
|
||
2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
|
||
|
||
* config/s390/vector.md (*tf_to_fprx2_0): Rename from
|
||
"*mov_tf_to_fprx2_0" for consistency, fix constraint.
|
||
(*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
|
||
consistency, fix constraint.
|
||
|
||
2021-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
|
||
|
||
* config/s390/s390-c.c (s390_def_or_undef_macro): Accept
|
||
callables instead of mask values.
|
||
(struct target_flag_set_p): New predicate.
|
||
(s390_cpu_cpp_builtins_internal): Define or undefine
|
||
__LONG_DOUBLE_VX__ macro.
|
||
|
||
2021-01-08 H.J. Lu <hjl.tools@gmail.com>
|
||
|
||
PR target/98482
|
||
* config/i386/i386.c (x86_function_profiler): Use R10 and R11
|
||
to call mcount in large model with PIC for NO_PROFILE_COUNTERS
|
||
targets.
|
||
|
||
2021-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.
|
||
|
||
2021-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
|
||
(vect_build_slp_tree): On cache hit release the matched
|
||
scalar stmts vector.
|
||
* tree-vect-stmts.c (vectorizable_store): Properly free
|
||
vec_oprnds before possibly gathering them again.
|
||
|
||
2021-01-08 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98544
|
||
* tree-vect-slp.c (vect_optimize_slp): Always materialize
|
||
permutes at a permute node.
|
||
|
||
2021-01-08 H.J. Lu <hjl.tools@gmail.com>
|
||
|
||
PR target/98482
|
||
* config/i386/i386.c (x86_function_profiler): Use R10 to call
|
||
mcount in large model. Sorry for large model with PIC.
|
||
|
||
2021-01-08 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/98585
|
||
* config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
|
||
ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
|
||
ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
|
||
TargetSave and initialize for variables with enum types.
|
||
(mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
|
||
mstack-protector-guard-symbol=): Add Save.
|
||
* config/i386/i386-options.c (ix86_function_specific_save,
|
||
ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
|
||
x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
|
||
x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
|
||
x_ix86_veclibabi_type.
|
||
|
||
2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
|
||
SVE_FULL_I to SVE_I.
|
||
(*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
|
||
|
||
2021-01-08 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
|
||
SVE_FULL_I to SVE_I.
|
||
(*cond_uxt<mode>_any): Likewise.
|
||
|
||
2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/iterators.md (Vwhalf): New iterator.
|
||
* config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
|
||
Rename to...
|
||
(aarch64_<sur>adalp<mode>): ... This. Make more
|
||
builtin-friendly.
|
||
(<sur>sadv16qi): Adjust callsite of the above.
|
||
* config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
|
||
builtins.
|
||
* config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
|
||
builtins.
|
||
(vpadal_s16): Likewise.
|
||
(vpadal_u8): Likewise.
|
||
(vpadal_u16): Likewise.
|
||
(vpadalq_s8): Likewise.
|
||
(vpadalq_s16): Likewise.
|
||
(vpadalq_s32): Likewise.
|
||
(vpadalq_u8): Likewise.
|
||
(vpadalq_u16): Likewise.
|
||
(vpadalq_u32): Likewise.
|
||
|
||
2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
|
||
Rename to...
|
||
(aarch64_<su>abd<mode>): ... This.
|
||
(<sur>sadv16qi): Adjust callsite of the above.
|
||
* config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
|
||
builtins.
|
||
* config/aarch64/arm_neon.h (vabd_s8): Reimplement using
|
||
builtin.
|
||
(vabd_s16): Likewise.
|
||
(vabd_s32): Likewise.
|
||
(vabd_u8): Likewise.
|
||
(vabd_u16): Likewise.
|
||
(vabd_u32): Likewise.
|
||
(vabdq_s8): Likewise.
|
||
(vabdq_s16): Likewise.
|
||
(vabdq_s32): Likewise.
|
||
(vabdq_u8): Likewise.
|
||
(vabdq_u16): Likewise.
|
||
(vabdq_u32): Likewise.
|
||
|
||
2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
|
||
builtins.
|
||
* config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
|
||
(vaba_s16): Likewise.
|
||
(vaba_s32): Likewise.
|
||
(vaba_u8): Likewise.
|
||
(vaba_u16): Likewise.
|
||
(vaba_u32): Likewise.
|
||
(vabaq_s8): Likewise.
|
||
(vabaq_s16): Likewise.
|
||
(vabaq_s32): Likewise.
|
||
(vabaq_u8): Likewise.
|
||
(vabaq_u16): Likewise.
|
||
(vabaq_u32): Likewise.
|
||
|
||
2021-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
||
|
||
* config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
|
||
(aarch64_<su>aba<mode>): ... This. Handle uaba as well.
|
||
Change RTL pattern to match.
|
||
|
||
2021-01-08 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
* common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
|
||
* config/riscv/riscv-c.c (riscv-subset.h): New.
|
||
(INCLUDE_STRING): Define.
|
||
(riscv_cpu_cpp_builtins): Add new style architecture extension
|
||
test macros.
|
||
* config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
|
||
(riscv_subset_list::end): New.
|
||
(riscv_current_subset_list): New.
|
||
|
||
2021-01-08 Kito Cheng <kito.cheng@sifive.com>
|
||
|
||
* common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
|
||
Move to riscv-subset.h.
|
||
(struct riscv_subset_t): Ditto.
|
||
(class riscv_subset_list): Ditto.
|
||
* config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
|
||
from riscv-common.c.
|
||
(struct riscv_subset_t): Ditto.
|
||
(class riscv_subset_list): Ditto.
|
||
* config/riscv/t-riscv ($(common_out_file)): Add file
|
||
dependency.
|
||
|
||
2021-01-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR target/98567
|
||
* config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
|
||
New define_insn patterns.
|
||
|
||
2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
|
||
(*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
|
||
(*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.
|
||
|
||
2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/98560
|
||
* internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
|
||
* internal-fn.c (vec_cond_mask_direct): Get the data mode from
|
||
argument 1.
|
||
(vec_cond_direct): Likewise argument 2.
|
||
(vec_condu_direct, vec_condeq_direct): Delete.
|
||
(expand_vect_cond_optab_fn): Rename to...
|
||
(expand_vec_cond_optab_fn): ...this, replacing old macro.
|
||
(expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
|
||
(expand_vect_cond_mask_optab_fn): Rename to...
|
||
(expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
|
||
(direct_vec_cond_mask_optab_supported_p): Treat the optab as a
|
||
convert optab.
|
||
(direct_vec_cond_optab_supported_p): Likewise.
|
||
(direct_vec_condu_optab_supported_p): Delete.
|
||
(direct_vec_condeq_optab_supported_p): Delete.
|
||
* gimple-isel.cc: Include internal-fn.h.
|
||
(gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
|
||
before using it.
|
||
|
||
2021-01-07 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/98560
|
||
* gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
|
||
IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.
|
||
|
||
2021-01-07 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
* config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
|
||
rotate_insn and optab code attributes.
|
||
Update all uses to merged code attribute.
|
||
* config/i386/sse.md: Update all uses to merged code attribute.
|
||
* config/i386/mmx.md: Update all uses to merged code attribute.
|
||
|
||
2021-01-07 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/98568
|
||
* gimple-ssa-store-merging.c (bswap_view_convert): New function.
|
||
(bswap_replace): Use it.
|
||
|
||
2021-01-06 Vladimir N. Makarov <vmakarov@redhat.com>
|
||
|
||
PR rtl-optimization/97978
|
||
* lra-int.h (lra_hard_reg_split_p): New external.
|
||
* lra.c (lra_hard_reg_split_p): New global.
|
||
(lra): Set up lra_hard_reg_split_p after splitting a hard reg.
|
||
* lra-assigns.c (lra_assign): Don't check allocation correctness
|
||
after hard reg splitting.
|
||
|
||
2021-01-06 Martin Sebor <msebor@redhat.com>
|
||
|
||
PR c++/98305
|
||
* builtins.c (new_delete_mismatch_p): New overload.
|
||
(new_delete_mismatch_p (tree, tree)): Call it.
|
||
|
||
2021-01-06 Alexandre Oliva <oliva@adacore.com>
|
||
|
||
* Makefile.in (T_GLIMITS_H): New.
|
||
(stmp-int-hdrs): Depend on it, use it.
|
||
* config/t-vxworks (T_GLIMITS_H): Override it.
|
||
(vxw-glimits.h): New.
|
||
|
||
2021-01-06 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98513
|
||
* value-range.cc (intersect_ranges): Compare the upper bounds
|
||
for the expected relation.
|
||
|
||
2021-01-06 Gerald Pfeifer <gerald@pfeifer.com>
|
||
|
||
Revert:
|
||
2020-12-28 Gerald Pfeifer <gerald@pfeifer.com>
|
||
|
||
* doc/standards.texi (HSAIL): Remove section.
|
||
|
||
2021-01-05 Samuel Thibault <samuel.thibault@ens-lyon.org>
|
||
|
||
* configure: Re-generate.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* doc/invoke.texi (-std=c++20): Adjust for the publication of
|
||
ISO 14882:2020 standard.
|
||
* doc/standards.texi: Likewise.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/94802
|
||
* expr.h (maybe_optimize_sub_cmp_0): Declare.
|
||
* expr.c: Include tree-pretty-print.h and flags.h.
|
||
(maybe_optimize_sub_cmp_0): New function.
|
||
(do_store_flag): Use it.
|
||
* cfgexpand.c (expand_gimple_cond): Likewise.
|
||
|
||
2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
|
||
* rtlanal.c (simple_regno_set): Tweak description to clarify the
|
||
RMW condition.
|
||
|
||
2021-01-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98516
|
||
* tree-vect-slp.c (vect_optimize_slp): Permute the incoming
|
||
lanes when materializing on a VEC_PERM node.
|
||
(vectorizable_slp_permutation): Dump the permute properly.
|
||
|
||
2021-01-05 Richard Biener <rguenther@suse.de>
|
||
|
||
* tree-vect-slp.c (vect_slp_region): Move debug counter
|
||
to cover individual subgraphs.
|
||
|
||
2021-01-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98428
|
||
* tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
|
||
vector lane extracts for loop vectorization.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/98514
|
||
* tree-ssa-reassoc.c (bb_rank): Change type from long * to
|
||
int64_t *.
|
||
(operand_rank): Change type from hash_map<tree, long> to
|
||
hash_map<tree, int64_t>.
|
||
(phi_rank): Change return type from long to int64_t.
|
||
(loop_carried_phi): Change block_rank variable type from long to
|
||
int64_t.
|
||
(propagate_rank): Change return type, rank parameter type and
|
||
op_rank variable type from long to int64_t.
|
||
(find_operand_rank): Change return type from long to int64_t
|
||
and change slot variable type from long * to int64_t *.
|
||
(insert_operand_rank): Change rank parameter type from long to
|
||
int64_t.
|
||
(get_rank): Change return type and rank variable type from long to
|
||
int64_t. Use PRId64 instead of ld to print the rank.
|
||
(init_reassoc): Change rank variable type from long to int64_t
|
||
and adjust correspondingly bb_rank and operand_rank initialization.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/96928
|
||
* tree-ssa-phiopt.c (xor_replacement): New function.
|
||
(tree_ssa_phiopt_worker): Call it.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/96930
|
||
* match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
|
||
from narrower value which has the same type as 1 << B, perform
|
||
the right shift on the narrower value followed by extension.
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/96239
|
||
* gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
|
||
function.
|
||
(get_status_for_store_merging): Don't return BB_INVALID for blocks
|
||
with potential bswap optimizable CONSTRUCTORs.
|
||
(pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
|
||
if possible.
|
||
|
||
2021-01-05 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98381
|
||
* tree.c (vector_element_bits): Properly compute bool vector
|
||
element size.
|
||
* tree-vect-loop.c (vectorizable_live_operation): Properly
|
||
compute the last lane bit offset.
|
||
|
||
2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/98522
|
||
* config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
|
||
Clear the top 64 bytes of the input XMM register.
|
||
(sse_cvttps2pi): Ditto.
|
||
|
||
2021-01-05 Uroš Bizjak <ubizjak@gmail.com>
|
||
|
||
PR target/98521
|
||
* config/i386/xopintrin.h (_mm256_cmov_si256): New.
|
||
|
||
2021-01-05 H.J. Lu <hjl.tools@gmail.com>
|
||
|
||
PR target/98495
|
||
* config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
|
||
short first.
|
||
|
||
2021-01-05 Claudiu Zissulescu <claziss@synopsys.com>
|
||
|
||
* config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
|
||
(umaddsidi4_split): Likewise.
|
||
|
||
2021-01-05 liuhongt <hongtao.liu@intel.com>
|
||
|
||
PR target/98461
|
||
* config/i386/sse.md (*sse2_pmovskb_zexthisi): New
|
||
define_insn_and_split for zero_extend of subreg HI of pmovskb
|
||
result.
|
||
(*sse2_pmovskb_zexthisi): Add new combine splitters for
|
||
zero_extend of not of subreg HI of pmovskb result.
|
||
|
||
2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/97269
|
||
* explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
|
||
nested in CONSTs.
|
||
* config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
|
||
convert_memory_address to convert symbolic immediates to ptr_mode
|
||
before forcing them to memory.
|
||
|
||
2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/97144
|
||
* recog.c (constrain_operands): Initialize matching_operand
|
||
for each alternative, rather than only doing it once.
|
||
|
||
2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR rtl-optimization/98403
|
||
* rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
|
||
why we don't remove call clobbers.
|
||
(function_info::apply_changes_to_insn): Don't attempt to add
|
||
call clobbers here.
|
||
|
||
2021-01-05 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/98371
|
||
* tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
|
||
(vect_analyze_loop): If an epilogue loop appears to be cheaper
|
||
than the main loop, re-analyze it as a main loop before adopting
|
||
it as a main loop.
|
||
|
||
2021-01-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
|
||
|
||
PR c++/98316
|
||
* configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
|
||
* aclocal.m4, configure: Regenerate.
|
||
* Makefile.in (NETLIBS): Define.
|
||
(BACKEND): Remove $(CODYLIB).
|
||
|
||
2021-01-05 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR rtl-optimization/98334
|
||
* simplify-rtx.c (simplify_context::simplify_binary_operation_1):
|
||
Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.
|
||
|
||
2021-01-05 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
* tree-inline.c (expand_call_inline): Restore input_location.
|
||
Return result from recursive call.
|
||
|
||
2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR tree-optimization/95401
|
||
* config/aarch64/aarch64-sve-builtins.cc
|
||
(gimple_folder::load_store_cookie): Use bits rather than bytes
|
||
for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
|
||
* gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
|
||
* tree-vect-stmts.c (vectorizable_store): Likewise.
|
||
(vectorizable_load): Likewise.
|
||
|
||
2021-01-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98308
|
||
* tree-vect-stmts.c (vectorizable_load): Set invariant mask
|
||
SLP vectype.
|
||
|
||
2021-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/95771
|
||
* tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
|
||
with precision smaller than int's precision and types with precision
|
||
twice as large as long long. Formatting fixes.
|
||
|
||
2021-01-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98464
|
||
* tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
|
||
(vn_valueize_wrapper): ... this. Temporarily adjust vn_context_bb.
|
||
(process_bb): Adjust.
|
||
|
||
2021-01-04 Matthew Malcomson <matthew.malcomson@arm.com>
|
||
|
||
PR other/98437
|
||
* doc/invoke.texi (-fsanitize=address): Fix wording describing
|
||
clash with -fsanitize=hwaddress.
|
||
|
||
2021-01-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98282
|
||
* tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
|
||
invariants as VN_NARY.
|
||
|
||
2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
PR target/89057
|
||
* config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
|
||
aarch64_simd_reg_or_zero for operand 2. Use the combinez patterns
|
||
to handle zero operands.
|
||
|
||
2021-01-04 Richard Sandiford <richard.sandiford@arm.com>
|
||
|
||
* config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
|
||
(offset_6bit_unsigned_scaled_p): Fix typo in comment.
|
||
(aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
|
||
[-32, 31].
|
||
|
||
2021-01-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98393
|
||
* tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
|
||
when hitting the limit.
|
||
|
||
2021-01-04 Richard Biener <rguenther@suse.de>
|
||
|
||
PR tree-optimization/98291
|
||
* tree-vect-loop.c (vectorizable_reduction): Bypass
|
||
associativity check for SLP reductions with VF 1.
|
||
|
||
2021-01-04 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
PR tree-optimization/96782
|
||
* match.pd (x == ~x -> false, x != ~x -> true): New simplifications.
|
||
|
||
2021-01-04 Bernd Edlinger <bernd.edlinger@hotmail.de>
|
||
|
||
* collect-utils.c (collect_execute): Check dumppfx.
|
||
* collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
|
||
to collect_execute.
|
||
(do_link): Add new parameter atsuffix.
|
||
(main): Handle -dumpdir option. Skip one argument for
|
||
-o, -isystem and -B options.
|
||
* gcc.c (make_at_file): New helper function.
|
||
(close_at_file): Use it.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
|
||
Amend handling for LD64_VERSION fallback defaults.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config.gcc: Compute default version information
|
||
from the configured target. Likewise defaults for
|
||
ld64.
|
||
* config/darwin10.h: Removed.
|
||
* config/darwin12.h: Removed.
|
||
* config/darwin9.h: Removed.
|
||
* config/rs6000/darwin8.h: Removed.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
|
||
* config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
|
||
here...
|
||
* config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
|
||
for the Darwin10 unwinder stub from here ...
|
||
* config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.
|
||
|
||
2021-01-02 Iain Sandoe <iain@sandoe.co.uk>
|
||
|
||
* config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
|
||
(ASM_DEBUG_SPEC):Only define if the assembler supports
|
||
stabs.
|
||
(PREFERRED_DEBUGGING_TYPE): Default to DWARF.
|
||
(DARWIN_PREFER_DWARF): Define.
|
||
* config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
|
||
(DARWIN_PREFER_DWARF): Likewise
|
||
(DSYMUTIL_SPEC): Likewise.
|
||
(COLLECT_RUN_DSYMUTIL): Likewise.
|
||
(ASM_DEBUG_SPEC): Likewise.
|
||
(ASM_DEBUG_OPTION_SPEC): Likewise.
|
||
|
||
2021-01-02 Jan Hubicka <jh@suse.cz>
|
||
|
||
* cfg.c (free_block): ggc_free bb.
|
||
|
||
2021-01-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* gcc.c (process_command): Update copyright notice dates.
|
||
* gcov-dump.c (print_version): Ditto.
|
||
* gcov.c (print_version): Ditto.
|
||
* gcov-tool.c (print_version): Ditto.
|
||
* gengtype.c (create_file): Ditto.
|
||
* doc/cpp.texi: Bump @copying's copyright year.
|
||
* doc/cppinternals.texi: Ditto.
|
||
* doc/gcc.texi: Ditto.
|
||
* doc/gccint.texi: Ditto.
|
||
* doc/gcov.texi: Ditto.
|
||
* doc/install.texi: Ditto.
|
||
* doc/invoke.texi: Ditto.
|
||
|
||
2021-01-01 Jakub Jelinek <jakub@redhat.com>
|
||
|
||
* ChangeLog-2020: Rotate ChangeLog. New file.
|
||
|
||
|
||
Copyright (C) 2021 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|