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8sa1-gcc/gcc/ChangeLog
Andrew Burgess 20fa702b32 Fixes after recent configure changes relating to static libraries 
This commit:

  commit e7c26e04b2 (tjteru/master)
  Date:   Wed Jan 22 14:54:26 2020 +0000

      gcc: Add new configure options to allow static libraries to be selected

contains a couple of issues.  First I failed to correctly regenerate
all of the configure files it should have done.  Second, there was a
mistake in lib-link.m4, one of the conditions didn't use pure sh
syntax, I wrote this:

  if x$lib_type = xauto || x$lib_type = xshared; then

When I should have written this:

  if test "x$lib_type" = "xauto" || test "x$lib_type" = "xshared"; then

These issues were raised on the mailing list in these messages:

  https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01827.html
  https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01921.html

config/ChangeLog:

	* lib-link.m4 (AC_LIB_LINKFLAGS_BODY): Update shell syntax.

gcc/ChangeLog:

	* configure: Regenerate.

intl/ChangeLog:

	* configure: Regenerate.

libcpp/ChangeLog:

	* configure: Regenerate.

libstdc++-v3/ChangeLog:

	* configure: Regenerate.
2020-02-01 00:34:28 +00:00

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2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
* configure: Regenerate.
2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/91333
* ira-color.c (bucket_allocno_compare_func): Move conflict hard
reg preferences comparison up.
2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
* config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
aarch64-sve-builtins-base.h.
* config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
aarch64-sve-builtins-base.cc.
* config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): Declare.
* config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): New functions.
* config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
(svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
(svcvtnt): New functions.
(svcvt): Add a form that converts f32 to bf16.
* config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
(ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
Declare.
* config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
Treat B as bfloat16_t.
(ternary_bfloat_lane_base): New class.
(ternary_bfloat_def): Likewise.
(ternary_bfloat): New shape.
(ternary_bfloat_lane_def): New class.
(ternary_bfloat_lane): New shape.
(ternary_bfloat_lanex2_def): New class.
(ternary_bfloat_lanex2): New shape.
(ternary_bfloat_opt_n_def): New class.
(ternary_bfloat_opt_n): New shape.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
* config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
(@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
(@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
(@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
(*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
(@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
* config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
the pattern off the narrow mode instead of the wider one.
* config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
(UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
(sve_fp_op): Handle them.
(SVE_BFLOAT_TERNARY_LONG): New int itertor.
(SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/arm_sve.h: Include arm_bf16.h.
* config/aarch64/aarch64-modes.def (BF): Move definition before
VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
(SVE_MODES): Handle BF modes.
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
BF modes.
(aarch64_full_sve_mode): Likewise.
* config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
and VNx32BF.
(SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
(Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
(V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
(insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
new SVE BF modes.
* config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
type_class_index.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
(TYPES_all_data): Add bf16.
(TYPES_reinterpret1, TYPES_reinterpret): Likewise.
(register_tuple_type): Increase buffer size.
* config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
(bf16): New type suffix.
* config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
(svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
(svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
Change type from all_data to all_arith.
* config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
(svminp): Likewise.
2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
Matthew Malcomson <matthew.malcomson@arm.com>
Richard Sandiford <richard.sandiford@arm.com>
* doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
__ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
__ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
__ARM_FEATURE_MATMUL_FP64.
* config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
(sve): Add AARCH64_FL_F32MM to the list of extensions that should
be disabled at the same time.
(f32mm): New extension.
* config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
(AARCH64_FL_F64MM): Bump to the next bit up.
(AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
(TARGET_SVE_F64MM): New macros.
* config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
(UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
(UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
(UNSPEC_ZIP2Q): New unspeccs.
(DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
(optab, sur, perm_insn): Handle the new unspecs.
(sve_fp_op): Handle UNSPEC_FMMLA. Resort.
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
TARGET_SVE_F64MM instead of separate tests.
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
(@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
(@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
(@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
(@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
(TYPES_s_signed): New macro.
(TYPES_s_integer): Use it.
(TYPES_d_float): New macro.
(TYPES_d_data): Use it.
* config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
(ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
(ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
(svmmla): New shape.
(ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
template parameters.
(ternary_resize2_lane_base): Likewise.
(ternary_resize2_base): New class.
(ternary_qq_lane_base): Likewise.
(ternary_intq_uintq_lane_def): Likewise.
(ternary_intq_uintq_lane): New shape.
(ternary_intq_uintq_opt_n_def): New class
(ternary_intq_uintq_opt_n): New shape.
(ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
(ternary_uintq_intq_def): New class.
(ternary_uintq_intq): New shape.
(ternary_uintq_intq_lane_def): New class.
(ternary_uintq_intq_lane): New shape.
(ternary_uintq_intq_opt_n_def): New class.
(ternary_uintq_intq_opt_n): New shape.
* config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
(svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
(svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
* config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
Generalize to...
(svdotprod_lane_impl): ...this new class.
(svmmla_impl, svusdot_impl): New classes.
(svdot_lane): Update to use svdotprod_lane_impl.
(svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
(svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
functions.
* config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
function, with no types defined.
(svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
AARCH64_FL_I8MM functions.
(svmmla): New AARCH64_FL_F32MM function.
(svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
(svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
AARCH64_FL_F64MM function.
(REQUIRED_EXTENSIONS):
2020-01-31 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
alternative only.
2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*movoi_internal_avx): Do not check for
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
(*movti_internal): Do not check for
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
(*movtf_internal): Move check for TARGET_SSE2 and size optimization
just after check for TARGET_AVX.
(*movdf_internal): Ditto.
* config/i386/mmx.md (*mov<mode>_internal): Do not check for
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
* config/i386/sse.md (mov<mode>_internal): Only check
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
(<sse>_andnot<mode>3<mask_name>): Move check for
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
(<code><mode>3<mask_name>): Ditto.
(*andnot<mode>3): Ditto.
(*andnottf3): Ditto.
(*<code><mode>3): Ditto.
(*<code>tf3): Ditto.
(*andnot<VI:mode>3): Remove
TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
(<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
(*<code><VI12_AVX_AVX512F:mode>3): Ditto.
(sse4_1_blendv<ssemodesuffix>): Ditto.
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
Explain that tune applies to 128bit instructions only.
2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
* config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
to definition of hsa_kernel_description. Parse assembly to find SGPR
and VGPR count of kernel and store in hsa_kernel_description.
2020-01-31 Tamar Christina <tamar.christina@arm.com>
PR rtl-optimization/91838
* simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
to truncate if allowed or reject combination.
2020-01-31 Andrew Stubbs <ams@codesourcery.com>
* tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
(find_inv_vars_cb): Likewise.
2020-01-31 David Malcolm <dmalcolm@redhat.com>
* calls.c (special_function_p): Split out the check for DECL_NAME
being non-NULL and fndecl being extern at file scope into a
new maybe_special_function_p and call it. Drop check for fndecl
being non-NULL that was after a usage of DECL_NAME (fndecl).
* tree.h (maybe_special_function_p): New inline function.
2020-01-30 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
(mask_gather_load<mode>): ... here, and zero-initialize the
destination.
(maskload<mode>di): Zero-initialize the destination.
* config/gcn/gcn.c:
2020-01-30 David Malcolm <dmalcolm@redhat.com>
PR analyzer/93356
* doc/analyzer.texi (Limitations): Note that constraints on
floating-point values are currently ignored.
2020-01-30 Jakub Jelinek <jakub@redhat.com>
PR lto/93384
* symtab.c (symtab_node::noninterposable_alias): If localalias
already exists, but is not usable, append numbers after it until
a unique name is found. Formatting fix.
PR middle-end/93505
* combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
rotate counts.
2020-01-30 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn.c (print_operand): Handle LTGT.
* config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
2020-01-30 Richard Biener <rguenther@suse.de>
* tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
2020-01-30 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
without a DECL in .data.rel.ro.local.
2020-01-30 Jakub Jelinek <jakub@redhat.com>
PR target/93494
* config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
returned.
PR target/91824
* config/i386/sse.md
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
any_extend code iterator instead of always zero_extend.
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
Use any_extend code iterator instead of always zero_extend.
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
Use any_extend code iterator instead of always zero_extend.
(*sse2_pmovmskb_ext): New define_insn.
(*sse2_pmovmskb_ext_lt): New define_insn_and_split.
PR target/91824
* config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
(*popcountsi2_zext_falsedep): New define_insn.
2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config.in: Regenerated.
* configure: Regenerated.
2020-01-29 Tobias Burnus <tobias@codesourcery.com>
PR bootstrap/93409
* config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
LLVM's assembler changed the default in version 9.
2020-01-24 Jeff Law <law@redhat.com>
PR tree-optimization/89689
* builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
Revert:
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/87763
* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
simplification to handle subregs as well as bare regs.
* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
PR target/93221
* ira.c (ira): Revert use of simplified LRA algorithm.
2020-01-29 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/92706
* tree-sra.c (struct access): Fields first_link, last_link,
next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
next_rhs_queued and grp_rhs_queued respectively, new fields
first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
(struct assign_link): Field next renamed to next_rhs, new field
next_lhs. Updated comment.
(work_queue_head): Renamed to rhs_work_queue_head.
(lhs_work_queue_head): New variable.
(add_link_to_lhs): New function.
(relink_to_new_repr): Also relink LHS lists.
(add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
(add_access_to_lhs_work_queue): New function.
(pop_access_from_work_queue): Renamed to
pop_access_from_rhs_work_queue.
(pop_access_from_lhs_work_queue): New function.
(build_accesses_from_assign): Also add links to LHS lists and to LHS
work_queue.
(child_would_conflict_in_lacc): Renamed to
child_would_conflict_in_acc. Adjusted parameter names.
(create_artificial_child_access): New parameter set_grp_read, use it.
(subtree_mark_written_and_enqueue): Renamed to
subtree_mark_written_and_rhs_enqueue.
(propagate_subaccesses_across_link): Renamed to
propagate_subaccesses_from_rhs.
(propagate_subaccesses_from_lhs): New function.
(propagate_all_subaccesses): Also propagate subaccesses from LHSs to
RHSs.
2020-01-29 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/92706
* tree-sra.c (struct access): Adjust comment of
grp_total_scalarization.
(find_access_in_subtree): Look for single children spanning an entire
access.
(scalarizable_type_p): Allow register accesses, adjust callers.
(completely_scalarize): Remove function.
(scalarize_elem): Likewise.
(create_total_scalarization_access): Likewise.
(sort_and_splice_var_accesses): Do not track total scalarization
flags.
(analyze_access_subtree): New parameter totally, adjust to new meaning
of grp_total_scalarization.
(analyze_access_trees): Pass new parameter to analyze_access_subtree.
(can_totally_scalarize_forest_p): New function.
(create_total_scalarization_access): Likewise.
(create_total_access_and_reshape): Likewise.
(total_should_skip_creating_access): Likewise.
(totally_scalarize_subtree): Likewise.
(analyze_all_variable_accesses): Perform total scalarization after
subaccess propagation using the new functions above.
(initialize_constant_pool_replacements): Output initializers by
traversing the access tree.
2020-01-29 Martin Jambor <mjambor@suse.cz>
* tree-sra.c (verify_sra_access_forest): New function.
(verify_all_sra_access_forests): Likewise.
(create_artificial_child_access): Set parent.
(analyze_all_variable_accesses): Call the verifier.
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
* cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
if called on indirect edge.
(cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
speculative call if needed.
2020-01-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/93428
* tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
permutation when the load node is created.
(vect_analyze_slp_instance): Re-use it here.
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
* ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/93272
* ira-lives.c (process_out_of_region_eh_regs): New function.
(process_bb_node_lives): Call it.
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
* coverage.c (read_counts_file): Make error message lowercase.
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
* profile-count.c (profile_quality_display_names): Fix ordering.
2020-01-28 Jan Hubicka <hubicka@ucw.cz>
PR lto/93318
* cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
hash only when edge is first within the sequence.
(cgraph_edge::set_call_stmt): Update handling of speculative calls.
(symbol_table::create_edge): Do not set target_prob.
(cgraph_edge::remove_caller): Watch for speculative calls when updating
the call site hash.
(cgraph_edge::make_speculative): Drop target_prob parameter.
(cgraph_edge::speculative_call_info): Remove.
(cgraph_edge::first_speculative_call_target): New member function.
(update_call_stmt_hash_for_removing_direct_edge): New function.
(cgraph_edge::resolve_speculation): Rewrite to new API.
(cgraph_edge::speculative_call_for_target): New member function.
(cgraph_edge::make_direct): Rewrite to new API; fix handling of
multiple speculation targets.
(cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
of profile.
(verify_speculative_call): Verify that targets form an interval.
* cgraph.h (cgraph_edge::speculative_call_info): Remove.
(cgraph_edge::first_speculative_call_target): New member function.
(cgraph_edge::next_speculative_call_target): New member function.
(cgraph_edge::speculative_call_target_ref): New member function.
(cgraph_edge;:speculative_call_indirect_edge): New member funtion.
(cgraph_edge): Remove target_prob.
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
Fix handling of speculative calls.
* ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
* ipa-fnsummary.c (analyze_function_body): Likewise.
* ipa-inline.c (speculation_useful_p): Use new speculative call API.
* ipa-profile.c (dump_histogram): Fix formating.
(ipa_profile_generate_summary): Watch for overflows.
(ipa_profile): Do not require probablity to be 1/2; update to new API.
* ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
(update_indirect_edges_after_inlining): Update to new API.
* ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
profiles.
* profile-count.h: (profile_probability::adjusted): New.
* tree-inline.c (copy_bb): Update to new speculative call API; fix
updating of profile.
* value-prof.c (gimple_ic_transform): Rename to ...
(dump_ic_profile): ... this one; update dumping.
(stream_in_histogram_value): Fix formating.
(gimple_value_profile_transformations): Update.
2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
PR target/91461
* config/i386/i386.md (*movoi_internal_avx): Remove
TARGET_SSE_TYPELESS_STORES check.
(*movti_internal): Prefer TARGET_AVX over
TARGET_SSE_TYPELESS_STORES.
(*movtf_internal): Likewise.
* config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
from TARGET_SSE_TYPELESS_STORES.
2020-01-28 David Malcolm <dmalcolm@redhat.com>
* diagnostic-core.h (warning_at): Rename overload to...
(warning_meta): ...this.
(emit_diagnostic_valist): Delete decl of overload taking
diagnostic_metadata.
* diagnostic.c (emit_diagnostic_valist): Likewise for defn.
(warning_at): Rename overload taking diagnostic_metadata to...
(warning_meta): ...this.
2020-01-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/93439
* tree-parloops.c (create_loop_fn): Move clique bookkeeping...
* tree-cfg.c (move_sese_region_to_fn): ... here.
(verify_types_in_gimple_reference): Verify used cliques are
tracked.
2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
PR target/91399
* config/i386/i386-options.c (set_ix86_tune_features): Add an
argument of a pointer to struct gcc_options and pass it to
parse_mtune_ctrl_str.
(ix86_function_specific_restore): Pass opts to
set_ix86_tune_features.
(ix86_option_override_internal): Likewise.
(parse_mtune_ctrl_str): Add an argument of a pointer to struct
gcc_options and use it for x_ix86_tune_ctrl_string.
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/87763
* simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
simplification to handle subregs as well as bare regs.
* config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-loop.c (vectorizable_reduction): Fail gracefully
for reduction chains that (now) include a call.
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/92822
* tree-ssa-forwprop.c (simplify_vector_constructor): When filling
out the don't-care elements of a vector whose significant elements
are duplicates, make the don't-care elements duplicates too.
2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/93434
* tree-predcom.c (split_data_refs_to_components): Record which
components have had aliasing loads removed. Prevent store-store
commoning for all such components.
2020-01-28 Jakub Jelinek <jakub@redhat.com>
PR target/93418
* config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
-1 or is_vshift is true, use new_vector with number of elts npatterns
rather than new_unary_operation.
PR tree-optimization/93454
* gimple-fold.c (fold_array_ctor_reference): Perform
elt_size.to_uhwi () just once, instead of calling it in every
iteration. Punt if that value is above size of the temporary
buffer. Decrease third native_encode_expr argument when
bufoff + elt_sz is above size of buf.
2020-01-27 Joseph Myers <joseph@codesourcery.com>
* config/mips/mips.c (mips_declare_object_name)
[USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
2020-01-27 Martin Liska <mliska@suse.cz>
PR gcov-profile/93403
* tree-profile.c (gimple_init_gcov_profiler): Generate
both __gcov_indirect_call_profiler_v4 and
__gcov_indirect_call_profiler_v4_atomic.
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
PR target/92822
* config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
expander.
(@aarch64_split_simd_mov<mode>): Use it.
(aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
Leave the vec_extract patterns to handle 2-element vectors.
(aarch64_simd_mov_from_<mode>high): Likewise.
(vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
(vec_extractv2dfv1df): Likewise.
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
jump conditions for *compare_condjump<GPI:mode>.
2020-01-27 David Malcolm <dmalcolm@redhat.com>
PR analyzer/93276
* digraph.cc (test_edge::test_edge): Specify template for base
class initializer.
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (gen_mlo): Remove.
(gen_mhi): Likewise.
* config/arc/arc.c (AUX_MULHI): Define.
(arc_must_save_reister): Special handling for r58/59.
(arc_compute_frame_size): Consider mlo/mhi registers.
(arc_save_callee_saves): Emit fp/sp move only when emit_move
paramter is true.
(arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
mlo/mhi name selection.
(arc_restore_callee_saves): Don't early restore blink when ISR.
(arc_expand_prologue): Add mlo/mhi saving.
(arc_expand_epilogue): Add mlo/mhi restoring.
(gen_mlo): Remove.
(gen_mhi): Remove.
* config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
numbering when MUL64 option is used.
(DWARF2_FRAME_REG_OUT): Define.
* config/arc/arc.md (arc600_stall): New pattern.
(VUNSPEC_ARC_ARC600_STALL): Define.
(mulsi64): Use correct mlo/mhi registers.
(mulsi_600): Clean it up.
* config/arc/predicates.md (mlo_operand): Remove any dependency on
TARGET_BIG_ENDIAN.
(mhi_operand): Likewise.
2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
Petro Karashchenko <petro.karashchenko@ring.com>
* config/arc/arc.c (arc_is_uncached_mem_p): Check struct
attributes if needed.
(prepare_move_operands): Generate special unspec instruction for
direct access.
(arc_isuncached_mem_p): Propagate uncached attribute to each
structure member.
* config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
(VUNSPEC_ARC_STDI): Likewise.
(ALLI): New mode iterator.
(mALLI): New mode attribute.
(lddi): New instruction pattern.
(stdi): Likewise.
(stdidi_split): Split instruction for architectures which are not
supporting ll64 option.
(lddidi_split): Likewise.
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/92989
* lra-lives.c (process_bb_lives): Update the live-in set before
processing additional clobbers.
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/93170
* cselib.c (cselib_invalidate_regno_val): New function, split out
from...
(cselib_invalidate_regno): ...here.
(cselib_invalidated_by_call_p): New function.
(cselib_process_insn): Iterate over all the hard-register entries in
REG_VALUES and invalidate any that cross call-clobbered registers.
2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
* dojump.c (split_comparison): Use HONOR_NANS rather than
HONOR_SNANS when splitting LTGT.
2020-01-27 Martin Liska <mliska@suse.cz>
PR driver/91220
* opts.c (print_filtered_help): Exclude language-specific
options from --help=common unless enabled in all FEs.
2020-01-27 Martin Liska <mliska@suse.cz>
* opts.c (print_help): Exclude params from
all except --help=param.
2020-01-27 Martin Liska <mliska@suse.cz>
PR target/93274
* config/i386/i386-features.c (make_resolver_func):
Align the code with ppc64 target implementation.
Do not generate a unique name for resolver function.
2020-01-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/93397
* tree-vect-slp.c (vect_analyze_slp_instance): Delay
converted reduction chain SLP graph adjustment.
2020-01-26 Marek Polacek <polacek@redhat.com>
PR sanitizer/93436
* sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
null DECL_NAME.
2020-01-26 Jason Merrill <jason@redhat.com>
PR c++/92601
* tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
of complete types.
2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
* config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
(rx_setmem): Likewise.
2020-01-26 Jakub Jelinek <jakub@redhat.com>
PR target/93412
* config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
Use nonimmediate_operand instead of x86_64_hilo_general_operand and
drop <di> from constraint of last operand.
PR target/93430
* config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
TARGET_AVX2 and V4DFmode not in the split condition, but in the
pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93166
* ipa-cp.c (get_info_about_necessary_edges): Remove value
check assertion.
2020-01-24 Jeff Law <law@redhat.com>
PR tree-optimization/92788
* tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
not EDGE_ABNORMAL.
2020-01-24 Jakub Jelinek <jakub@redhat.com>
PR target/93395
* config/i386/sse.md (*avx_vperm_broadcast_v4sf,
*avx_vperm_broadcast_<mode>,
<sse2_avx_avx512f>_vpermil<mode><mask_name>,
*<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
Move before avx2_perm<mode>/avx512f_perm<mode>.
PR target/93376
* simplify-rtx.c (simplify_const_unary_operation,
simplify_const_binary_operation): Punt for mode precision above
MAX_BITSIZE_MODE_ANY_INT.
2020-01-24 Andrew Pinski <apinski@marvell.com>
* config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
alu.shift_reg to 0.
2020-01-24 Jeff Law <law@redhat.com>
PR target/13721
* config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
for REGs. Call output_operand_lossage to get more reasonable
diagnostics.
2020-01-24 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
gcn_fp_compare_operator.
(vec_cmpu<mode>di): Use gcn_compare_operator.
(vec_cmp<u>v64qidi): Use gcn_compare_operator.
(vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
(vec_cmpu<mode>di_exec): Use gcn_compare_operator.
(vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
(vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
(vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
gcn_fp_compare_operator.
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
gcn_fp_compare_operator.
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
gcn_fp_compare_operator.
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
gcn_fp_compare_operator.
2020-01-24 Maciej W. Rozycki <macro@wdc.com>
* doc/install.texi (Cross-Compiler-Specific Options): Document
`--with-toolexeclibdir' option.
2020-01-24 Hans-Peter Nilsson <hp@axis.com>
* target.def (flags_regnum): Also mention effect on delay slot filling.
* doc/tm.texi: Regenerate.
2020-01-23 Jeff Law <law@redhat.com>
PR translation/90162
* config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
PR target/92269
* config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
profiling label
2020-01-23 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/93402
* postreload.c (reload_combine_recognize_pattern): Don't try to adjust
USE insns.
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config.in: Regenerated.
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
for TARGET_LIBC_GNUSTACK.
* configure: Regenerated.
* configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
found to be 2.31 or greater.
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
TARGET_SOFT_FLOAT.
* config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
(mips_asm_file_end): New function. Delegate to
file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
* config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
2020-01-23 Jakub Jelinek <jakub@redhat.com>
PR target/93376
* config/i386/i386-modes.def (POImode): New mode.
(MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
* config/i386/i386.md (DPWI): New mode attribute.
(addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
(QWI): Rename to...
(QPWI): ... this. Use POI instead of OI for TImode.
(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
*subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
instead of <QWI>.
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
PR target/93341
* config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
unspec.
(speculation_tracker_rev): New pattern.
* config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
Use speculation_tracker_rev to track the inverse condition.
2020-01-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/93381
* tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
alias-set of the def as argument and record the first one.
(vn_walk_cb_data::first_set): New member.
(vn_reference_lookup_3): Pass the alias-set of the current def
to push_partial_def. Fix alias-set used in the aggregate copy
case.
(vn_reference_lookup): Consistently set *last_vuse_ptr.
* real.c (clear_significand_below): Fix out-of-bound access.
2020-01-23 Jakub Jelinek <jakub@redhat.com>
PR target/93346
* config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
New define_insn patterns.
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
* doc/sourcebuild.texi (check-function-bodies): Add an
optional target/xfail selector.
2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
PR rtl-optimization/93124
* auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
bare USE and CLOBBER insns.
2020-01-22 Andrew Pinski <apinski@marvell.com>
* config/arc/arc.c (output_short_suffix): Check insn for nullness.
2020-01-22 David Malcolm <dmalcolm@redhat.com>
PR analyzer/93307
* gdbinit.in (break-on-saved-diagnostic): Update for move of
diagnostic_manager into "ana" namespace.
* selftest-run-tests.c (selftest::run_tests): Update for move of
selftest::run_analyzer_selftests to
ana::selftest::run_analyzer_selftests.
2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
* cfgexpand.c (union_stack_vars): Update the size.
2020-01-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/93381
* tree-ssa-structalias.c (find_func_aliases): Assume offsetting
throughout, handle all conversions the same.
2020-01-22 Jakub Jelinek <jakub@redhat.com>
PR target/93335
* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
Call force_reg on high_in2 unconditionally.
2020-01-22 Martin Liska <mliska@suse.cz>
PR tree-optimization/92924
* profile.c (compute_value_histograms): Divide
all counter values.
2020-01-22 Jakub Jelinek <jakub@redhat.com>
PR target/91298
* output.h (assemble_name_resolve): Declare.
* varasm.c (assemble_name_resolve): New function.
(assemble_name): Use it.
* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
2020-01-22 Joseph Myers <joseph@codesourcery.com>
* doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
update_web_docs_git instead of update_web_docs_svn.
2020-01-21 Andrew Pinski <apinski@marvell.com>
PR target/9311
* config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
as PTR mode. Have operand 1 as being modeless, it can be P mode.
(*tlsgd_small_<mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
<case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
register. Convert that register back to dest using convert_mode.
2020-01-21 Jim Wilson <jimw@sifive.com>
* config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
instead of XINT.
2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
Uros Bizjak <ubizjak@gmail.com>
PR target/93319
* config/i386/i386.c (ix86_tls_module_base): Replace Pmode
with ptr_mode.
(legitimize_tls_address): Do GNU2 TLS address computation in
ptr_mode and zero-extend result to Pmode.
* config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
:P with :PTR and Pmode with ptr_mode.
(*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
(*tls_dynamic_gnu2_call_64_<mode>): Likewise.
(*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
2020-01-21 Jakub Jelinek <jakub@redhat.com>
PR target/93333
* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
the last two operands are CONST_INT_P before using them as such.
2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
to get the integer element types.
2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins.h
(function_expander::convert_to_pmode): Declare.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::convert_to_pmode): New function.
(function_expander::get_contiguous_base): Use it.
(function_expander::prepare_gather_address_operands): Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.cc
(svwhilerw_svwhilewr_impl::expand): Likewise.
2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
PR target/92424
* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
cfun->machine->label_is_assembled.
(aarch64_print_patchable_function_entry): New.
(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
* config/aarch64/aarch64.h (struct machine_function): New field,
label_is_assembled.
2020-01-21 David Malcolm <dmalcolm@redhat.com>
PR ipa/93315
* ipa-profile.c (ipa_profile): Delete call_sums and set it to
NULL on exit.
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
PR lto/93318
* cgraph.c (cgraph_edge::resolve_speculation,
cgraph_edge::redirect_call_stmt_to_callee): Fix update of
call_stmt_site_hash.
2020-01-21 Martin Liska <mliska@suse.cz>
* config/rs6000/rs6000.c (common_mode_defined): Remove
unused variable.
2020-01-21 Richard Biener <rguenther@suse.de>
PR tree-optimization/92328
* tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
type when value-numbering same-sized store by inserting a
VIEW_CONVERT_EXPR.
(eliminate_dom_walker::eliminate_stmt): When eliminating
a redundant store handle bit-reinterpretation of the same value.
2020-01-21 Andrew Pinski <apinski@marvel.com>
PR tree-opt/93321
* tree-into-ssa.c (prepare_block_for_update_1): Split out
from ...
(prepare_block_for_update): This. Use a worklist instead of
recursing.
2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
* gcc/config/arm/arm.c (clear_operation_p):
Initialise last_regno, skip first iteration
based on the first_set value and use ints instead
of the unnecessary HOST_WIDE_INTs.
2020-01-21 Jakub Jelinek <jakub@redhat.com>
PR target/93073
* config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
compare_mode other than SFmode or DFmode.
2020-01-21 Kito Cheng <kito.cheng@sifive.com>
PR target/93304
* config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
* config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
* config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
2020-01-20 Andrew Pinski <apinski@marvell.com>
PR middle-end/93242
* targhooks.c (default_print_patchable_function_entry): Use
output_asm_insn to emit the nop instruction.
2020-01-20 Fangrui Song <maskray@google.com>
PR middle-end/93194
* targhooks.c (default_print_patchable_function_entry): Align to
POINTER_SIZE.
2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
PR target/93319
* config/i386/i386.c (legitimize_tls_address): Pass Pmode to
gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
* config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
(@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
(*tls_dynamic_gnu2_lea_64): Renamed to ...
(*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
Remove the {q} suffix from lea.
(*tls_dynamic_gnu2_call_64): Renamed to ...
(*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
(*tls_dynamic_gnu2_combine_64): Renamed to ...
(*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
Pass Pmode to gen_tls_dynamic_gnu2_64.
2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins-base.cc
(svld1ro_impl::memory_vector_mode): Remove parameter name.
2020-01-20 Richard Biener <rguenther@suse.de>
PR debug/92763
* dwarf2out.c (prune_unused_types): Unconditionally mark
called function DIEs.
2020-01-20 Martin Liska <mliska@suse.cz>
PR tree-optimization/93199
* tree-eh.c (struct leh_state): Add
new field outer_non_cleanup.
(cleanup_is_dead_in): Pass leh_state instead
of eh_region. Add a checking that state->outer_non_cleanup
points to outer non-clean up region.
(lower_try_finally): Record outer_non_cleanup
for this_state.
(lower_catch): Likewise.
(lower_eh_filter): Likewise.
(lower_eh_must_not_throw): Likewise.
(lower_cleanup): Likewise.
2020-01-20 Richard Biener <rguenther@suse.de>
PR tree-optimization/93094
* tree-vectorizer.h (vect_loop_versioning): Adjust.
(vect_transform_loop): Likewise.
* tree-vectorizer.c (try_vectorize_loop_1): Pass down
loop_vectorized_call to vect_transform_loop.
* tree-vect-loop.c (vect_transform_loop): Pass down
loop_vectorized_call to vect_loop_versioning.
* tree-vect-loop-manip.c (vect_loop_versioning): Use
the earlier discovered loop_vectorized_call.
2020-01-19 Eric S. Raymond <esr@thyrsus.com>
* doc/contribute.texi: Update for SVN -> Git transition.
* doc/install.texi: Likewise.
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
PR lto/93318
* cgraph.c (cgraph_edge::make_speculative): Increase number of
speculative targets.
(verify_speculative_call): New function
(cgraph_node::verify_node): Use it.
* ipa-profile.c (ipa_profile): Fix formating; do not set number of
speculations.
2020-01-18 Jan Hubicka <hubicka@ucw.cz>
PR lto/93318
* cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
(cgraph_edge::make_direct): Remove all indirect targets.
(cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
(cgraph_node::verify_node): Verify that only one call_stmt or
lto_stmt_uid is set.
* cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
lto_stmt_uid.
* lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
(lto_output_ref): Simplify streaming of stmt.
* lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
2020-01-18 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
Mark parameter unused.
2020-01-18 Hans-Peter Nilsson <hp@axis.com>
* config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
* varpool.c (ctor_useable_for_folding_p): Fix grammar.
2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
* Makefile.in: Add coroutine-passes.o.
* builtin-types.def (BT_CONST_SIZE): New.
(BT_FN_BOOL_PTR): New.
(BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
* builtins.def (DEF_COROUTINE_BUILTIN): New.
* coroutine-builtins.def: New file.
* coroutine-passes.cc: New file.
* function.h (struct GTY function): Add a bit to indicate that the
function is a coroutine component.
* internal-fn.c (expand_CO_FRAME): New.
(expand_CO_YIELD): New.
(expand_CO_SUSPN): New.
(expand_CO_ACTOR): New.
* internal-fn.def (CO_ACTOR): New.
(CO_YIELD): New.
(CO_SUSPN): New.
(CO_FRAME): New.
* passes.def: Add pass_coroutine_lower_builtins,
pass_coroutine_early_expand_ifns.
* tree-pass.h (make_pass_coroutine_lower_builtins): New.
(make_pass_coroutine_early_expand_ifns): New.
* doc/invoke.texi: Document the fcoroutines command line
switch.
2020-01-18 Jakub Jelinek <jakub@redhat.com>
* config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
PR target/93312
* config/arm/arm.c (clear_operation_p): Don't use REGNO until
after checking the argument is a REG. Don't use REGNO (reg)
again to set last_regno, reuse regno variable instead.
2020-01-17 David Malcolm <dmalcolm@redhat.com>
* doc/analyzer.texi (Limitations): Add note about NaN.
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Sudakshina Das <sudi.das@arm.com>
* config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
and valid immediate.
(ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
(lshrdi3): Generate thumb2_lsrl for valid immediates.
* config/arm/constraints.md (Pg): New.
* config/arm/predicates.md (long_shift_imm): New.
(arm_reg_or_long_shift_imm): Likewise.
* config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
(thumb2_lsll): Likewise.
(thumb2_lsrl): New.
2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Sudakshina Das <sudi.das@arm.com>
* config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
(ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
* config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
register pairs for doubleword quantities for ARMv8.1M-Mainline.
* config/arm/thumb2.md (thumb2_asrl): New.
(thumb2_lsll): Likewise.
2020-01-17 Jakub Jelinek <jakub@redhat.com>
* config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
unused variable.
2020-01-17 Alexander Monakov <amonakov@ispras.ru>
* gdbinit.in (help-gcc-hooks): New command.
(pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
documentation.
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
correct target macro.
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-protos.h
(aarch64_sve_ld1ro_operand_p): New.
* config/aarch64/aarch64-sve-builtins-base.cc
(class load_replicate): New.
(class svld1ro_impl): New.
(class svld1rq_impl): Change to inherit from load_replicate.
(svld1ro): New sve intrinsic function base.
* config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
New DEF_SVE_FUNCTION.
* config/aarch64/aarch64-sve-builtins-base.h
(svld1ro): New decl.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::add_mem_operand): Modify assert to allow
OImode.
* config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
pattern.
* config/aarch64/aarch64.c
(aarch64_sve_ld1rq_operand_p): Implement in terms of ...
(aarch64_sve_ld1rq_ld1ro_operand_p): This.
(aarch64_sve_ld1ro_operand_p): New.
* config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
* config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
* config/aarch64/predicates.md
(aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
* config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
Introduce this ACLE specified predefined macro.
* config/aarch64/aarch64-option-extensions.def (f64mm): New.
(fp): Disabling this disables f64mm.
(simd): Disabling this disables f64mm.
(fp16): Disabling this disables f64mm.
(sve): Disabling this disables f64mm.
* config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
(AARCH64_ISA_F64MM): New.
(TARGET_F64MM): New.
* doc/invoke.texi (f64mm): Document new option.
2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
(neoversen1_tunings): Likewise.
2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
PR target/92692
* config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
Add assert to ensure prolog has been emitted.
(aarch64_split_atomic_op): Likewise.
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
Use epilogue_completed rather than reload_completed.
(aarch64_atomic_exchange<mode>): Likewise.
(aarch64_atomic_<atomic_optab><mode>): Likewise.
(atomic_nand<mode>): Likewise.
(aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
PR target/93133
* config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
for FP modes.
(REVERSE_CONDITION): Delete.
* config/aarch64/iterators.md (CC_ONLY): New mode iterator.
(CCFP_CCFPE): Likewise.
(e): New mode attribute.
* config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
(@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
(fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
(@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
(@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
(@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
* config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
name of generator from gen_ccmpdi to gen_ccmpccdi.
(aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
the previous comparison but aren't able to, use the new ccmp_rev
patterns instead.
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
* gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
than testing directly for INTEGER_CST.
(gimplify_target_expr, gimplify_omp_depend): Likewise.
2020-01-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93292
* tree-vect-stmts.c (vectorizable_comparison): Punt also if
get_vectype_for_scalar_type returns NULL.
2020-01-16 Jan Hubicka <hubicka@ucw.cz>
* params.opt (-param=max-predicted-iterations): Increase range from 0.
* predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
2020-01-16 Jan Hubicka <hubicka@ucw.cz>
* ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
dump.
* params.opt: (max-predicted-iterations): Set bounds.
* predict.c (real_almost_one, real_br_prob_base,
real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
(propagate_freq): Add max_cyclic_prob parameter; cap cyclic
probabilities; do not truncate to reg_br_prob_bases.
(estimate_loops_at_level): Pass max_cyclic_prob.
(estimate_loops): Compute max_cyclic_prob.
(estimate_bb_frequencies): Do not initialize real_*; update calculation
of back edge prob.
* profile-count.c (profile_probability::to_sreal): New.
* profile-count.h (class sreal): Move up in file.
(profile_probability::to_sreal): Declare.
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/arm/arm.c
(arm_invalid_conversion): New function for target hook.
(arm_invalid_unary_op): New function for target hook.
(arm_invalid_binary_op): New function for target hook.
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config.gcc: Add arm_bf16.h.
* config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
(arm_simd_builtin_std_type): Add BFmode.
(arm_init_simd_builtin_types): Define element types for vector types.
(arm_init_bf16_types): New function.
(arm_init_builtins): Add arm_init_bf16_types function call.
* config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
* config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
* config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
(arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
(arm_vector_mode_supported_p): Add V4BF, V8BF.
(arm_mangle_type): Add __bf16.
* config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
arm_bf16_ptr_type_node.
* config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
define_split between ARM registers.
* config/arm/arm_bf16.h: New file.
* config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
* config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
(VQXMOV): Add V8BF.
* config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
* config/arm/vfp.md: Add BFmode to movhf patterns.
2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/arm-cpus.in (mve, mve_float): New features.
(dsp, mve, mve.fp): New options.
* config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
* config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
* doc/invoke.texi: Document the armv8.1-m mve and dps options.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
Armv8-M Mainline.
* config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
error for using -mcmse when targeting Armv8.1-M Mainline.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.md (nonsecure_call_internal): Do not force memory
address in r4 when targeting Armv8.1-M Mainline.
(nonsecure_call_value_internal): Likewise.
* config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
a register match_operand again. Emit BLXNS when targeting
Armv8.1-M Mainline.
(nonsecure_call_value_reg_thumb2): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
(cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
variable as true when floating-point ABI is not hard. Replace
check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
Generate VLSTM and VLLDM instruction respectively before and
after a function call to cmse_nonsecure_call function.
* config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
(VUNSPEC_VLLDM): Likewise.
* config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
(lazy_load_multiple_insn): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (vfp_emit_fstmd): Declare early.
(arm_emit_vfp_multi_reg_pop): Likewise.
(cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
restore callee-saved VFP registers.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
(cmse_nonsecure_call_clear_caller_saved): Rename into ...
(cmse_nonsecure_call_inline_register_clear): This. Save and clear
callee-saved GPRs as well as clear ip register before doing a nonsecure
call then restore callee-saved GPRs after it when targeting
Armv8.1-M Mainline.
(arm_reorg): Adapt to function rename.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
* config/arm/arm.c (clear_operation_p): Extend to be able to check a
clear_vfp_multiple pattern based on a new vfp parameter.
(cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
targeting Armv8.1-M Mainline.
(cmse_nonsecure_entry_clear_before_return): Clear VFP registers
unconditionally when targeting Armv8.1-M Mainline architecture. Check
whether VFP registers are available before looking call_used_regs for a
VFP register.
* config/arm/predicates.md (clear_multiple_operation): Adapt to change
of prototype of clear_operation_p.
(clear_vfp_multiple_operation): New predicate.
* config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
* config/arm/vfp.md (clear_vfp_multiple): New define_insn.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (clear_operation_p): Declare.
* config/arm/arm.c (clear_operation_p): New function.
(cmse_clear_registers): Generate clear_multiple instruction pattern if
targeting Armv8.1-M Mainline or successor.
(output_return_instruction): Only output APSR register clearing if
Armv8.1-M Mainline instructions not available.
(thumb_exit): Likewise.
* config/arm/predicates.md (clear_multiple_operation): New predicate.
* config/arm/thumb2.md (clear_apsr): New define_insn.
(clear_multiple): Likewise.
* config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (fp_sysreg_names): Declare and define.
(use_return_insn): Also return false for Armv8.1-M Mainline.
(output_return_instruction): Skip FPSCR clearing if Armv8.1-M
Mainline instructions are available.
(arm_compute_frame_layout): Allocate space in frame for FPCXTNS
when targeting Armv8.1-M Mainline Security Extensions.
(arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
Mainline entry function.
(cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
targeting Armv8.1-M Mainline or successor.
(arm_expand_epilogue): Fix indentation of caller-saved register
clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
entry function.
* config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
(FP_SYSREGS): Likewise.
(enum vfp_sysregs_encoding): Define enum.
(fp_sysreg_names): Declare.
* config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
* config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
(pop_fpsysreg_insn): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-cpus.in (armv8_1m_main): New feature.
(ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
(ARMv8_1m_main): New feature group.
(armv8.1-m.main): New architecture.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
(arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
(arm_options_perform_arch_sanity_checks): Error out when targeting
Armv8.1-M Mainline Security Extensions.
* config/arm/arm.h (arm_arch8_1m_main): Declare.
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
* config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
aarch64_bfdot_laneq): New.
* config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
vbfdotq_laneq_f32): New.
* config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
VBFMLA_W, VBF): New.
(isquadop): Add V4BF, V8BF.
2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
(aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
(aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
* config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
usdot_laneq, sudot_lane,sudot_laneq): New.
* config/aarch64/aarch64-simd.md (aarch64_usdot): New.
(aarch64_<sur>dot_lane): New.
* config/aarch64/arm_neon.h (vusdot_s32): New.
(vusdotq_s32): New.
(vusdot_lane_s32): New.
(vsudot_lane_s32): New.
* config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
(UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
2020-01-16 Martin Liska <mliska@suse.cz>
* value-prof.c (dump_histogram_value): Fix
obvious spacing issue.
2020-01-16 Andrew Pinski <apinski@marvell.com>
* tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
!storage_order_barrier_p.
2020-01-16 Andrew Pinski <apinski@marvell.com>
* sched-int.h (_dep): Add unused bit-field field for the padding.
* sched-deps.c (init_dep_1): Init unused field.
2020-01-16 Andrew Pinski <apinski@marvell.com>
* optabs.h (create_expand_operand): Initialize target field also.
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR tree-optimization/92429
* tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
* tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
control folding.
* tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
tree.
2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
aarch64_sve_int_mode to each mode.
2020-01-15 David Malcolm <dmalcolm@redhat.com>
* doc/analyzer.texi (Overview): Add note about
-fdump-ipa-analyzer.
2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/93231
* tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
input_type is unsigned. Use tree_to_shwi for shift constant.
Check CST_STRING element size is CHAR_TYPE_SIZE bits.
(simplify_count_trailing_zeroes): Add test to handle known non-zero
inputs more efficiently.
2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*movsf_internal): Do not require
SSE2 ISA for alternatives 14 and 15.
2020-01-15 Richard Biener <rguenther@suse.de>
PR middle-end/93273
* tree-eh.c (sink_clobbers): If we already visited the destination
block do not defer insertion.
(pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
the purpose of defered insertion.
2020-01-15 Jakub Jelinek <jakub@redhat.com>
* BASE-VER: Bump to 10.0.1.
2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
PR tree-optimization/93247
* tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
type of the stmt that we're going to vectorize.
2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
type from the lhs.
2020-01-15 Martin Liska <mliska@suse.cz>
* ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
2 calls of streamer_read_hwi in a function call.
2020-01-15 Richard Biener <rguenther@suse.de>
* alias.c (record_alias_subset): Avoid redundant work when
subset is already recorded.
2020-01-14 David Malcolm <dmalcolm@redhat.com>
* doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
the analyzer options provide CWE identifiers.
2020-01-14 David Malcolm <dmalcolm@redhat.com>
* tree-diagnostic-path.cc (path_summary::event_range::print):
When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
using get_pure_location.
2020-01-15 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93262
* tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
perform head trimming only if the last argument is constant,
either all ones, or larger or equal to head trim, in the latter
case decrease the last argument by head_trim.
PR tree-optimization/93249
* tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
(maybe_trim_memstar_call): Move head_trim and tail_trim vars to
function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
perform head trim unless we can prove there are no '\0' chars
from the source among the first head_trim chars.
2020-01-14 David Malcolm <dmalcolm@redhat.com>
* Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
2020-01-15 Jakub Jelinek <jakub@redhat.com>
PR target/93009
* config/i386/sse.md
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
just a single alternative instead of two, make operands 1 and 2
commutative.
2020-01-14 Jan Hubicka <hubicka@ucw.cz>
PR lto/91576
* ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
TYPE_MODE.
2020-01-14 David Malcolm <dmalcolm@redhat.com>
* Makefile.in (lang_opt_files): Add analyzer.opt.
(ANALYZER_OBJS): New.
(OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
tristate.o and ANALYZER_OBJS.
(TEXI_GCCINT_FILES): Add analyzer.texi.
* common.opt (-fanalyzer): New driver option.
* config.in: Regenerate.
* configure: Regenerate.
* configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
(gccdepdir): Also create depdir for "analyzer" subdir.
* digraph.cc: New file.
* digraph.h: New file.
* doc/analyzer.texi: New file.
* doc/gccint.texi ("Static Analyzer") New menu item.
(analyzer.texi): Include it.
* doc/invoke.texi ("Static Analyzer Options"): New list and new section.
("Warning Options"): Add static analysis warnings to the list.
(-Wno-analyzer-double-fclose): New option.
(-Wno-analyzer-double-free): New option.
(-Wno-analyzer-exposure-through-output-file): New option.
(-Wno-analyzer-file-leak): New option.
(-Wno-analyzer-free-of-non-heap): New option.
(-Wno-analyzer-malloc-leak): New option.
(-Wno-analyzer-possible-null-argument): New option.
(-Wno-analyzer-possible-null-dereference): New option.
(-Wno-analyzer-null-argument): New option.
(-Wno-analyzer-null-dereference): New option.
(-Wno-analyzer-stale-setjmp-buffer): New option.
(-Wno-analyzer-tainted-array-index): New option.
(-Wno-analyzer-use-after-free): New option.
(-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
(-Wno-analyzer-use-of-uninitialized-value): New option.
(-Wanalyzer-too-complex): New option.
(-fanalyzer-call-summaries): New warning.
(-fanalyzer-checker=): New warning.
(-fanalyzer-fine-grained): New warning.
(-fno-analyzer-state-merge): New warning.
(-fno-analyzer-state-purge): New warning.
(-fanalyzer-transitivity): New warning.
(-fanalyzer-verbose-edges): New warning.
(-fanalyzer-verbose-state-changes): New warning.
(-fanalyzer-verbosity=): New warning.
(-fdump-analyzer): New warning.
(-fdump-analyzer-callgraph): New warning.
(-fdump-analyzer-exploded-graph): New warning.
(-fdump-analyzer-exploded-nodes): New warning.
(-fdump-analyzer-exploded-nodes-2): New warning.
(-fdump-analyzer-exploded-nodes-3): New warning.
(-fdump-analyzer-supergraph): New warning.
* doc/sourcebuild.texi (dg-require-dot): New.
(dg-check-dot): New.
* gdbinit.in (break-on-saved-diagnostic): New command.
* graphviz.cc: New file.
* graphviz.h: New file.
* ordered-hash-map-tests.cc: New file.
* ordered-hash-map.h: New file.
* passes.def (pass_analyzer): Add before
pass_ipa_whole_program_visibility.
* selftest-run-tests.c (selftest::run_tests): Call
selftest::ordered_hash_map_tests_cc_tests.
* selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
decl.
* shortest-paths.h: New file.
* timevar.def (TV_ANALYZER): New timevar.
(TV_ANALYZER_SUPERGRAPH): Likewise.
(TV_ANALYZER_STATE_PURGE): Likewise.
(TV_ANALYZER_PLAN): Likewise.
(TV_ANALYZER_SCC): Likewise.
(TV_ANALYZER_WORKLIST): Likewise.
(TV_ANALYZER_DUMP): Likewise.
(TV_ANALYZER_DIAGNOSTICS): Likewise.
(TV_ANALYZER_SHORTEST_PATHS): Likewise.
* tree-pass.h (make_pass_analyzer): New decl.
* tristate.cc: New file.
* tristate.h: New file.
2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
PR target/93254
* config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
alternatives 9 and 10.
2020-01-14 David Malcolm <dmalcolm@redhat.com>
* attribs.c (excl_hash_traits::empty_zero_p): New static constant.
* gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
* graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
* hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
(selftest::hash_map_tests_c_tests): Call it.
* hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
New static constant, using the value of = H::empty_zero_p.
(unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
from default_hash_traits <Value>.
* hash-map.h (hash_map::empty_zero_p): Likewise, using the value
from Traits.
* hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
* hash-table.h (hash_table::alloc_entries): Guard the loop of
calls to mark_empty with !Descriptor::empty_zero_p.
(hash_table::empty_slow): Conditionalize the memset call with a
check that Descriptor::empty_zero_p; otherwise, loop through the
entries calling mark_empty on them.
* hash-traits.h (int_hash::empty_zero_p): New static constant.
(pointer_hash::empty_zero_p): Likewise.
(pair_hash::empty_zero_p): Likewise.
* ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
Likewise.
* ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
(ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
* profile.c (location_triplet_hash::empty_zero_p): Likewise.
* sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
(sanopt_tree_couple_hash::empty_zero_p): Likewise.
* tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
* tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
* tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
* tree-vectorizer.h
(default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
Likewise.
2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
* cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
fix typo on return value.
2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
PR ipa/69678
* cgraph.c (symbol_table::create_edge): Init speculative_id and
target_prob.
(cgraph_edge::make_speculative): Add param for setting speculative_id
and target_prob.
(cgraph_edge::speculative_call_info): Update comments and find reference
by speculative_id for multiple indirect targets.
(cgraph_edge::resolve_speculation): Decrease the speculations
for indirect edge, drop it's speculative if not direct target
left. Update comments.
(cgraph_edge::redirect_call_stmt_to_callee): Likewise.
(cgraph_node::dump): Print num_speculative_call_targets.
(cgraph_node::verify_node): Don't report error if speculative
edge not include statement.
(cgraph_edge::num_speculative_call_targets_p): New function.
* cgraph.h (int common_target_id): Remove.
(int common_target_probability): Remove.
(num_speculative_call_targets): New variable.
(make_speculative): Add param for setting speculative_id.
(cgraph_edge::num_speculative_call_targets_p): New declare.
(target_prob): New variable.
(speculative_id): New variable.
* ipa-fnsummary.c (analyze_function_body): Create and duplicate
call summaries for multiple speculative call targets.
* cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
* ipa-profile.c (struct speculative_call_target): New struct.
(class speculative_call_summary): New class.
(class speculative_call_summaries): New class.
(call_sums): New variable.
(ipa_profile_generate_summary): Generate indirect multiple targets summaries.
(ipa_profile_write_edge_summary): New function.
(ipa_profile_write_summary): Stream out indirect multiple targets summaries.
(ipa_profile_dump_all_summaries): New function.
(ipa_profile_read_edge_summary): New function.
(ipa_profile_read_summary_section): New function.
(ipa_profile_read_summary): Stream in indirect multiple targets summaries.
(ipa_profile): Generate num_speculative_call_targets from
profile summaries.
* ipa-ref.h (speculative_id): New variable.
* ipa-utils.c (ipa_merge_profiles): Update with target_prob.
* lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
common_target_probability. Stream out speculative_id and
num_speculative_call_targets.
(input_edge): Likewise.
* predict.c (dump_prediction): Remove edges count assert to be
precise.
* symtab.c (symtab_node::create_reference): Init speculative_id.
(symtab_node::clone_references): Clone speculative_id.
(symtab_node::clone_referring): Clone speculative_id.
(symtab_node::clone_reference): Clone speculative_id.
(symtab_node::clear_stmts_in_references): Clear speculative_id.
* tree-inline.c (copy_bb): Duplicate all the speculative edges
if indirect call contains multiple speculative targets.
* value-prof.h (check_ic_target): Remove.
* value-prof.c (gimple_value_profile_transformations):
Use void function gimple_ic_transform.
* value-prof.c (gimple_ic_transform): Handle topn case.
Fix comment typos. Change it to a void function.
2020-01-13 Andrew Pinski <apinski@marvell.com>
* config/aarch64/aarch64-cores.def (octeontx2): New define.
(octeontx2t98): New define.
(octeontx2t96): New define.
(octeontx2t93): New define.
(octeontx2f95): New define.
(octeontx2f95n): New define.
(octeontx2f95mm): New define.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (-mcpu=): Document the new cpu types.
2020-01-13 Jason Merrill <jason@redhat.com>
PR c++/33799 - destroy return value if local cleanup throws.
* gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
2020-01-13 Martin Liska <mliska@suse.cz>
* ipa-cp.c (get_max_overall_size): Use newly
renamed param param_ipa_cp_unit_growth.
* params.opt: Remove legacy param name.
2020-01-13 Martin Sebor <msebor@redhat.com>
PR tree-optimization/93213
* tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
stores to be eliminated.
2020-01-13 Martin Liska <mliska@suse.cz>
* opts.c (print_help): Do not print CL_PARAM
and CL_WARNING for CL_OPTIMIZATION.
2020-01-13 Jonathan Wakely <jwakely@redhat.com>
PR driver/92757
* doc/invoke.texi (Warning Options): Add caveat about some warnings
depending on optimization settings.
2020-01-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/90838
* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
argument rather than to initialize temporary for targets that
don't use the mode argument at all. Initialize ctzval to avoid
warning at -O0.
2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
* tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
* tree-core.h: Document it.
* gimplify.c (gimplify_omp_workshare): Set it.
* omp-low.c (lower_omp_target): Use it.
* tree-pretty-print.c (dump_omp_clause): Print it.
* omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
2020-01-10 David Malcolm <dmalcolm@redhat.com>
* Makefile.in (OBJS): Add tree-diagnostic-path.o.
* common.opt (fdiagnostics-path-format=): New option.
(diagnostic_path_format): New enum.
(fdiagnostics-show-path-depths): New option.
* coretypes.h (diagnostic_event_id_t): New forward decl.
* diagnostic-color.c (color_dict): Add "path".
* diagnostic-event-id.h: New file.
* diagnostic-format-json.cc (json_from_expanded_location): Make
non-static.
(json_end_diagnostic): Call context->make_json_for_path if it
exists and the diagnostic has a path.
(diagnostic_output_format_init): Clear context->print_path.
* diagnostic-path.h: New file.
* diagnostic-show-locus.c (colorizer::set_range): Special-case
when printing a run of events in a diagnostic_path so that they
all get the same color.
(layout::m_diagnostic_path_p): New field.
(layout::layout): Initialize it.
(layout::print_any_labels): Don't colorize the label text for an
event in a diagnostic_path.
(gcc_rich_location::add_location_if_nearby): Add
"restrict_to_current_line_spans" and "label" params. Pass the
former to layout.maybe_add_location_range; pass the latter
when calling add_range.
* diagnostic.c: Include "diagnostic-path.h".
(diagnostic_initialize): Initialize context->path_format and
context->show_path_depths.
(diagnostic_show_any_path): New function.
(diagnostic_path::interprocedural_p): New function.
(diagnostic_report_diagnostic): Call diagnostic_show_any_path.
(simple_diagnostic_path::num_events): New function.
(simple_diagnostic_path::get_event): New function.
(simple_diagnostic_path::add_event): New function.
(simple_diagnostic_event::simple_diagnostic_event): New ctor.
(simple_diagnostic_event::~simple_diagnostic_event): New dtor.
(debug): New overload taking a diagnostic_path *.
* diagnostic.def (DK_DIAGNOSTIC_PATH): New.
* diagnostic.h (enum diagnostic_path_format): New enum.
(json::value): New forward decl.
(diagnostic_context::path_format): New field.
(diagnostic_context::show_path_depths): New field.
(diagnostic_context::print_path): New callback field.
(diagnostic_context::make_json_for_path): New callback field.
(diagnostic_show_any_path): New decl.
(json_from_expanded_location): New decl.
* doc/invoke.texi (-fdiagnostics-path-format=): New option.
(-fdiagnostics-show-path-depths): New option.
(-fdiagnostics-color): Add "path" to description of default
GCC_COLORS; describe it.
(-fdiagnostics-format=json): Document how diagnostic paths are
represented in the JSON output format.
* gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
Add optional params "restrict_to_current_line_spans" and "label".
* opts.c (common_handle_option): Handle
OPT_fdiagnostics_path_format_ and
OPT_fdiagnostics_show_path_depths.
* pretty-print.c: Include "diagnostic-event-id.h".
(pp_format): Implement "%@" format code for printing
diagnostic_event_id_t *.
(selftest::test_pp_format): Add tests for "%@".
* selftest-run-tests.c (selftest::run_tests): Call
selftest::tree_diagnostic_path_cc_tests.
* selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
* toplev.c (general_init): Initialize global_dc->path_format and
global_dc->show_path_depths.
* tree-diagnostic-path.cc: New file.
* tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
non-static. Drop "diagnostic" param in favor of storing the
original value of "where" and re-using it.
(virt_loc_aware_diagnostic_finalizer): Update for dropped param of
maybe_unwind_expanded_macro_loc.
(tree_diagnostics_defaults): Initialize context->print_path and
context->make_json_for_path.
* tree-diagnostic.h (default_tree_diagnostic_path_printer): New
decl.
(default_tree_make_json_for_path): New decl.
(maybe_unwind_expanded_macro_loc): New decl.
2020-01-10 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93210
* fold-const.h (native_encode_initializer,
can_native_interpret_type_p): Declare.
* fold-const.c (native_encode_string): Fix up handling with off != -1,
simplify.
(native_encode_initializer): New function, moved from dwarf2out.c.
Adjust to native_encode_expr compatible arguments, including dry-run
and partial extraction modes. Don't handle STRING_CST.
(can_native_interpret_type_p): No longer static.
* gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
offset / BITS_PER_UNIT fits into int and don't call it if
can_native_interpret_type_p fails. If suboff is NULL and for
CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
native_encode_initializer.
(fold_const_aggregate_ref_1): Formatting fix.
* dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
(tree_add_const_value_attribute): Adjust caller.
PR tree-optimization/90838
* tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
CTZ_DEFINED_VALUE_AT_ZERO.
2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
PR inline-asm/93027
* lra-constraints.c (match_reload): Permit input operands have the
same mode as output while other input operands have a different
mode.
2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/90838
* tree-ssa-forwprop.c (check_ctz_array): Add new function.
(check_ctz_string): Likewise.
(optimize_count_trailing_zeroes): Likewise.
(simplify_count_trailing_zeroes): Likewise.
(pass_forwprop::execute): Try ctz simplification.
* match.pd: Add matching for ctz idioms.
2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
for target hook.
(aarch64_invalid_unary_op): New function for target hook.
(aarch64_invalid_binary_op): New function for target hook.
2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
* config.gcc: Add arm_bf16.h.
* config/aarch64/aarch64-builtins.c
(aarch64_simd_builtin_std_type): Add BFmode.
(aarch64_init_simd_builtin_types): Define element types for vector
types.
(aarch64_init_bf16_types): New function.
(aarch64_general_init_builtins): Add arm_init_bf16_types function call.
* config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
modes.
* config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
* config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
patterns.
* config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
(AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
* config/aarch64/aarch64.c
(aarch64_classify_vector_mode): Add support for BF types.
(aarch64_gimplify_va_arg_expr): Add support for BF types.
(aarch64_vq_mode): Add support for BF types.
(aarch64_simd_container_mode): Add support for BF types.
(aarch64_mangle_type): Add support for BF scalar type.
* config/aarch64/aarch64.md: Add BFmode to movhf pattern.
* config/aarch64/arm_bf16.h: New file.
* config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
* config/aarch64/iterators.md: Add BF types to mode attributes.
(HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
2020-01-10 Jason Merrill <jason@redhat.com>
PR c++/93173 - incorrect tree sharing.
* gimplify.c (copy_if_shared): No longer static.
* gimplify.h: Declare it.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
* doc/invoke.texi (-msve-vector-bits=): Document that
-msve-vector-bits=128 now generates VL-specific code for
little-endian targets.
* config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
build_vector_type_for_mode to construct the data vector types.
* config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
VL-specific code for -msve-vector-bits=128 on little-endian targets.
(aarch64_simd_container_mode): Always prefer Advanced SIMD modes
for 128-bit vectors.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
invocation.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_builtin_vectorized_function): Check for specific vector modes,
rather than checking the number of elements and the element mode.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
get_related_vectype_for_scalar_type rather than build_vector_type
to create the index type for a conditional reduction.
2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
for any type of gather or scatter, including strided accesses.
2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
* tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
comment.
2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
* tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
get_dr_vinfo_offset
* tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
parameter and its use to reset DR_OFFSET's.
(vect_transform_loop): Remove orig_drs_init argument.
* tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
member of dr_vec_info rather than the offset of the associated
data_reference's innermost_loop_behavior.
(vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
(vect_do_peeling): Remove orig_drs_init parameter and its construction.
* tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
get_dr_vinfo_offset.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
2020-01-10 Richard Biener <rguenther@suse.de>
* gimple-ssa-store-merging
(pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
2020-01-10 Martin Liska <mliska@suse.cz>
PR ipa/93217
* ipa-inline-analysis.c (offline_size): Make proper parenthesis
encapsulation that was there before r280040.
2020-01-10 Richard Biener <rguenther@suse.de>
PR middle-end/93199
* tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
sequences to avoid walking them again for secondary opportunities.
(pass_lower_eh_dispatch::execute): Instead actually insert
them here.
2020-01-10 Richard Biener <rguenther@suse.de>
PR middle-end/93199
* tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
(cleanup_all_empty_eh): Walk landing pads in reverse order to
avoid quadraticness.
2020-01-10 Martin Jambor <mjambor@suse.cz>
* params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
* ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
to get param_ipa_sra_max_replacements.
(param_splitting_across_edge): Pass the caller to
pull_accesses_from_callee.
2020-01-10 Martin Jambor <mjambor@suse.cz>
* params.opt (param_ipcp_unit_growth): Mark as Optimization.
* ipa-cp.c (max_new_size): Removed.
(orig_overall_size): New variable.
(get_max_overall_size): New function.
(estimate_local_effects): Use it. Adjust dump.
(decide_about_value): Likewise.
(ipcp_propagate_stage): Do not calculate max_new_size, just store
orig_overall_size. Adjust dump.
(ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
2020-01-10 Martin Jambor <mjambor@suse.cz>
* params.opt (param_ipa_max_agg_items): Mark as Optimization
* ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
instead of param_ipa_max_agg_items.
(merge_aggregate_lattices): Extract param_ipa_max_agg_items from
optimization info for the callee.
2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
* lto-streamer-in.c (input_function): Remove streamed-in inline debug
markers if debug_inline_points is false.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
extra_objs.
* config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
aarch64-sve-builtins-sve2.h.
(aarch64-sve-builtins-sve2.o): New rule.
* config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
(AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
(TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
TARGET_SVE2_SM4.
* config/aarch64/aarch64-sve.md: Update comments with SVE2
instructions that are handled here.
(@cond_asrd<mode>): Generalize to...
(@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
(*cond_asrd<mode>_2): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
(*cond_asrd<mode>_z): Generalize to...
(*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
* config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
(UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
(UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
* config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
pattern.
(@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_scatter_stnt<mode>): Likewise.
(@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
(@aarch64_mul_lane_<mode>): Likewise.
(@aarch64_sve_suqadd<mode>_const): Likewise.
(*<sur>h<addsub><mode>): Generalize to...
(@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
new pattern.
(@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
(*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
(@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
(*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_add_mul_lane_<mode>): Likewise.
(@aarch64_sve_sub_mul_lane_<mode>): Likewise.
(@aarch64_sve2_xar<mode>): Likewise.
(@aarch64_sve2_bcax<mode>): Likewise.
(*aarch64_sve2_eor3<mode>): Rename to...
(@aarch64_sve2_eor3<mode>): ...this.
(@aarch64_sve2_bsl<mode>): New expander.
(@aarch64_sve2_nbsl<mode>): Likewise.
(@aarch64_sve2_bsl1n<mode>): Likewise.
(@aarch64_sve2_bsl2n<mode>): Likewise.
(@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
(*aarch64_sve2_sra<mode>): Add MOVPRFX support.
(@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
(@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
(@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
(*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
(@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
(<su>mull<bt><Vwide>): Generalize to...
(@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
pattern.
(@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
(@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
(@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
(@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
(@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
(<SHRNB:r>shrnb<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
new pattern.
(<SHRNT:r>shrnt<mode>): Generalize to...
(@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
new pattern.
(@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
(*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
(@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
(@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_cvtnt<mode>): Likewise.
(@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
(@aarch64_sve2_cvtxnt<mode>): Likewise.
(@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
(@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
(*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
(@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
(@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
(*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
(@aarch64_sve2_pmul<mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
(@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
(@aarch64_sve2_tbl2<mode>): Likewise.
(@aarch64_sve2_tbx<mode>): Likewise.
(@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
(@aarch64_sve2_histcnt<mode>): Likewise.
(@aarch64_sve2_histseg<mode>): Likewise.
(@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
(*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
(aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
(aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
(*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
(aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
(<su>mulh<r>s<mode>3): Update after above pattern name changes.
* config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
(SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
(SVE2_PMULL_PAIR_I): New mode iterators.
(UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
(UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
(UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
(UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
(UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
(UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
(UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
(UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
(UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
(UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
(UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
(UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
(UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
(UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
(UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
(UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
(UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
(UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
(UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
(UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
(UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
(UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
(UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
(UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
(UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
(UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
(UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
(UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
(UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
(UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
(UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
further down file.
(VNARROW, Ventype): New mode attributes.
(Vewtype): Handle VNx2DI. Fix typo in comment.
(VDOUBLE): New mode attribute.
(sve_lane_con): Handle VNx8HI.
(SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
(SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
(sve_int_op, sve_int_op_rev): Handle the above codes.
(sve_pred_int_rhs2_operand): Likewise.
(MULLBT, SHRNB, SHRNT): Delete.
(SVE_INT_SHIFT_IMM): New int iterator.
(SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
and UNSPEC_WHILEHS for TARGET_SVE2.
(SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
(SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
(SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
(SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
(SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
(SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
(SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
(SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
(SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
(SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
(SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
(SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
(SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
(SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
(SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
(SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
(SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
(optab): Handle the new unspecs.
(su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
and UNSPEC_RSHRNT.
(lr): Handle the new unspecs.
(bt): Delete.
(cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
(sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
(sve_int_qsub_op): New int attributes.
(sve_fp_op, rot): Handle the new unspecs.
* config/aarch64/aarch64-sve-builtins.h
(function_resolver::require_matching_pointer_type): Declare.
(function_resolver::resolve_unary): Add an optional boolean argument.
(function_resolver::finish_opt_n_resolution): Add an optional
type_suffix_index argument.
(gimple_folder::redirect_call): Declare.
(gimple_expander::prepare_gather_address_operands): Add an optional
bool parameter.
* config/aarch64/aarch64-sve-builtins.cc: Include
aarch64-sve-builtins-sve2.h.
(TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
(TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
(TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
(TYPES_hsd_integer): Use TYPES_hsd_signed.
(TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
(TYPES_s_unsigned): Likewise.
(TYPES_s_integer): Use TYPES_s_unsigned.
(TYPES_sd_signed, TYPES_sd_unsigned): New macros.
(TYPES_sd_integer): Use them.
(TYPES_d_unsigned): New macro.
(TYPES_d_integer): Use it.
(TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
(TYPES_cvt_narrow): Likewise.
(DEF_SVE_TYPES_ARRAY): Include the new types macros above.
(preds_mx): New variable.
(function_builder::add_overloaded_function): Allow the new feature
set to be more restrictive than the original one.
(function_resolver::infer_pointer_type): Remove qualifiers from
the pointer type before printing it.
(function_resolver::require_matching_pointer_type): New function.
(function_resolver::resolve_sv_displacement): Handle functions
that don't support 32-bit vector indices or svint32_t vector offsets.
(function_resolver::finish_opt_n_resolution): Take the inferred type
as a separate argument.
(function_resolver::resolve_unary): Optionally treat all forms in
the same way as normal merging functions.
(gimple_folder::redirect_call): New function.
(function_expander::prepare_gather_address_operands): Add an argument
that says whether scaled forms are available. If they aren't,
handle scaling of vector indices and don't add the extension and
scaling operands.
(function_expander::map_to_unspecs): If aarch64_sve isn't available,
fall back to using cond_* instead.
* config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
Split out the member variables into...
(rtx_code_function_base): ...this new base class.
(rtx_code_function_rotated): Inherit rtx_code_function_base.
(unspec_based_function): Split out the member variables into...
(unspec_based_function_base): ...this new base class.
(unspec_based_function_rotated): Inherit unspec_based_function_base.
(unspec_based_function_exact_insn): New class.
(unspec_based_add_function, unspec_based_add_lane_function)
(unspec_based_lane_function, unspec_based_pred_function)
(unspec_based_qadd_function, unspec_based_qadd_lane_function)
(unspec_based_qsub_function, unspec_based_qsub_lane_function)
(unspec_based_sub_function, unspec_based_sub_lane_function): New
typedefs.
(unspec_based_fused_function): New class.
(unspec_based_mla_function, unspec_based_mls_function): New typedefs.
(unspec_based_fused_lane_function): New class.
(unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
typedefs.
(CODE_FOR_MODE1): New macro.
(fixed_insn_function): New class.
(while_comparison): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
(binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
(binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
(load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
(load_gather_sv_restricted, shift_left_imm_long): Declare.
(shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
(shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
(shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
(store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
(ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
(ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
(unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
(unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
Also add an initial argument for unary_convert_narrowt, regardless
of the predication type.
(build_32_64): Allow loads and stores to specify MODE_none.
(build_sv_index64, build_sv_uint_offset): New functions.
(long_type_suffix): New function.
(binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
(binary_imm_long_base, load_gather_sv_base): Likewise.
(shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
(ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
(unary_narrowb_base, unary_narrowt_base): Likewise.
(binary_long_lane_def, binary_long_lane): New shape.
(binary_long_opt_n_def, binary_long_opt_n): Likewise.
(binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
(binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
(binary_to_uint_def, binary_to_uint): Likewise.
(binary_wide_def, binary_wide): Likewise.
(binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
(compare_def, compare): Likewise.
(compare_ptr_def, compare_ptr): Likewise.
(load_ext_gather_index_restricted_def,
load_ext_gather_index_restricted): Likewise.
(load_ext_gather_offset_restricted_def,
load_ext_gather_offset_restricted): Likewise.
(load_gather_sv_def): Inherit from load_gather_sv_base.
(load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
(shift_left_imm_def, shift_left_imm): Likewise.
(shift_left_imm_long_def, shift_left_imm_long): Likewise.
(shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
(store_scatter_index_restricted_def,
store_scatter_index_restricted): Likewise.
(store_scatter_offset_restricted_def,
store_scatter_offset_restricted): Likewise.
(tbl_tuple_def, tbl_tuple): Likewise.
(ternary_long_lane_def, ternary_long_lane): Likewise.
(ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
(ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
(ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
(ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
(ternary_qq_rotate_def, ternary_qq_rotate): New shape.
(ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
(ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
(ternary_uint_def, ternary_uint): Likewise.
(unary_convert): Fix typo in comment.
(unary_convert_narrowt_def, unary_convert_narrowt): New shape.
(unary_long_def, unary_long): Likewise.
(unary_narrowb_def, unary_narrowb): Likewise.
(unary_narrowt_def, unary_narrowt): Likewise.
(unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
(unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
(unary_to_int_def, unary_to_int): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
(unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
(svasrd_impl): Delete.
(svcadd_impl::expand): Handle integer operations too.
(svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
new functions to derive the unspec numbers.
(svmla_svmls_lane_impl): Replace with...
(svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
integer operations too.
(svwhile_impl): Rename to...
(svwhilelx_impl): ...this and inherit from while_comparison.
(svasrd): Use unspec_based_function.
(svmla_lane): Use svmla_lane_impl.
(svmls_lane): Use svmls_lane_impl.
(svrecpe, svrsqrte): Handle unsigned integer operations too.
(svwhilele, svwhilelt): Use svwhilelx_impl.
* config/aarch64/aarch64-sve-builtins-sve2.h: New file.
* config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
* config/aarch64/aarch64-sve-builtins.def: Include
aarch64-sve-builtins-sve2.def.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
* config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
(aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
immediates as well as vector ones.
* config/aarch64/predicates.md (aarch64_sve_arith_immediate)
(aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
(aarch64_sve_qsub_immediate): Update calls accordingly.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve2.md: Add banner comments.
(<su>mulh<r>s<mode>3): Move further up file.
(<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
(*aarch64_sve2_sra<mode>): Move further down file.
* config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
and UNSPEC_WHILEWR.
(while_optab_cmp): Handle them.
* config/aarch64/aarch64-sve.md
(*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
and add a "@" marker.
* config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
instead of gen_aarch64_sve2_while_ptest.
(@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
(UNSPEC_WHILELE): ...this.
(UNSPEC_WHILE_LO): Rename to...
(UNSPEC_WHILELO): ...this.
(UNSPEC_WHILE_LS): Rename to...
(UNSPEC_WHILELS): ...this.
(UNSPEC_WHILE_LT): Rename to...
(UNSPEC_WHILELT): ...this.
* config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
(cmp_op, while_optab_cmp): Likewise.
* config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
* config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
(svwhilelt): Likewise.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
(unary_to_uint): Define.
* config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
(unary_count): Rename to...
(unary_to_uint_def, unary_to_uint): ...this.
* config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve-builtins-functions.h
(code_for_mode_function): New class.
(CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
* config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
(svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
(svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
(svmul_lane, svtmad): Use CODE_FOR_MODE0.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/iterators.md (addsub): New code attribute.
* config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
Re-express as...
(aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
in the asm string and attributes. Fix indentation.
* config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
Re-express as...
(@aarch64_sve_<optab><mode>): ...this.
* config/aarch64/aarch64-sve-builtins.h
(function_expander::expand_signed_unpred_op): Delete.
* config/aarch64/aarch64-sve-builtins.cc
(function_expander::expand_signed_unpred_op): Likewise.
(function_expander::map_to_rtx_codes): If the optab isn't defined,
try using code_for_aarch64_sve instead.
* config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
(svqsub_impl): Likewise.
(svqadd, svqsub): Use rtx_code_function instead.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
(HADDSUB, sur, addsub): Remove them.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* tree-nrv.c (pass_return_slot::execute): Handle all internal
functions the same way, rather than singling out those that
aren't mapped directly to optabs.
2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
* target.def (compatible_vector_types_p): New target hook.
* hooks.h (hook_bool_const_tree_const_tree_true): Declare.
* hooks.c (hook_bool_const_tree_const_tree_true): New function.
* doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
* doc/tm.texi: Regenerate.
* gimple-expr.c: Include target.h.
(useless_type_conversion_p): Use targetm.compatible_vector_types_p.
* config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
function.
(TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
* config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
Use the original predicate if it already has a suitable type.
2020-01-09 Martin Jambor <mjambor@suse.cz>
* cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
resolve_speculation and redirect_call_stmt_to_callee static. Change
return type of set_call_stmt to cgraph_edge *.
* auto-profile.c (afdo_indirect_call): Adjust call to
redirect_call_stmt_to_callee.
* cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
make the this pointer explicit, adjust self-recursive calls and the
call top make_direct. Return the resulting edge.
(cgraph_edge::remove): Make this pointer explicit.
(cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
(cgraph_edge::make_direct): Likewise, adjust call to
resolve_speculation.
(cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
call to set_call_stmt.
(cgraph_update_edges_for_call_stmt_node): Update call to
set_call_stmt and remove.
* cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
Renamed edge to master_edge. Adjusted calls to set_call_stmt.
(cgraph_node::create_edge_including_clones): Moved "first" definition
of edge to the block where it was used. Adjusted calls to
set_call_stmt.
(cgraph_node::remove_symbol_and_inline_clones): Adjust call to
cgraph_edge::remove.
* cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
make_direct and redirect_call_stmt_to_callee.
* ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
resolve_speculation and make_direct.
* ipa-inline-transform.c (inline_transform): Adjust call to
redirect_call_stmt_to_callee.
(check_speculations_1):: Adjust call to resolve_speculation.
* ipa-inline.c (resolve_noninline_speculation): Adjust call to
resolve-speculation.
(inline_small_functions): Adjust call to resolve_speculation.
(ipa_inline): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
make_direct.
* ipa-visibility.c (function_and_variable_visibility): Make iteration
safe with regards to edge removal, adjust calls to
redirect_call_stmt_to_callee.
* ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
and redirect_call_stmt_to_callee.
* multiple_target.c (create_dispatcher_calls): Adjust call to
redirect_call_stmt_to_callee
(redirect_to_specific_clone): Likewise.
* tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
Adjust calls to cgraph_edge::remove.
* tree-inline.c (copy_bb): Adjust call to set_call_stmt.
(redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
(expand_call_inline): Adjust call to cgraph_edge::remove.
2020-01-09 Martin Liska <mliska@suse.cz>
* params.opt: Set Optimization for
param_max_speculative_devirt_maydefs.
2020-01-09 Martin Sebor <msebor@redhat.com>
PR middle-end/93200
PR fortran/92956
* builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
2020-01-09 Martin Liska <mliska@suse.cz>
* auto-profile.c (auto_profile): Use opt_for_fn
for a parameter.
* ipa-cp.c (ipcp_lattice::add_value): Likewise.
(propagate_vals_across_arith_jfunc): Likewise.
(hint_time_bonus): Likewise.
(incorporate_penalties): Likewise.
(good_cloning_opportunity_p): Likewise.
(perform_estimation_of_a_value): Likewise.
(estimate_local_effects): Likewise.
(ipcp_propagate_stage): Likewise.
* ipa-fnsummary.c (decompose_param_expr): Likewise.
(set_switch_stmt_execution_predicate): Likewise.
(analyze_function_body): Likewise.
* ipa-inline-analysis.c (offline_size): Likewise.
* ipa-inline.c (early_inliner): Likewise.
* ipa-prop.c (ipa_analyze_node): Likewise.
(ipcp_transform_function): Likewise.
* ipa-sra.c (process_scan_results): Likewise.
(ipa_sra_summarize_function): Likewise.
* params.opt: Rename ipcp-unit-growth to
ipa-cp-unit-growth. Add Optimization for various
IPA-related parameters.
2020-01-09 Richard Biener <rguenther@suse.de>
PR middle-end/93054
* gimplify.c (gimplify_expr): Deal with NOP definitions.
2020-01-09 Richard Biener <rguenther@suse.de>
PR tree-optimization/93040
* gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
2020-01-09 Georg-Johann Lay <avr@gjlay.de>
* common/config/avr/avr-common.c (avr_option_optimization_table)
[OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
2020-01-09 Martin Liska <mliska@suse.cz>
* cgraphclones.c (symbol_table::materialize_all_clones):
Use cgraph_node::dump_name.
2020-01-09 Jakub Jelinek <jakub@redhat.com>
PR inline-asm/93202
* config/riscv/riscv.c (riscv_print_operand_reloc): Use
output_operand_lossage instead of gcc_unreachable.
* doc/md.texi (riscv f constraint): Fix typo.
PR target/93141
* config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
SWI. Use <general_hilo_operand> instead of <general_operand>. Use
CONST_SCALAR_INT_P instead of CONST_INT_P.
(*subv<mode>4_1): Rename to ...
(subv<mode>4_1): ... this.
(*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
define_insn_and_split patterns.
(*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
patterns.
2020-01-08 David Malcolm <dmalcolm@redhat.com>
* vec.c (class selftest::count_dtor): New class.
(selftest::test_auto_delete_vec): New test.
(selftest::vec_c_tests): Call it.
* vec.h (class auto_delete_vec): New class template.
(auto_delete_vec<T>::~auto_delete_vec): New dtor.
2020-01-08 David Malcolm <dmalcolm@redhat.com>
* sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
2020-01-08 Jim Wilson <jimw@sifive.com>
* config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
use of TLS_MODEL_LOCAL_EXEC when not pic.
2020-01-08 David Malcolm <dmalcolm@redhat.com>
* hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
memory leak.
2020-01-08 Jakub Jelinek <jakub@redhat.com>
PR target/93187
* config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
*stack_protect_set_3 peephole2): Also check that the second
insns source is general_operand.
PR target/93174
* config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
predicate for output operand instead of register_operand.
(addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
memory destination and non-memory operands[2].
2020-01-08 Martin Liska <mliska@suse.cz>
* cgraph.c (cgraph_node::dump): Use ::dump_name or
::dump_asm_name instead of (::name or ::asm_name).
* cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
* cgraphunit.c (walk_polymorphic_call_targets): Likewise.
(analyze_functions): Likewise.
(expand_all_functions): Likewise.
* ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
(propagate_bits_across_jump_function): Likewise.
(dump_profile_updates): Likewise.
(ipcp_store_bits_results): Likewise.
(ipcp_store_vr_results): Likewise.
* ipa-devirt.c (dump_targets): Likewise.
* ipa-fnsummary.c (analyze_function_body): Likewise.
* ipa-hsa.c (check_warn_node_versionable): Likewise.
(process_hsa_functions): Likewise.
* ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
(set_alias_uids): Likewise.
* ipa-inline-transform.c (save_inline_function_body): Likewise.
* ipa-inline.c (recursive_inlining): Likewise.
(inline_to_all_callers_1): Likewise.
(ipa_inline): Likewise.
* ipa-profile.c (ipa_propagate_frequency_1): Likewise.
(ipa_propagate_frequency): Likewise.
* ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
(remove_described_reference): Likewise.
* ipa-pure-const.c (worse_state): Likewise.
(check_retval_uses): Likewise.
(analyze_function): Likewise.
(propagate_pure_const): Likewise.
(propagate_nothrow): Likewise.
(dump_malloc_lattice): Likewise.
(propagate_malloc): Likewise.
(pass_local_pure_const::execute): Likewise.
* ipa-visibility.c (optimize_weakref): Likewise.
(function_and_variable_visibility): Likewise.
* ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
(ipa_discover_variable_flags): Likewise.
* lto-streamer-out.c (output_function): Likewise.
(output_constructor): Likewise.
* tree-inline.c (copy_bb): Likewise.
* tree-ssa-structalias.c (ipa_pta_execute): Likewise.
* varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
2020-01-08 Richard Biener <rguenther@suse.de>
PR middle-end/93199
* tree-eh.c (sink_clobbers): Update virtual operands for
the first and last stmt only. Add a dry-run capability.
(pass_lower_eh_dispatch::execute): Perform clobber sinking
after CFG manipulations and in RPO order to catch all
secondary opportunities reliably.
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
PR target/93182
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
2019-01-08 Richard Biener <rguenther@suse.de>
PR middle-end/93199
* gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
* tree-ssa-loop-im.c (move_computations_worker): Properly adjust
virtual operand, also updating SSA use.
* gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
Update stmt after resetting virtual operand.
(tree_loop_interchange::move_code_to_inner_loop): Likewise.
* gimple-iterator.c (gsi_remove): When not removing the stmt
permanently do not delink immediate uses or mark the stmt modified.
2020-01-08 Martin Liska <mliska@suse.cz>
* ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
(ipa_call_context::estimate_size_and_time): Likewise.
(inline_analyze_function): Likewise.
2020-01-08 Martin Liska <mliska@suse.cz>
* cgraph.c (cgraph_node::dump): Use systematically
dump_asm_name.
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
Add -nodevicespecs option for avr.
PR target/93182
* config/avr/avr.opt (-nodevicespecs): New driver option.
* config/avr/driver-avr.c (avr_devicespecs_file): Only issue
"-specs=device-specs/..." if that option is not set.
* doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
2020-01-08 Georg-Johann Lay <avr@gjlay.de>
Implement 64-bit double functions for avr.
PR target/92055
* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
--with-double-comparison.
* doc/install.texi: Document them.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
<WITH_DOUBLE_COMPARISON>: New built-in defines.
* doc/invoke.texi (AVR Built-in Macros): Document them.
* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
2020-01-08 Richard Earnshaw <rearnsha@arm.com>
PR target/93188
* config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
when only building rm-profile multilibs.
2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
PR ipa/93084
* ipa-cp.c (self_recursively_generated_p): Find matched aggregate
lattice for a value to check.
(propagate_vals_across_arith_jfunc): Add an assertion to ensure
finite propagation in self-recursive scc.
2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
* ipa-inline.c (caller_growth_limits): Restore the AND.
2020-01-07 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
(VEC_ALLREG_ALT): New iterator.
(VEC_ALLREG_INT_MODE): New iterator.
(VCMP_MODE): New iterator.
(VCMP_MODE_INT): New iterator.
(vec_cmpu<mode>di): Use VCMP_MODE_INT.
(vec_cmp<u>v64qidi): New define_expand.
(vec_cmp<mode>di_exec): Use VCMP_MODE.
(vec_cmpu<mode>di_exec): New define_expand.
(vec_cmp<u>v64qidi_exec): New define_expand.
(vec_cmp<mode>di_dup): Use VCMP_MODE.
(vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
(vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
(vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
(vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
(vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
this.
* config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
* config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
2020-01-07 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/constraints.md (DA): Update description and match.
(DB): Likewise.
(Db): New constraint.
* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
parameter.
* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
Implement 'Db' mixed immediate type.
* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
(addcv64si3_dup<exec_vcc>): Delete.
(subcv64si3<exec_vcc>): Rework constraints.
(addv64di3): Rework constraints.
(addv64di3_exec): Rework constraints.
(subv64di3): Rework constraints.
(addv64di3_dup): Delete.
(addv64di3_dup_exec): Delete.
(addv64di3_zext): Rework constraints.
(addv64di3_zext_exec): Rework constraints.
(addv64di3_zext_dup): Rework constraints.
(addv64di3_zext_dup_exec): Rework constraints.
(addv64di3_zext_dup2): Rework constraints.
(addv64di3_zext_dup2_exec): Rework constraints.
(addv64di3_sext_dup2): Rework constraints.
(addv64di3_sext_dup2_exec): Rework constraints.
2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
existing target checks.
2020-01-07 Richard Biener <rguenther@suse.de>
* doc/install.texi: Bump minimal supported MPC version.
2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
* langhooks-def.h (lhd_simulate_enum_decl): Declare.
(LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
* langhooks.c: Include stor-layout.h.
(lhd_simulate_enum_decl): New function.
* config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
handle_arm_sve_h for the LTO frontend.
(register_vector_type): Cope with null returns from pushdecl.
2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
(aarch64_sve::nvectors_if_data_type): Replace with...
(aarch64_sve::builtin_type_p): ...this.
* config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
(find_vector_type): Delete.
(add_sve_type_attribute): New function.
(lookup_sve_type_attribute): Likewise.
(register_builtin_types): Add an "SVE type" attribute to each type.
(register_tuple_type): Likewise.
(svbool_type_p, nvectors_if_data_type): Delete.
(mangle_builtin_type): Use lookup_sve_type_attribute.
(builtin_type_p): Likewise. Add an overload that returns the
number of constituent vector and predicate registers.
* config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
(aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
instead of aarch64_sve_argument_p.
(aarch64_takes_arguments_in_sve_regs_p): Likewise.
(aarch64_pass_by_reference): Likewise.
(aarch64_function_value_1): Likewise.
(aarch64_return_in_memory): Likewise.
(aarch64_layout_arg): Likewise.
2020-01-07 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93156
* tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
least significant bit is always clear.
PR tree-optimization/93118
* match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
simplifier with two intermediate conversions.
2020-01-07 Martin Liska <mliska@suse.cz>
* params.opt: Add Optimization for various parameters.
2020-01-07 Martin Liska <mliska@suse.cz>
PR ipa/83411
* doc/extend.texi: Explain cloning for target_clone
attribute.
2020-01-07 Martin Liska <mliska@suse.cz>
PR tree-optimization/92860
* common.opt: Make in Optimization option
as it is affected by -O0, which is an Optimization
option.
* tree-inline.c (tree_inlinable_function_p):
Use opt_for_fn for warn_inline.
(expand_call_inline): Likewise.
2020-01-07 Martin Liska <mliska@suse.cz>
PR tree-optimization/92860
* common.opt: Make flag_ree as optimization
attribute.
2020-01-07 Martin Liska <mliska@suse.cz>
PR optimization/92860
* params.opt: Mark param_min_crossjump_insns with Optimization
keyword.
2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
* ipa-inline-analysis.c (estimate_growth): Fix typo.
* ipa-inline.c (caller_growth_limits): Use OR instead of AND.
2020-01-06 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
helper function to return the valid addressing formats for a given
hard register and mode.
(rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
* config/rs6000/constraints.md (Q constraint): Update
documentation.
* doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
documentation.
* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
Use 'Q' for doing vector extract from memory.
(vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
memory.
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
doing vector extract from memory.
(vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
extract from memory.
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
for the offset being 34-bits when -mcpu=future is used.
2020-01-06 John David Anglin <danglin@gcc.gnu.org>
* config/pa/pa.md: Revert change to use ordered_comparison_operator
instead of cmpib_comparison_operator in cmpib patterns.
* config/pa/predicates.md (cmpib_comparison_operator): Revert removal
of cmpib_comparison_operator. Revise comment.
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
in an IFN_DIV_POW2 node to be equal.
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
(vect_check_scalar_mask): ...this.
(vectorizable_store, vectorizable_load): Update call accordingly.
(vectorizable_call): Use vect_check_scalar_mask to check the mask
argument in calls to conditional internal functions.
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
'0' matching inputs.
(subv64di3_exec): Likewise.
2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
* config/mips/mips.c (vr4130_align_insns): Fix typo.
* doc/md.texi (movstr): Likewise.
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
clobber.
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
Depend on...
(s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
to a temporary file and use move-if-change to update the real
file where necessary.
2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
rather than Upa for CPY /M.
2020-01-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
immediate.
2020-01-06 Martin Liska <mliska@suse.cz>
PR tree-optimization/92860
* params.opt: Mark param_max_combine_insns with Optimization
keyword.
2020-01-05 Jakub Jelinek <jakub@redhat.com>
PR target/93141
* config/i386/i386.md (SWIDWI): New mode iterator.
(DWI, dwi): Add TImode variants.
(addv<mode>4): Use SWIDWI iterator instead of SWI. Use
<general_hilo_operand> instead of <general_operand>. Use
CONST_SCALAR_INT_P instead of CONST_INT_P.
(*addv<mode>4_1): Rename to ...
(addv<mode>4_1): ... this.
(QWI): New mode attribute.
(*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
define_insn_and_split patterns.
(*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
patterns.
(uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
<general_hilo_operand> instead of <general_operand>.
(*addcarry<mode>_1): New define_insn.
(*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
* gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
Use "call" instead of "set".
2020-01-03 Martin Jambor <mjambor@suse.cz>
PR ipa/92917
* ipa-cp.c (print_all_lattices): Skip functions without info.
2020-01-03 Jakub Jelinek <jakub@redhat.com>
PR target/93089
* config/i386/i386-options.c (ix86_simd_clone_adjust): If
TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
for 'e' simd clones.
PR target/93089
* config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
entry.
(mprefer-vector-width=): Add Save.
* config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
-mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
(ix86_debug_options, ix86_function_specific_print): Adjust
ix86_target_string callers.
(ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
(ix86_valid_target_attribute_tree): Likewise.
* config/i386/i386-options.h (ix86_target_string): Add PVW argument.
* config/i386/i386-expand.c (ix86_expand_builtin): Adjust
ix86_target_string caller.
PR target/93110
* config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
instead of gen_int_shift_amount + convert_modes.
PR rtl-optimization/93088
* loop-iv.c (find_single_def_src): Punt after looking through
128 reg copies for regs with single definitions. Move definitions
to first uses.
2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): Define
__ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
__ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
__ARM_BF16_FORMAT_ALTERNATIVE when enabled.
* config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm.c (arm_option_reconfigure_globals): Initialize
arm_arch_i8mm and arm_arch_bf16 when enabled.
* config/arm/arm.h (TARGET_I8MM): New macro.
(TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
* config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
* config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
* config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
(v8_6_a_simd_variants): New.
(v8_*_a_simd_variants): Add i8mm and bf16.
* doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
2020-01-02 Jakub Jelinek <jakub@redhat.com>
PR ipa/93087
* predict.c (compute_function_frequency): Don't call
warn_function_cold on functions that already have cold attribute.
2020-01-01 John David Anglin <danglin@gcc.gnu.org>
PR target/67834
* config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
COMDAT group function labels in .data.rel.ro.local section.
* config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
PR target/93111
* config/pa/pa.md (scc): Use ordered_comparison_operator instead of
comparison_operator in B and S integer comparisons. Likewise, use
ordered_comparison_operator instead of cmpib_comparison_operator in
cmpib patterns.
* config/pa/predicates.md (cmpib_comparison_operator): Remove.
2020-01-01 Jakub Jelinek <jakub@redhat.com>
Update copyright years.
* gcc.c (process_command): Update copyright notice dates.
* gcov-dump.c (print_version): Ditto.
* gcov.c (print_version): Ditto.
* gcov-tool.c (print_version): Ditto.
* gengtype.c (create_file): Ditto.
* doc/cpp.texi: Bump @copying's copyright year.
* doc/cppinternals.texi: Ditto.
* doc/gcc.texi: Ditto.
* doc/gccint.texi: Ditto.
* doc/gcov.texi: Ditto.
* doc/install.texi: Ditto.
* doc/invoke.texi: Ditto.
2020-01-01 Jan Hubicka <hubicka@ucw.cz>
* ipa.c (walk_polymorphic_call_targets): Fix updating of overall
summary.
2020-01-01 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/93098
* match.pd (popcount): For shift amounts, use integer_onep
or wi::to_widest () == cst instead of tree_to_uhwi () == cst
tests. Make sure that precision is power of two larger than or equal
to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
instead of ULL suffixed constants. Formatting fixes.
Copyright (C) 2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
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