* config/mn10300/mn10300.c (expand_epilogue): If SP is to be
adjusted by less than 256 bytes, use ret regardless of having any
callee-saved register to restore.
From-SVN: r33573
* config/alpha/crtend.asm: Use C comments instead of #.
* config/alpha/crtbegin.asm: Likewise. Mark __dso_handle hidden.
* config/alpha/elf.h (SELECT_SECTION): Treat CONSTRUCTOR like VAR_DECL.
From-SVN: r33537
* config/mn10300/mn10300.h (REGNO_IN_RANGE_P): New macro.
(REGNO_DATA_P, REGNO_ADDRESS_P, REGNO_SP_P): New macros.
(REGNO_EXTENDED_P, REGNO_AM33_P): New macros.
(REGNO_OK_FOR_BASE_P): Define in terms of them.
(REGNO_OK_FOR_BIT_BASE_P, REGNO_OK_FOR_INDEX_P): Likewise.
(REG_OK_FOR_BASE_P): Define in terms of the REGNO macro.
(REG_OK_FOR_BIT_BASE_P, REG_OK_FOR_INDEX_P): Likewise.
From-SVN: r33359
* cccp.c, cexp.y, cexp.c, cccp.1: Removed.
* configure.in: Delete --disable-cpplib option and all
references to cpp_main.
* configure: Regenerate.
* Makefile.in: Remove all references to CCCP, CCCP_OBJS,
@cpp_main@, cccp.c, cexp.c, cexp.y, cexp.output, cexp.o,
cccp.o, cccp, or cppmain. Link cppmain.o straight to
cpp$(exeext). Add --no-headers to makeinfo command line when
generating INSTALL. Install and uninstall cpp.1 manpage, not
cccp.1.
* install.texi: Delete all references to cexp.y/cexp.c.
Delete ancient instructions for compiling GCC on 3b1.
* INSTALL: Regenerate.
* cppfiles.c, cpplib.h, jump.c, protoize.c, c-lex.c,
ch/decl.c, ch/lex.c, cp/lex.c, f/lex.c, mips/t-ecoff,
mips/t-elf, mips/t-r3900: Remove references to cccp.c.
* convex.h, fx80.h, m68k.h, pdp11.h, contrib/gcc_update,
f/g77install.texi: Remove references to cexp.c/cexp.y.
* xm-linux.h, xm-os2.h, romp.h: Remove definition of BSTRING,
which is no longer tested anywhere.
* po/POTFILES.in: Remove cccp.c and cexp.c. Comment out
alpha/vms-tramp.asm.
From-SVN: r33238
* i386.c (athlon_cost): Fix lea, divide and XFmode move costs.
(x86_integer_DFmode_moves, x86_partial_reg_dependency,
x86_memory_mismatch_stall): New global variables.
(ix86_adjust_cost): Handle MEMORY_BOTH on places MEMORY_STORE was only
alloved; fix load penalties for Athlon.
* i386.h (x86_integer_DFmode_moves, x86_partial_reg_dependency,
x86_memory_mismatch_stall): Declare.
(TARGET_INTEGER_DFMODE_MOVES, TARGET_PARTIAL_REG_DEPENDENCY,
TARGET_MEMORY_MISMATCH_STALL): New.
* i386.md (athlon scheduling parameters): Fix latencies according to
Athlon Optimization Manual.
(sahf, xchg, fldcw, leave instruction patterns): Set athlon_decode to
vector.
(fsqrt instruction patterns): Set athlon_decode to direct.
(movhi_1): Promote for TARGET_PARTIAL_REG_DEPENDENCY and for
PARTIAL_REGISTER_STALL with !TARGET_HIMODE_MATH machines.
(movqi_1): Handle promoting correctly for TARGET_PARTIAL_REG_DEPENDENCY
and TARGET_PARTIAL_REGISTER_STALL machines.
(pushdf_nointeger): New pattern.
(pushdf_integer): Rename from pushdf.
(movdf_nointger): Enable for !TARGET_INTEGER_DFMODE_MOVES machines.
(movdf_intger): Disable for !TARGET_INTEGER_DFMODE_MOVES machines.
From-SVN: r33215
* i370.c (mvs_add_label): Change spacing for coding conventions.
* i370.h (ASM_OUTPUT_CASE_LABEL): Change to the data CSECT for the
outputing case vectors.
(ASM_OUTPUT_CASE_END): New, put assembler back into code CSECT.
(ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT): Remove page check,
since vector in in the data CSECT.
(ASM_OUTPUT_REG_POP, ASM_OUTPUT_REG_PUSH): Restore to correct operation. * i370.md (Many patterns): Put the length in the XL directives.
(movdi): Put back STM and MVC in definition.
(floatsidf2): Correct TARGET_ELF_ABI pattern and add back the LE370
pattern using the TCA.
* oe.h (CPP_SPEC): Added to allow trigraphs.
* xm-oe.h (HOST_BITS_PER_LONGLONG): Change to 32. IBM's compiler does
not support the "long long" type.
From-SVN: r33191
* config/mips/mips-protos.h (mips_legitimate_address_p): New
function.
(mips_reg_mode_ok_for_base_p): Likewise.
* config/mips/mips.h (REG_OK_STRICT_P): Don't define.
(REG_OK_FOR_INDEX_P): Define unconditionally.
(REG_MODE_OK_FOR_BASE_P): Use mips_reg_mode_ok_for_base_p.
(GO_IF_LEGITIMATE_ADDRESS): Use mips_legitimate_address_p.
* config/mips/mips.c (mips16_simple_memory_operand): Adjust now
that GET_MODE_SIZE is unsigned.
(mips_reg_mode_ok_for_base_p): Define.
(mips_legitimate_address_p): Likewise. Adjust now
that GET_MODE_SIZE is unsigned.
(block_move_loop): Make the number of bytes unsigned.
(expand_block_move): Likewise.
(function_arg): Make the loop counter unsigned to match the
boundary condition.
From-SVN: r33188
