(movsi matcher): Add nop for moving special register to itself for !TARGET_POWER.

(movsi matcher): Add nop for moving special register to itself
for !TARGET_POWER.
(movhi and movqi matcher): Likewise and add mtjmpr attribute.
Separate MQ from CTR and LR target registers for TARGET_POWER.

From-SVN: r7736
This commit is contained in:
Richard Kenner 1994-07-11 22:07:46 -04:00
parent a2613d100b
commit fb81d7cec6

View File

@ -3574,8 +3574,8 @@
[(set_attr "type" "*,load,*,*,*,*,*,mtjmpr,*")])
(define_insn ""
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h")
(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r"))]
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m,r,r,r,*h,*h")
(match_operand:SI 1 "input_operand" "r,m,r,I,J,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], SImode)
|| gpc_reg_operand (operands[1], SImode))"
"@
@ -3585,8 +3585,9 @@
li %0,%1
lis %0,%u1
mf%1 %0
mt%0 %1"
[(set_attr "type" "*,load,*,*,*,*,mtjmpr")])
mt%0 %1
cror 0,0,0"
[(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
;; Split a load of a large constant into the appropriate two-insn
;; sequence.
@ -3637,8 +3638,8 @@
}")
(define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,0"))]
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
"TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
|| gpc_reg_operand (operands[1], HImode))"
"@
@ -3648,12 +3649,13 @@
{cal %0,%w1(0)|li %0,%w1}
mf%1 %0
mt%0 %1
mt%0 %1
cror 0,0,0"
[(set_attr "type" "*,load,*,*,*,*,*")])
[(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
(define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h")
(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r"))]
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
(match_operand:HI 1 "input_operand" "r,m,r,i,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], HImode)
|| gpc_reg_operand (operands[1], HImode))"
"@
@ -3662,8 +3664,9 @@
sth%U0%X0 %1,%0
li %0,%w1
mf%1 %0
mt%0 %1"
[(set_attr "type" "*,load,*,*,*,*")])
mt%0 %1
cror 0,0,0"
[(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
(define_expand "movqi"
[(set (match_operand:QI 0 "general_operand" "")
@ -3685,8 +3688,8 @@
}")
(define_insn ""
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,0"))]
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*q,*c*l,*h")
(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,r,0"))]
"TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
|| gpc_reg_operand (operands[1], QImode))"
"@
@ -3696,12 +3699,13 @@
{cal %0,%1(0)|li %0,%1}
mf%1 %0
mt%0 %1
mt%0 %1
cror 0,0,0"
[(set_attr "type" "*,load,*,*,*,*,*")])
[(set_attr "type" "*,load,*,*,*,*,mtjmpr,*")])
(define_insn ""
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h")
(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r"))]
[(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,m,r,r,*h,*h")
(match_operand:QI 1 "input_operand" "r,m,r,i,*h,r,0"))]
"! TARGET_POWER && (gpc_reg_operand (operands[0], QImode)
|| gpc_reg_operand (operands[1], QImode))"
"@
@ -3710,8 +3714,9 @@
stb%U0%X0 %1,%0
li %0,%1
mf%1 %0
mt%0 %1"
[(set_attr "type" "*,load,*,*,*,*")])
mt%0 %1
cror 0,0,0"
[(set_attr "type" "*,load,*,*,*,mtjmpr,*")])
;; Here is how to move condition codes around. When we store CC data in
;; an integer register or memory, we store just the high-order 4 bits.