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mn10200.h (GO_IF_LEGITIMATE_ADDRESS): Do not allow indexed addresses.

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* mn10200.h (GO_IF_LEGITIMATE_ADDRESS): Do not allow indexed
        addresses.
        * mn10200.md (neghi2): Provide an alternative which works if
        the input and output register are the same.

From-SVN: r16136
This commit is contained in:
Jeff Law 1997-10-21 13:52:12 -06:00
parent 576e5accbd
commit e92f9bcf4d
2 changed files with 17 additions and 8 deletions
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11
gcc/config/mn10200/mn10200.h
View File

@ -566,7 +566,7 @@ extern struct rtx_def *function_arg();
#define TRAMPOLINE_TEMPLATE(FILE) \
do { \
fprintf (FILE, "\t.byte 0xfd\n"); \
fprintf (FILE, "\t.byte 0x02\n"); \
fprintf (FILE, "\t.byte 0x00\n"); \
fprintf (FILE, "\t.byte 0x00\n"); \
fprintf (FILE, "\tmov (a3),a0\n"); \
fprintf (FILE, "\tadd -4,a3\n"); \
@ -663,6 +663,11 @@ extern struct rtx_def *function_arg();
The MODE argument is the machine mode for the MEM expression
that wants to use this address.
We used to allow reg+reg addresses for QImode and HImode; however,
they tended to cause the register allocator to run out of registers.
Basically, an indexed load/store always keeps 2 data and one address
register live, which is just too many for this machine. */
The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
except for CONSTANT_ADDRESS_P which is actually machine-independent. */
@ -692,10 +697,6 @@ extern struct rtx_def *function_arg();
{ \
if (GET_CODE (index) == CONST_INT) \
goto ADDR; \
if (GET_CODE (index) == REG \
&& REG_OK_FOR_INDEX_P (index) \
&& GET_MODE_SIZE (MODE) <= word_mode) \
goto ADDR; \
} \
} \
}

14
gcc/config/mn10200/mn10200.md
View File

@ -497,13 +497,21 @@
;;
;; We could do HImode negations with a "not;add" sequence, but
;; generally it's generated slightly worse code.
;;
;; The second alternative is not strictly necesasry, but helps
;; when the register allocators start running short of registers.
(define_insn "neghi2"
[(set (match_operand:HI 0 "general_operand" "=&d")
(neg:HI (match_operand:HI 1 "general_operand" "d")))]
[(set (match_operand:HI 0 "general_operand" "=&d,d")
(neg:HI (match_operand:HI 1 "general_operand" "d,0")))]
""
"sub %0,%0\;sub %1,%0"
"@
sub %0,%0\;sub %1,%0
not %0\;add 1,%0"
[(set_attr "cc" "set_zn")])
;; The not/and sequence won't work here. It's not clear if we'll
;; ever need to provide an alternate sequence since this should
;; be used much less frequently than neghi2.
(define_insn "negpsi2"
[(set (match_operand:PSI 0 "general_operand" "=&d")
(neg:PSI (match_operand:PSI 1 "general_operand" "d")))]