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(floatMN2 recognizers): Don't omit mode on a match_operand that might be reloaded.

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(floatMN2 recognizers): Don't omit mode on a match_operand that might
be reloaded.  Split into separate patterns for each mode.
(zero_extract test): Disable for now.

From-SVN: r2747
This commit is contained in:
James Van Artsdalen 1992-11-12 13:37:42 +00:00
parent 8f24008484
commit e1f998ad66
1 changed files with 42 additions and 13 deletions
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55
gcc/config/i386/i386.md
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@ -1305,11 +1305,9 @@
;; This will convert from SImode or DImode to MODE_FLOAT.
(define_insn ""
[(set (match_operand 0 "register_operand" "=f,f")
(match_operator 2 "float_op"
[(match_operand:DI 1 "general_operand" "m,!*r")]))]
"TARGET_80387 && GET_MODE (operands[0]) == GET_MODE (operands[2])
&& GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_FLOAT"
[(set (match_operand:DF 0 "register_operand" "=f,f")
(float:DF (match_operand:DI 1 "general_operand" "m,!*r")))]
"TARGET_80387"
"*
{
if (NON_STACK_REG_P (operands[1]))
@ -1324,11 +1322,43 @@
}")
(define_insn ""
[(set (match_operand 0 "register_operand" "=f,f")
(match_operator 2 "float_op"
[(match_operand:SI 1 "general_operand" "m,!*r")]))]
"TARGET_80387 && GET_MODE (operands[0]) == GET_MODE (operands[2])
&& GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_FLOAT"
[(set (match_operand:SF 0 "register_operand" "=f,f")
(float:SF (match_operand:DI 1 "general_operand" "m,!*r")))]
"TARGET_80387"
"*
{
if (NON_STACK_REG_P (operands[1]))
{
output_op_from_reg (operands[1], AS1 (fild%z0,%1));
RET;
}
else if (GET_CODE (operands[1]) == MEM)
return AS1 (fild%z1,%1);
else
abort ();
}")
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f,f")
(float:DF (match_operand:SI 1 "general_operand" "m,!*r")))]
"TARGET_80387"
"*
{
if (NON_STACK_REG_P (operands[1]))
{
output_op_from_reg (operands[1], AS1 (fild%z0,%1));
RET;
}
else if (GET_CODE (operands[1]) == MEM)
return AS1 (fild%z1,%1);
else
abort ();
}")
(define_insn ""
[(set (match_operand:SF 0 "register_operand" "=f,f")
(float:SF (match_operand:SI 1 "general_operand" "m,!*r")))]
"TARGET_80387"
"*
{
if (NON_STACK_REG_P (operands[1]))
@ -2939,6 +2969,7 @@
;; ??? All bets are off if operand 0 is a volatile MEM reference.
/*
(define_insn ""
[(set (cc0) (zero_extract (match_operand 0 "general_operand" "rm")
(match_operand:SI 1 "const_int_operand" "n")
@ -2955,8 +2986,6 @@
if (! REG_P (operands[0]) || QI_REG_P (operands[0]))
{
/* We may set the sign bit spuriously. */
if ((mask & ~0xff) == 0)
{
cc_status.flags |= CC_NOT_NEGATIVE;
@ -2999,7 +3028,7 @@
return AS2 (test%L1,%0,%1);
}")
*/
(define_insn ""
[(set (cc0) (zero_extract (match_operand:SI 0 "register_operand" "r")
(const_int 1)