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i386: Require OPTION_MASK_ISA_SSE2 for __builtin_ia32_movq128 [PR94603]

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PR target/94603
	* config/i386/i386-builtin.def (__builtin_ia32_movq128):
	Require OPTION_MASK_ISA_SSE2.

testsuite/ChangeLog:

	PR target/94603
	* gcc.target/i386/pr94603.c: New test.
This commit is contained in:
Uros Bizjak 2020-04-15 17:08:07 +02:00
parent c00568f376
commit d4f655724c
4 changed files with 23 additions and 1 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
PR target/94603
* config/i386/i386-builtin.def (__builtin_ia32_movq128):
Require OPTION_MASK_ISA_SSE2.
2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
PR bootstrap/89494

2
gcc/config/i386/i386-builtin.def
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@ -811,7 +811,7 @@ BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_pshufhw, "__builtin_ia32_pshufhw",
BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_vmsqrtv2df2, "__builtin_ia32_sqrtsd", IX86_BUILTIN_SQRTSD, UNKNOWN, (int) V2DF_FTYPE_V2DF_VEC_MERGE)
BDESC (OPTION_MASK_ISA_SSE, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI)
BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI)
/* SSE2 MMX */
BDESC (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_MMX, 0, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI)

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
PR target/94603
* gcc.target/i386/pr94603.c: New test.
2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
Srinath Parvathaneni <srinath.parvathaneni@arm.com>

11
gcc/testsuite/gcc.target/i386/pr94603.c Normal file
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@ -0,0 +1,11 @@
/* PR target/94603 */
/* { dg-do compile } */
/* { dg-options "-Wno-implicit-function-declaration -msse -mno-sse2" } */
typedef long long __attribute__ ((__vector_size__ (16))) V;
V
foo (V v)
{
return __builtin_ia32_movq128 (v); /* { dg-error "" } */
}