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testsuite: Fix sve/mul_2.c failures

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Some sve/mul_2.c tests were failing because we'd (reasonably)
decided to use shifts and adds instead of MULs for some simple
negative constants.  We'd already needed to avoid that when
picking positive constants, so this patch does the same thing
for the negative ones.

gcc/testsuite/
	* gcc.target/aarch64/sve/mul_2.c: Adjust negative constants to avoid
	conversion to shifts and adds.
This commit is contained in:
Richard Sandiford 2021-04-08 15:00:03 +01:00
parent acbbb82ea3
commit d3f78917e1
1 changed files with 7 additions and 7 deletions
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14
gcc/testsuite/gcc.target/aarch64/sve/mul_2.c
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@ -21,14 +21,14 @@ TEST_TYPE (uint8_t, 32, 2, 250)
TEST_TYPE (int8_t, 64, -110, 110)
TEST_TYPE (uint8_t, 64, 3, 253)
TEST_TYPE (int16_t, 64, -128, 123)
TEST_TYPE (int16_t, 64, -123, 123)
TEST_TYPE (uint16_t, 64, 3, 255)
TEST_TYPE (int8_t, 128, -120, 120)
TEST_TYPE (int8_t, 128, -119, 120)
TEST_TYPE (uint8_t, 128, 4, 251)
TEST_TYPE (int16_t, 128, -128, 123)
TEST_TYPE (int16_t, 128, -123, 123)
TEST_TYPE (uint16_t, 128, 2, 255)
TEST_TYPE (int32_t, 128, -128, 123)
TEST_TYPE (int32_t, 128, -123, 123)
TEST_TYPE (uint32_t, 128, 4, 255)
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, p[0-7]/m, z[0-9]+\.b, z[0-9]+\.b\n} 6 } } */
@ -37,9 +37,9 @@ TEST_TYPE (uint32_t, 128, 4, 255)
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-100\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-110\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-120\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #-128\n} 2 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #-128\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #-119\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #-123\n} 2 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.s, z[0-9]+\.s, #-123\n} 1 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.b, z[0-9]+\.b, #50\n} 6 } } */
/* { dg-final { scan-assembler-times {\tmul\tz[0-9]+\.h, z[0-9]+\.h, #50\n} 4 } } */