diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index b2abb5b5b3c..dd1dc2bd7a8 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5989,7 +5989,8 @@ "@ fcvtz\t%0, %1 fcvtz\t%0, %1" - [(set_attr "type" "neon_fp_to_int_s,f_cvtf2i")] + [(set_attr "type" "neon_fp_to_int_s,f_cvtf2i") + (set_attr "arch" "simd,fp")] ) ;; Convert HF -> SI or DI diff --git a/gcc/testsuite/gcc.target/aarch64/fcvt_nosimd.c b/gcc/testsuite/gcc.target/aarch64/fcvt_nosimd.c new file mode 100644 index 00000000000..7b2ab65e307 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/fcvt_nosimd.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=armv8-a+nosimd" } */ + +#include + +uint64_t test_double_to_uint64(double x) { + return (uint64_t)x; +} + +int64_t test_double_to_int64(double x) { + return (int64_t)x; +} + +uint32_t test_float_to_uint32(float x) { + return (uint32_t)x; +} + +int32_t test_float_to_int32(float x) { + return (int32_t)x; +} + +/* { dg-final { scan-assembler-not {\tfcvtz[su]\td[0-9]*, d[0-9]*} } } */ +/* { dg-final { scan-assembler-not {\tfcvtz[su]\ts[0-9]*, s[0-9]*} } } */