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* doc/invoke.texi: Remove leading `-' from options in index.

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From-SVN: r68343
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Andreas Schwab 2003-06-22 17:26:49 +00:00 committed by Andreas Schwab
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commit c359831bce
2 changed files with 10 additions and 6 deletions
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gcc/ChangeLog
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@ -1,3 +1,7 @@
2003-06-22 Andreas Schwab <schwab@suse.de>
* doc/invoke.texi: Remove leading `-' from options in index.
2003-06-22 Kazu Hirata <kazu@cs.umass.edu>
* bt-load.c: Follow spelling conventions.

12
gcc/doc/invoke.texi
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@ -6451,8 +6451,8 @@ Specify the register to be used for PIC addressing. The default is R10
unless stack-checking is enabled, when R9 is used.
@item -mcirrus-fix-invalid-insns
@opindex -mcirrus-fix-invalid-insns
@opindex -mno-cirrus-fix-invalid-insns
@opindex mcirrus-fix-invalid-insns
@opindex mno-cirrus-fix-invalid-insns
Insert NOPs into the instruction stream to in order to work around
problems with invalid Maverick instruction combinations. This option
is only valid if the @option{-mcpu=ep9312} option has been used to
@ -9550,16 +9550,16 @@ the assembler/linker complain about out of range branches within a switch
table.
@item -mapp-regs
@opindex -mapp-regs
@opindex mapp-regs
This option will cause r2 and r5 to be used in the code generated by
the compiler. This setting is the default.
@item -mno-app-regs
@opindex -mno-app-regs
@opindex mno-app-regs
This option will cause r2 and r5 to be treated as fixed registers.
@item -mv850e
@opindex -mv850e
@opindex mv850e
Specify that the target processor is the V850E. The preprocessor
constant @samp{__v850e__} will be defined if this option is used.
@ -9571,7 +9571,7 @@ The preprocessor constants @samp{__v850} and @samp{__v851__} are always
defined, regardless of which processor variant is the target.
@item -mdisable-callt
@opindex -mdisable-callt
@opindex mdisable-callt
This option will suppress generation of the CALLT instruction for the
v850e flavors of the v850 architecture. The default is
@option{-mno-disable-callt} which allows the CALLT instruction to be used.