(ashlhi3_k, lshrhi3_m): new insn pattern.
(lshrhi3, shl_sext_ext, shl_sext_sub): new insn pattern with matching define_split. (and_shl_scratch): Likewise, but also with unnamed variants. From-SVN: r12725
This commit is contained in:
Jim Wilson
parent
e0040a8ede
commit
98e819b9b7
@ -783,6 +783,15 @@
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add %0,%0
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shll%O2 %0")
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(define_insn "ashlhi3_k"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r,r")
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(ashift:HI (match_operand:HI 1 "arith_reg_operand" "0,0")
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(match_operand:HI 2 "const_int_operand" "M,K")))]
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"CONST_OK_FOR_K (INTVAL (operands[2]))"
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"@
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add %0,%0
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shll%O2 %0")
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(define_insn "ashlsi3_n"
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[(set (match_operand:SI 0 "arith_reg_operand" "=r")
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(ashift:SI (match_operand:SI 1 "arith_reg_operand" "0")
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@ -830,6 +839,34 @@
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FAIL;
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}")
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(define_insn "ashlhi3"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r")
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(ashift:HI (match_operand:HI 1 "arith_reg_operand" "0")
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(match_operand:HI 2 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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""
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shift_insns_rtx (insn)") (const_int 1))
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(const_string "2")
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(eq (symbol_ref "shift_insns_rtx (insn)") (const_int 2))
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(const_string "4")]
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(const_string "6")))
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(set_attr "type" "arith")])
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(define_split
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[(set (match_operand:HI 0 "arith_reg_operand" "")
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(ashift:HI (match_operand:HI 1 "arith_reg_operand" "")
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(match_operand:HI 2 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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""
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[(use (reg:SI 0))]
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"
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{
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gen_shifty_hi_op (ASHIFT, operands);
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DONE;
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}")
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;
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; arithmetic shift right
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;
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@ -843,6 +880,15 @@
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"shar %0"
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[(set_attr "type" "arith")])
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(define_insn "ashrhi3_k"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r")
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(ashiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0")
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(match_operand:HI 2 "const_int_operand" "M")))
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(clobber (reg:SI 18))]
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"INTVAL (operands[2]) == 1"
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"shar %0"
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[(set_attr "type" "arith")])
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;; ??? This should be a define expand.
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(define_insn "ashrsi2_16"
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@ -919,6 +965,22 @@
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&& ! CONST_OK_FOR_M (INTVAL (operands[2]))"
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"shlr%O2 %0")
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(define_insn "lshrhi3_m"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r")
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(lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0")
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(match_operand:HI 2 "const_int_operand" "M")))
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(clobber (reg:SI 18))]
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"CONST_OK_FOR_M (INTVAL (operands[2]))"
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"shlr %0")
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(define_insn "lshrhi3_k"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r")
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(lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0")
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(match_operand:HI 2 "const_int_operand" "K")))]
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"CONST_OK_FOR_K (INTVAL (operands[2]))
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&& ! CONST_OK_FOR_M (INTVAL (operands[2]))"
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"shlr%O2 %0")
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(define_insn "lshrsi3_n"
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[(set (match_operand:SI 0 "arith_reg_operand" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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@ -968,6 +1030,35 @@
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FAIL;
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}")
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(define_insn "lshrhi3"
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[(set (match_operand:HI 0 "arith_reg_operand" "=r")
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(lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "0")
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(match_operand:HI 2 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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""
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"#"
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;; ??? length attribute is sometimes six instead of four.
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[(set (attr "length")
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(cond [(eq (symbol_ref "shift_insns_rtx (insn)") (const_int 1))
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(const_string "2")
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(eq (symbol_ref "shift_insns_rtx (insn)") (const_int 2))
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(const_string "4")]
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(const_string "6")))
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(set_attr "type" "arith")])
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(define_split
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[(set (match_operand:HI 0 "arith_reg_operand" "")
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(lshiftrt:HI (match_operand:HI 1 "arith_reg_operand" "")
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(match_operand:HI 2 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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""
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[(use (reg:SI 0))]
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"
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{
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gen_shifty_hi_op (LSHIFTRT, operands);
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DONE;
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}")
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;; ??? This should be a define expand.
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(define_insn "ashldi3_k"
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@ -1027,6 +1118,193 @@
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""
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"{ if (GET_CODE (operands[2]) != CONST_INT
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|| INTVAL (operands[2]) != 1) FAIL; } ")
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;; combined left/right shift
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")))]
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"(unsigned)INTVAL (operands[2]) < 32"
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[(use (reg:SI 0))]
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"if (gen_shl_and (operands[0], operands[2], operands[3], operands[1])) FAIL;
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DONE;")
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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"(unsigned)INTVAL (operands[2]) < 32"
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[(use (reg:SI 0))]
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"if (gen_shl_and (operands[0], operands[2], operands[3], operands[1])) FAIL;
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DONE;")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=r")
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(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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"shl_and_kind (operands[2], operands[3], 0) == 1"
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shl_and_length (insn)") (const_int 2))
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(const_string "4")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 3))
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(const_string "6")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 4))
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(const_string "8")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 5))
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(const_string "10")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 6))
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(const_string "12")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 7))
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(const_string "14")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 8))
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(const_string "16")]
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(const_string "18")))
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(set_attr "type" "arith")])
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=z")
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(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")))
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(clobber (reg:SI 18))]
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"shl_and_kind (operands[2], operands[3], 0) == 2"
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shl_and_length (insn)") (const_int 2))
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(const_string "4")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 3))
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(const_string "6")
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(eq (symbol_ref "shl_and_length (insn)") (const_int 4))
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(const_string "8")]
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(const_string "10")))
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(set_attr "type" "arith")])
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;; shift left / and combination with a scratch register: The combine pass
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;; does not accept the individual instructions, even though they are
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;; cheap. But it needs a precise description so that it is usable after
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;; reload.
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(define_insn "and_shl_scratch"
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[(set (match_operand:SI 0 "register_operand" "=r,&r")
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(lshiftrt:SI (ashift:SI (and:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r,0")
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(match_operand:SI 2 "const_int_operand" "N,n"))
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(match_operand:SI 3 "" "0,r"))
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(match_operand:SI 4 "const_int_operand" "n,n"))
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(match_operand:SI 5 "const_int_operand" "n,n")))
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(clobber (reg:SI 18))]
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""
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shl_and_scr_length (insn)") (const_int 2))
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(const_string "4")
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(eq (symbol_ref "shl_and_scr_length (insn)") (const_int 3))
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(const_string "6")
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(eq (symbol_ref "shl_and_scr_length (insn)") (const_int 4))
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(const_string "6")
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(eq (symbol_ref "shl_and_scr_length (insn)") (const_int 5))
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(const_string "10")]
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(const_string "12")))
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(set_attr "type" "arith")])
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(define_split
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[(set (match_operand:SI 0 "register_operand" "=r,&r")
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(lshiftrt:SI (ashift:SI (and:SI (lshiftrt:SI (match_operand:SI 1 "register_operand" "r,0")
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(match_operand:SI 2 "const_int_operand" "N,n"))
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(match_operand:SI 3 "register_operand" "0,r"))
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(match_operand:SI 4 "const_int_operand" "n,n"))
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(match_operand:SI 5 "const_int_operand" "n,n")))
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(clobber (reg:SI 18))]
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""
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[(use (reg:SI 0))]
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"
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{
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rtx and_source = operands[1];
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if (INTVAL (operands[2]))
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{
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gen_shifty_op (LSHIFTRT, operands);
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and_source = operands[3];
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}
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emit_insn (gen_andsi3 (operands[0], operands[0], and_source));
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operands[2] = operands[4];
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gen_shifty_op (ASHIFT, operands);
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if (INTVAL (operands[5]))
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{
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operands[2] = operands[5];
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gen_shifty_op (LSHIFTRT, operands);
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}
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DONE;
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}")
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;; signed left/right shift combination.
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(define_split
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[(set (match_operand:SI 0 "register_operand" "=r")
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(sign_extract:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")
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(const_int 0)))
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(clobber (reg:SI 18))]
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""
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[(use (reg:SI 0))]
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"if (gen_shl_sext (operands[0], operands[2], operands[3], operands[1])) FAIL;
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DONE;")
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(define_insn "shl_sext_ext"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(sign_extract:SI (ashift:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")
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(const_int 0)))
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(clobber (reg:SI 18))]
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"shl_sext_kind (operands[2], operands[3], 0) <= 5"
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shl_sext_length (insn)") (const_int 1))
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(const_string "2")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 2))
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(const_string "4")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 3))
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(const_string "6")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 4))
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(const_string "8")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 5))
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(const_string "10")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 6))
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(const_string "12")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 7))
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(const_string "14")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 8))
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(const_string "16")]
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(const_string "18")))
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(set_attr "type" "arith")])
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(define_insn "shl_sext_sub"
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[(set (match_operand:SI 0 "register_operand" "=z")
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(sign_extract:SI (ashift:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:SI 2 "const_int_operand" "n"))
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(match_operand:SI 3 "const_int_operand" "n")
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(const_int 0)))
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(clobber (reg:SI 18))]
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"(shl_sext_kind (operands[2], operands[3], 0) & ~1) == 6"
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"#"
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[(set (attr "length")
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(cond [(eq (symbol_ref "shl_sext_length (insn)") (const_int 3))
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(const_string "6")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 4))
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(const_string "8")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 5))
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(const_string "10")
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(eq (symbol_ref "shl_sext_length (insn)") (const_int 6))
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(const_string "12")]
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(const_string "14")))
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(set_attr "type" "arith")])
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;; -------------------------------------------------------------------------
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;; Unary arithmetic
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