diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c70cb5b94c8..bee90a48db6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-01-04 Kazu Hirata + + * config/h8300/h8300.md (anonymous patterns): Check that + operands are registers before using REGNO on them. + 2002-01-03 Roland McGrath * doc/invoke.texi (RS/6000 and PowerPC Options): Add -mcall-gnu. diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index de911dcda87..56986c7da0e 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -2267,7 +2267,9 @@ (ior:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) (match_operand:HI 2 "register_operand" "0")))] - "REGNO (operands[0]) != REGNO (operands[1])" + "REG_P (operands[0]) + && REG_P (operands[1]) + && REGNO (operands[0]) != REGNO (operands[1])" "or\\t%X1,%s0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2278,7 +2280,9 @@ (zero_extend:SI (match_operand:HI 1 "register_operand" "r")) (match_operand:SI 2 "register_operand" "0")))] "(TARGET_H8300H || TARGET_H8300S) - && (REGNO (operands[0]) != REGNO (operands[1]))" + && REG_P (operands[0]) + && REG_P (operands[1]) + && (REGNO (operands[0]) != REGNO (operands[1]))" "or.w\\t%T1,%f0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2288,7 +2292,9 @@ (ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r")) (match_operand:SI 2 "register_operand" "0")))] - "REGNO (operands[0]) != REGNO (operands[1])" + "REG_P (operands[0]) + && REG_P (operands[1]) + && REGNO (operands[0]) != REGNO (operands[1])" "or\\t%X1,%s0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2298,7 +2304,9 @@ (xor:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r")) (match_operand:HI 2 "register_operand" "0")))] - "REGNO (operands[0]) != REGNO (operands[1])" + "REG_P (operands[0]) + && REG_P (operands[1]) + && REGNO (operands[0]) != REGNO (operands[1])" "xor\\t%X1,%s0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2309,7 +2317,9 @@ (zero_extend:SI (match_operand:HI 1 "register_operand" "r")) (match_operand:SI 2 "register_operand" "0")))] "(TARGET_H8300H || TARGET_H8300S) - && (REGNO (operands[0]) != REGNO (operands[1]))" + && REG_P (operands[0]) + && REG_P (operands[1]) + && (REGNO (operands[0]) != REGNO (operands[1]))" "xor.w\\t%T1,%f0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2319,7 +2329,9 @@ (xor:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "r")) (match_operand:SI 2 "register_operand" "0")))] - "REGNO (operands[0]) != REGNO (operands[1])" + "REG_P (operands[0]) + && REG_P (operands[1]) + && REGNO (operands[0]) != REGNO (operands[1])" "xor\\t%X1,%s0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2330,7 +2342,9 @@ (zero_extend:HI (match_operand:QI 1 "register_operand" "0")) (ashift:HI (match_operand:HI 2 "register_operand" "r") (const_int 8))))] - "REGNO (operands[0]) != REGNO (operands[2])" + "REG_P (operands[0]) + && REG_P (operands[2]) + && REGNO (operands[0]) != REGNO (operands[2])" "mov.b\\t%s2,%t0" [(set_attr "cc" "clobber") (set_attr "length" "2")]) @@ -2342,7 +2356,9 @@ (ashift:SI (match_operand:SI 2 "register_operand" "r") (const_int 16))))] "(TARGET_H8300H || TARGET_H8300S) - && (REGNO (operands[0]) != REGNO (operands[2]))" + && REG_P (operands[0]) + && REG_P (operands[2]) + && (REGNO (operands[0]) != REGNO (operands[2]))" "mov.w\\t%f2,%e0" [(set_attr "cc" "clobber") (set_attr "length" "2")])