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cse.c (fold_rtx): Make autoincrement addressing mode tests be runtime selectable.

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* cse.c (fold_rtx): Make autoincrement addressing mode tests be
        runtime selectable.
        * expr.c (move_by_pieces): Similarly.
        (move_by_pieces_1, clear_by_pieces, clear_by_pieces_1): Similarly.
        * flow.c (find_auto_inc): Similarly.
        (try_pre_increment): Similarly.
        * loop.c (strength_reduce): Similarly.
        * regclass.c (auto_inc_dec_reg_p): Similarly.
        * regmove.c (try_auto_increment): Similarly.
        (fixup_match_1): Similarly.
        * rtl.h (HAVE_PRE_INCREMENT): Define if not already defined.
        (HAVE_PRE_DECREMENT): Similarly.
        (HAVE_POST_INCREMENT, HAVE_POST_DECREMENT): Similarly.
        sponding changes to all target header files.

From-SVN: r23837
This commit is contained in:
Jeffrey A Law 1998-11-24 23:15:19 +00:00 committed by Jeff Law
parent 83f660b758
commit 940da3246d
39 changed files with 220 additions and 239 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
gcc/ChangeLog
View File

@ -1,3 +1,20 @@
Wed Nov 25 00:07:11 1998 Jeffrey A Law (law@cygnus.com)
* cse.c (fold_rtx): Make autoincrement addressing mode tests be
runtime selectable.
* expr.c (move_by_pieces): Similarly.
(move_by_pieces_1, clear_by_pieces, clear_by_pieces_1): Similarly.
* flow.c (find_auto_inc): Similarly.
(try_pre_increment): Similarly.
* loop.c (strength_reduce): Similarly.
* regclass.c (auto_inc_dec_reg_p): Similarly.
* regmove.c (try_auto_increment): Similarly.
(fixup_match_1): Similarly.
* rtl.h (HAVE_PRE_INCREMENT): Define if not already defined.
(HAVE_PRE_DECREMENT): Similarly.
(HAVE_POST_INCREMENT, HAVE_POST_DECREMENT): Similarly.
sponding changes to all target header files.
Tue Nov 24 20:24:59 1998 Jim Wilson <wilson@cygnus.com>
* configure.in (m68020-*-elf*, m68k-*-elf*): New targets.

8
gcc/config/1750a/1750a.h
View File

@ -707,10 +707,10 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA
/* 1750 doesn't have a lot of auto-incr./decr. - just for the stack ptr. */
/* #define HAVE_POST_INCREMENT just for R15 (stack pointer) */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_PRE_DECREMENT just for R15 (stack pointer) */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_POST_INCREMENT 0 just for R15 (stack pointer) */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT 0 just for R15 (stack pointer) */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/a29k/a29k.h
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@ -1067,11 +1067,11 @@ extern char *a29k_function_name;
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/alpha/alpha.h
View File

@ -1316,11 +1316,11 @@ extern void alpha_init_expanders ();
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

4
gcc/config/arc/arc.h
View File

@ -927,8 +927,8 @@ do { \
#define MAX_REGS_PER_ADDRESS 1
/* We have pre inc/dec (load/store with update). */
#define HAVE_PRE_INCREMENT
#define HAVE_PRE_DECREMENT
#define HAVE_PRE_INCREMENT 1
#define HAVE_PRE_DECREMENT 1
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) \

16
gcc/config/c4x/c4x.h
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@ -1519,14 +1519,14 @@ extern struct rtx_def *c4x_gen_compare_reg ();
/* Addressing Modes */
#define HAVE_POST_INCREMENT
#define HAVE_PRE_INCREMENT
#define HAVE_POST_DECREMENT
#define HAVE_PRE_DECREMENT
#define HAVE_PRE_MODIFY_REG
#define HAVE_POST_MODIFY_REG
#define HAVE_PRE_MODIFY_DISP
#define HAVE_POST_MODIFY_DISP
#define HAVE_POST_INCREMENT 1
#define HAVE_PRE_INCREMENT 1
#define HAVE_POST_DECREMENT 1
#define HAVE_PRE_DECREMENT 1
#define HAVE_PRE_MODIFY_REG 1
#define HAVE_POST_MODIFY_REG 1
#define HAVE_PRE_MODIFY_DISP 1
#define HAVE_POST_MODIFY_DISP 1
/* What about LABEL_REF? */
#define CONSTANT_ADDRESS_P(X) (GET_CODE (X) == SYMBOL_REF)

4
gcc/config/clipper/clipper.h
View File

@ -639,9 +639,9 @@ do \
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/convex/convex.h
View File

@ -892,11 +892,11 @@ enum reg_class {
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/dsp16xx/dsp16xx.h
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@ -1299,11 +1299,11 @@ extern struct dsp16xx_frame_info current_frame_info;
/* ADDRESSING MODES */
/* The 1610 has post-increment and decrement, but no pre-modify */
#define HAVE_POST_INCREMENT
#define HAVE_POST_DECREMENT
#define HAVE_POST_INCREMENT 1
#define HAVE_POST_DECREMENT 1
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Recognize any constant value that is a valid address. */
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)

8
gcc/config/elxsi/elxsi.h
View File

@ -499,11 +499,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES };
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/fx80/fx80.h
View File

@ -607,11 +607,11 @@ extern enum reg_class regno_reg_class[];
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
/* #define HAVE_POST_DECREMENT */
#define HAVE_POST_INCREMENT 1
/* #define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
/* #define HAVE_PRE_INCREMENT */
#define HAVE_PRE_DECREMENT 1
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/gmicro/gmicro.h
View File

@ -863,11 +863,11 @@ extern enum reg_class regno_reg_class[];
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/h8300/h8300.h
View File

@ -721,11 +721,11 @@ struct rtx_def *function_arg();
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
/*#define HAVE_POST_DECREMENT */
#define HAVE_POST_INCREMENT 1
/*#define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
/*#define HAVE_PRE_INCREMENT */
#define HAVE_PRE_DECREMENT 1
/*#define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/i370/i370.h
View File

@ -612,11 +612,11 @@ enum reg_class
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* These assume that REGNO is a hard or pseudo reg number. They give
nonzero only if REGNO is a hard reg of the suitable class or a pseudo

8
gcc/config/i386/i386.h
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@ -1606,11 +1606,11 @@ do { \
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/i860/i860.h
View File

@ -656,11 +656,11 @@ struct cumulative_args { int ints, floats; };
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/i960/i960.h
View File

@ -924,11 +924,11 @@ extern struct rtx_def *i960_function_arg ();
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

6
gcc/config/m32r/m32r.h
View File

@ -1126,9 +1126,9 @@ do { \
/* We have post-inc load and pre-dec,pre-inc store,
but only for 4 byte vals. */
#if 0
#define HAVE_PRE_DECREMENT
#define HAVE_PRE_INCREMENT
#define HAVE_POST_INCREMENT
#define HAVE_PRE_DECREMENT 1
#define HAVE_PRE_INCREMENT 1
#define HAVE_POST_INCREMENT 1
#endif
/* Recognize any constant value that is a valid address. */

8
gcc/config/m68k/m68k.h
View File

@ -1281,11 +1281,11 @@ __transfer_from_trampoline () \
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
/* #define HAVE_POST_DECREMENT */
#define HAVE_POST_INCREMENT 1
/* #define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
/* #define HAVE_PRE_INCREMENT */
#define HAVE_PRE_DECREMENT 1
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/m88k/m88k.h
View File

@ -1259,11 +1259,11 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
#define SELECT_CC_MODE(OP,X,Y) CCmode
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Recognize any constant value that is a valid address.
When PIC, we do not accept an address that would require a scratch reg

8
gcc/config/mips/mips.h
View File

@ -2634,11 +2634,11 @@ typedef struct mips_args {
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* These assume that REGNO is a hard or pseudo reg number.
They give nonzero only if REGNO is a hard reg of the suitable class

8
gcc/config/ns32k/ns32k.h
View File

@ -808,11 +808,11 @@ __transfer_from_trampoline () \
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/pa/pa.h
View File

@ -1368,11 +1368,11 @@ extern struct rtx_def *hppa_builtin_saveregs ();
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
#define HAVE_POST_DECREMENT
#define HAVE_POST_INCREMENT 1
#define HAVE_POST_DECREMENT 1
#define HAVE_PRE_DECREMENT
#define HAVE_PRE_INCREMENT
#define HAVE_PRE_DECREMENT 1
#define HAVE_PRE_INCREMENT 1
/* Macros to check register numbers against specific register classes. */

8
gcc/config/pdp11/pdp11.h
View File

@ -687,11 +687,11 @@ extern int current_function_pretend_args_size;
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
/* #define HAVE_POST_DECREMENT */
#define HAVE_POST_INCREMENT 1
/* #define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
/* #define HAVE_PRE_INCREMENT */
#define HAVE_PRE_DECREMENT 1
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/pyr/pyr.h
View File

@ -803,11 +803,11 @@ extern int current_function_calls_alloca;
/*** Addressing modes, and classification of registers for them. ***/
/* #define HAVE_POST_INCREMENT */ /* pyramid has none of these */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */ /* pyramid has none of these */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/romp/romp.h
View File

@ -905,11 +905,11 @@ struct rt_cargs {int gregs, fregs; };
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/rs6000/rs6000.h
View File

@ -1755,11 +1755,11 @@ typedef struct rs6000_args
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
#define HAVE_PRE_INCREMENT
#define HAVE_PRE_DECREMENT 1
#define HAVE_PRE_INCREMENT 1
/* Macros to check register numbers against specific register classes. */

8
gcc/config/sparc/sparc.h
View File

@ -2271,11 +2271,11 @@ extern struct rtx_def *sparc_builtin_saveregs ();
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/spur/spur.h
View File

@ -586,11 +586,11 @@ extern int current_function_pretend_args_size;
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/vax/vax.h
View File

@ -579,11 +579,11 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12))
/* Addressing modes, and classification of registers for them. */
#define HAVE_POST_INCREMENT
/* #define HAVE_POST_DECREMENT */
#define HAVE_POST_INCREMENT 1
/* #define HAVE_POST_DECREMENT 0 */
#define HAVE_PRE_DECREMENT
/* #define HAVE_PRE_INCREMENT */
#define HAVE_PRE_DECREMENT 1
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

8
gcc/config/we32k/we32k.h
View File

@ -509,11 +509,11 @@ enum reg_class { NO_REGS, GENERAL_REGS,
/* Addressing modes, and classification of registers for them. */
/* #define HAVE_POST_INCREMENT */
/* #define HAVE_POST_DECREMENT */
/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */
/* #define HAVE_PRE_DECREMENT */
/* #define HAVE_PRE_INCREMENT */
/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */
/* Macros to check register numbers against specific register classes. */

16
gcc/cse.c
View File

@ -5760,14 +5760,14 @@ fold_rtx (x, insn)
identical powers of two with post decrement. */
if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
&& (0
#if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
|| exact_log2 (INTVAL (const_arg1)) >= 0
#endif
#if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
|| exact_log2 (- INTVAL (const_arg1)) >= 0
#endif
))
&& ((HAVE_PRE_INCREMENT
&& exact_log2 (INTVAL (const_arg1)) >= 0)
|| (HAVE_POST_INCREMENT
&& exact_log2 (INTVAL (const_arg1)) >= 0)
|| (HAVE_PRE_DECREMENT
&& exact_log2 (- INTVAL (const_arg1)) >= 0)
|| (HAVE_POST_DECREMENT
&& exact_log2 (- INTVAL (const_arg1)) >= 0)))
break;
/* Compute the code used to compose the constants. For example,

44
gcc/expr.c
View File

@ -1442,40 +1442,32 @@ move_by_pieces (to, from, len, align)
if (!(data.autinc_from && data.autinc_to)
&& move_by_pieces_ninsns (len, align) > 2)
{
#ifdef HAVE_PRE_DECREMENT
if (data.reverse && ! data.autinc_from)
if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
data.autinc_from = 1;
data.explicit_inc_from = -1;
}
#endif
#ifdef HAVE_POST_INCREMENT
if (! data.autinc_from)
if (HAVE_POST_INCREMENT && ! data.autinc_from)
{
data.from_addr = copy_addr_to_reg (from_addr);
data.autinc_from = 1;
data.explicit_inc_from = 1;
}
#endif
if (!data.autinc_from && CONSTANT_P (from_addr))
data.from_addr = copy_addr_to_reg (from_addr);
#ifdef HAVE_PRE_DECREMENT
if (data.reverse && ! data.autinc_to)
if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
#endif
#ifdef HAVE_POST_INCREMENT
if (! data.reverse && ! data.autinc_to)
if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
#endif
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
@ -1586,20 +1578,16 @@ move_by_pieces_1 (genfun, mode, data)
data->offset))));
MEM_IN_STRUCT_P (from1) = data->from_struct;
#ifdef HAVE_PRE_DECREMENT
if (data->explicit_inc_to < 0)
if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
if (data->explicit_inc_from < 0)
if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (-size)));
#endif
emit_insn ((*genfun) (to1, from1));
#ifdef HAVE_POST_INCREMENT
if (data->explicit_inc_to > 0)
if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
if (data->explicit_inc_from > 0)
if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
#endif
if (! data->reverse) data->offset += size;
@ -2267,22 +2255,18 @@ clear_by_pieces (to, len, align)
if (!data.autinc_to
&& move_by_pieces_ninsns (len, align) > 2)
{
#ifdef HAVE_PRE_DECREMENT
if (data.reverse && ! data.autinc_to)
if (HAVE_PRE_DECREMENT && data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
data.autinc_to = 1;
data.explicit_inc_to = -1;
}
#endif
#ifdef HAVE_POST_INCREMENT
if (! data.reverse && ! data.autinc_to)
if (HAVE_POST_INCREMENT && ! data.reverse && ! data.autinc_to)
{
data.to_addr = copy_addr_to_reg (to_addr);
data.autinc_to = 1;
data.explicit_inc_to = 1;
}
#endif
if (!data.autinc_to && CONSTANT_P (to_addr))
data.to_addr = copy_addr_to_reg (to_addr);
}
@ -2345,16 +2329,12 @@ clear_by_pieces_1 (genfun, mode, data)
data->offset))));
MEM_IN_STRUCT_P (to1) = data->to_struct;
#ifdef HAVE_PRE_DECREMENT
if (data->explicit_inc_to < 0)
if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (-size)));
#endif
emit_insn ((*genfun) (to1, const0_rtx));
#ifdef HAVE_POST_INCREMENT
if (data->explicit_inc_to > 0)
if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
#endif
if (! data->reverse) data->offset += size;

38
gcc/flow.c
View File

@ -2444,20 +2444,14 @@ find_auto_inc (needed, x, insn)
&& (y = SET_SRC (set), GET_CODE (y) == PLUS)
&& XEXP (y, 0) == addr
&& GET_CODE (XEXP (y, 1)) == CONST_INT
&& (0
#ifdef HAVE_POST_INCREMENT
|| (INTVAL (XEXP (y, 1)) == size && offset == 0)
#endif
#ifdef HAVE_POST_DECREMENT
|| (INTVAL (XEXP (y, 1)) == - size && offset == 0)
#endif
#ifdef HAVE_PRE_INCREMENT
|| (INTVAL (XEXP (y, 1)) == size && offset == size)
#endif
#ifdef HAVE_PRE_DECREMENT
|| (INTVAL (XEXP (y, 1)) == - size && offset == - size)
#endif
)
&& ((HAVE_POST_INCREMENT
&& (INTVAL (XEXP (y, 1)) == size && offset == 0))
|| (HAVE_POST_DECREMENT
&& (INTVAL (XEXP (y, 1)) == - size && offset == 0))
|| (HAVE_PRE_INCREMENT
&& (INTVAL (XEXP (y, 1)) == size && offset == size))
|| (HAVE_PRE_DECREMENT
&& (INTVAL (XEXP (y, 1)) == - size && offset == - size)))
/* Make sure this reg appears only once in this insn. */
&& (use = find_use_as_address (PATTERN (insn), addr, offset),
use != 0 && use != (rtx) 1))
@ -3021,23 +3015,15 @@ try_pre_increment (insn, reg, amount)
/* From the sign of increment, see which possibilities are conceivable
on this target machine. */
#ifdef HAVE_PRE_INCREMENT
if (amount > 0)
if (HAVE_PRE_INCREMENT && amount > 0)
pre_ok = 1;
#endif
#ifdef HAVE_POST_INCREMENT
if (amount > 0)
if (HAVE_POST_INCREMENT && amount > 0)
post_ok = 1;
#endif
#ifdef HAVE_PRE_DECREMENT
if (amount < 0)
if (HAVE_PRE_DECREMENT && amount < 0)
pre_ok = 1;
#endif
#ifdef HAVE_POST_DECREMENT
if (amount < 0)
if (HAVE_POST_DECREMENT && amount < 0)
post_ok = 1;
#endif
if (! (pre_ok || post_ok))
return 0;

16
gcc/loop.c
View File

@ -4168,14 +4168,18 @@ strength_reduce (scan_start, end, loop_top, insn_count,
if (v->giv_type == DEST_ADDR
&& GET_CODE (v->mult_val) == CONST_INT)
{
#if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
if (INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
if (HAVE_POST_INCREMENT
&& INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
#endif
#if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
if (-INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
else if (HAVE_PRE_INCREMENT
&& INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
else if (HAVE_POST_DECREMENT
&& -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
else if (HAVE_PRE_DECREMENT
&& -INTVAL (v->mult_val) == GET_MODE_SIZE (v->mem_mode))
benefit += add_cost * bl->biv_count;
#endif
}
#endif

20
gcc/regclass.c
View File

@ -1770,25 +1770,21 @@ auto_inc_dec_reg_p (reg, mode)
rtx reg;
enum machine_mode mode;
{
#ifdef HAVE_POST_INCREMENT
if (memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
if (HAVE_POST_INCREMENT
&& memory_address_p (mode, gen_rtx_POST_INC (Pmode, reg)))
return 1;
#endif
#ifdef HAVE_POST_DECREMENT
if (memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
if (HAVE_POST_DECREMENT
&& memory_address_p (mode, gen_rtx_POST_DEC (Pmode, reg)))
return 1;
#endif
#ifdef HAVE_PRE_INCREMENT
if (memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
if (HAVE_PRE_INCREMENT
&& memory_address_p (mode, gen_rtx_PRE_INC (Pmode, reg)))
return 1;
#endif
#ifdef HAVE_PRE_DECREMENT
if (memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
if (HAVE_PRE_DECREMENT
&& memory_address_p (mode, gen_rtx_PRE_DEC (Pmode, reg)))
return 1;
#endif
return 0;
}

52
gcc/regmove.c
View File

@ -52,9 +52,7 @@ struct match {
int early_clobber[MAX_RECOG_OPERANDS];
};
#ifdef AUTO_INC_DEC
static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
#endif
static int find_matches PROTO((rtx, struct match *));
static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
;
@ -93,7 +91,6 @@ gen_add3_insn (r0, r1, c)
return (GEN_FCN (icode) (r0, r1, c));
}
#ifdef AUTO_INC_DEC
/* INC_INSN is an instruction that adds INCREMENT to REG.
Try to fold INC_INSN as a post/pre in/decrement into INSN.
@ -117,18 +114,14 @@ try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
{
int size = GET_MODE_SIZE (GET_MODE (use));
if (0
#ifdef HAVE_POST_INCREMENT
|| (pre == 0 && (inc_code = POST_INC, increment == size))
#endif
#ifdef HAVE_PRE_INCREMENT
|| (pre == 1 && (inc_code = PRE_INC, increment == size))
#endif
#ifdef HAVE_POST_DECREMENT
|| (pre == 0 && (inc_code = POST_DEC, increment == -size))
#endif
#ifdef HAVE_PRE_DECREMENT
|| (pre == 1 && (inc_code = PRE_DEC, increment == -size))
#endif
|| (HAVE_POST_INCREMENT
&& pre == 0 && (inc_code = POST_INC, increment == size))
|| (HAVE_PRE_INCREMENT
&& pre == 1 && (inc_code = PRE_INC, increment == size))
|| (HAVE_POST_DECREMENT
&& pre == 0 && (inc_code = POST_DEC, increment == -size))
|| (HAVE_PRE_DECREMENT
&& pre == 1 && (inc_code = PRE_DEC, increment == -size))
)
{
if (inc_insn_set)
@ -156,7 +149,6 @@ try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
}
return 0;
}
#endif /* AUTO_INC_DEC */
static int *regno_src_regno;
@ -1725,11 +1717,10 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
if (code == MINUS)
{
post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
if (search_end
if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
&& search_end
&& try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
post_inc = 0;
#endif
validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
REG_N_SETS (REGNO (src))++;
REG_N_REFS (REGNO (src)) += true_loop_depth;
@ -1834,31 +1825,23 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
else in the next two conditionally included code blocks. */
if (0)
{;}
#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
else if ((code == PLUS || code == MINUS) && insn_const
else if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
&& (code == PLUS || code == MINUS) && insn_const
&& try_auto_increment (p, insn, 0, src, insn_const, 1))
insn = p;
#endif
#if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
else if (post_inc
else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
&& post_inc
&& try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
post_inc = 0;
#endif
#if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
/* If post_inc still prevails, try to find an
insn where it can be used as a pre-in/decrement.
If code is MINUS, this was already tried. */
if (post_inc && code == PLUS
/* Check that newconst is likely to be usable
in a pre-in/decrement before starting the search. */
&& (0
#if defined (HAVE_PRE_INCREMENT)
|| (newconst > 0 && newconst <= MOVE_MAX)
#endif
#if defined (HAVE_PRE_DECREMENT)
|| (newconst < 0 && newconst >= -MOVE_MAX)
#endif
) && exact_log2 (newconst))
&& ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
|| (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
&& exact_log2 (newconst))
{
rtx q, inc_dest;
@ -1895,7 +1878,6 @@ fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
}
}
}
#endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
/* Move the death note for DST to INSN if it is used
there. */
if (reg_overlap_mentioned_p (dst, PATTERN (insn)))

16
gcc/rtl.h
View File

@ -699,6 +699,22 @@ extern char *note_insn_name[];
#define AUTO_INC_DEC
#endif
#ifndef HAVE_PRE_INCREMENT
#define HAVE_PRE_INCREMENT 0
#endif
#ifndef HAVE_PRE_DECREMENT
#define HAVE_PRE_DECREMENT 0
#endif
#ifndef HAVE_POST_INCREMENT
#define HAVE_POST_INCREMENT 0
#endif
#ifndef HAVE_POST_DECREMENT
#define HAVE_POST_DECREMENT 0
#endif
/* Accessors for RANGE_INFO. */
/* For RANGE_{START,END} notes return the RANGE_START note. */
#define RANGE_INFO_NOTE_START(INSN) (XEXP (INSN, 0))

2
gcc/tm.texi
View File

@ -4156,7 +4156,7 @@ This is about addressing modes.
@table @code
@findex HAVE_POST_INCREMENT
@item HAVE_POST_INCREMENT
Define this macro if the machine supports post-increment addressing.
A C expression that is nonzero the machine supports post-increment addressing.
@findex HAVE_PRE_INCREMENT
@findex HAVE_POST_DECREMENT