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(movesicc, movehicc) Pentium Pro conditional move insns

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From-SVN: r11917
This commit is contained in:
Stan Cox 1996-05-03 17:18:07 +00:00
parent 3a0433fd4d
commit 926b3fae1f
1 changed files with 121 additions and 4 deletions
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125
gcc/config/i386/i386.md
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@ -103,9 +103,9 @@
;; after the tstM or cmp) will actually emit the tstM or cmpM.
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
;; enumeration in i386.h.
(define_attr "cpu" "i386,i486,pentium"
(define_attr "cpu" "i386,i486,pentium,pentiumpro"
(const (symbol_ref "ix86_cpu")))
(define_insn "tstsi_1"
@ -418,6 +418,16 @@
"TARGET_80387"
"* return output_float_compare (insn, operands);")
(define_insn ""
[(set (cc0)
(match_operator 2 "VOIDmode_compare_op"
[(float_extend:XF
(match_operand:DF 1 "nonimmediate_operand" "fm"))
(match_operand:XF 0 "register_operand" "f")]))
(clobber (match_scratch:HI 3 "=a"))]
"TARGET_80387"
"* return output_float_compare (insn, operands);")
(define_insn ""
[(set (cc0)
(match_operator 2 "VOIDmode_compare_op"
@ -4299,7 +4309,7 @@
[(set (match_operand:DI 0 "register_operand" "=&r")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:QI 2 "const_int_operand" "J")))]
""
"CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')"
"*
{
rtx xops[4], low[1], high[1];
@ -4460,7 +4470,7 @@
[(set (match_operand:DI 0 "register_operand" "=&r")
(lshiftrt:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:QI 2 "const_int_operand" "J")))]
""
"CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')"
"*
{
rtx xops[4], low[1], high[1];
@ -6630,6 +6640,113 @@
return \"repnz\;scas%B2\";
}")
/* Conditional move define_insns. */
(define_expand "movsicc"
[(match_dup 4)
(set (match_operand 0 "register_operand" "")
(if_then_else:SI (match_operand 1 "comparison_operator" "")
(match_operand:SI 2 "nonimmediate_operand" "")
(match_operand:SI 3 "nonimmediate_operand" "")))]
"TARGET_CMOVE"
"
{
operands[4] = i386_compare_gen (i386_compare_op0, i386_compare_op1);
}")
(define_expand "movhicc"
[(match_dup 4)
(set (match_operand 0 "register_operand" "")
(if_then_else:HI (match_operand 1 "comparison_operator" "")
(match_operand:HI 2 "nonimmediate_operand" "")
(match_operand:HI 3 "nonimmediate_operand" "")))]
"TARGET_CMOVE"
"
{
operands[4] = i386_compare_gen (i386_compare_op0, i386_compare_op1);
}")
(define_insn "movsicc_1"
[(set (match_operand:SI 0 "register_operand" "=r,r,&r,&r")
(if_then_else:SI (match_operator 1 "comparison_operator"
[(cc0) (const_int 0)])
(match_operand:SI 2 "nonimmediate_operand" "rm,0,rm,g")
(match_operand:SI 3 "nonimmediate_operand" "0,rm,rm,g")))]
"TARGET_CMOVE"
"*
{
if (cc_prev_status.flags & CC_IN_80387)
abort ();
if (which_alternative == 0)
{
/* r <- cond ? arg : r */
output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
}
else if (which_alternative == 1)
{
/* r <- cond ? r : arg */
output_asm_insn (AS2 (cmov%N1,%3,%0), operands);
}
else if (which_alternative == 2)
{
/* r <- cond ? arg1 : arg2 */
output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
output_asm_insn (AS2 (cmov%N1,%3,%0), operands);
}
else
{
/* r <- cond ? arg1 : arg2 */
operands[4] = gen_label_rtx ();
output_asm_insn (AS2 (mov%L0,%2,%0), operands);
output_asm_insn (\"j%C1 %l4\", operands);
output_asm_insn (AS2 (mov%L0,%3,%0), operands);
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
}
RET;
}")
(define_insn "movhicc_1"
[(set (match_operand:HI 0 "register_operand" "=r,r,&r,&r")
(if_then_else:HI (match_operator 1 "comparison_operator"
[(cc0) (const_int 0)])
(match_operand:HI 2 "nonimmediate_operand" "rm,0,rm,g")
(match_operand:HI 3 "nonimmediate_operand" "0,rm,rm,g")))]
"TARGET_CMOVE"
"*
{
if (cc_prev_status.flags & CC_IN_80387)
abort ();
if (which_alternative == 0)
{
/* r <- cond ? arg : r */
output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
}
else if (which_alternative == 1)
{
/* r <- cond ? r : arg */
output_asm_insn (AS2 (cmov%N1,%3,%0), operands);
}
else if (which_alternative == 2)
{
/* r <- cond ? arg1 : arg2 */
output_asm_insn (AS2 (cmov%C1,%2,%0), operands);
output_asm_insn (AS2 (cmov%N1,%3,%0), operands);
}
else
{
/* r <- cond ? arg1 : arg2 */
operands[4] = gen_label_rtx ();
output_asm_insn (AS2 (mov%L0,%2,%0), operands);
output_asm_insn (\"j%C1 %l4\", operands);
output_asm_insn (AS2 (mov%L0,%3,%0), operands);
ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4]));
}
RET;
}")
(define_insn "strlensi_unroll"
[(set (match_operand:SI 0 "register_operand" "=&r,&r")
(unspec:SI [(mem:BLK (match_operand:SI 1 "address_operand" "r,r"))