(all patterns explicitly mentioning regs): Output the target dependent prefix before the register name.
(all patterns explicitly mentioning regs): Output the target dependent prefix before the register name. (all patterns with asm comments): Output the target dependent comment character. From-SVN: r7443
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@ -1894,7 +1894,7 @@
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{
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/* ... so modify the operands here. */
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operands[1] = XEXP (operands[1], 0);
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output_asm_insn (\"sub%?\\t%0, pc, #(8 + . - %a1) & ~4095\",
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output_asm_insn (\"sub%?\\t%0, %|pc, #(8 + . - %a1) & ~4095\",
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operands);
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output_asm_insn (\"ldr%?\\t%0, [%0, #- ((4 + . - %a1) & 4095)]\",
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operands);
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@ -1903,7 +1903,7 @@
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{
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/* ... and here. */
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operands[1] = XEXP (operands[1], 0);
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output_asm_insn (\"ldr%?\\t%0, [pc, %1 - . - 8]\", operands);
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output_asm_insn (\"ldr%?\\t%0, [%|pc, %1 - . - 8]\", operands);
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}
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return \"\";
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@ -2139,8 +2139,8 @@
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mnf%?s\\t%0, #%N1
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ldf%?s\\t%0, %1
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stf%?s\\t%1, %0
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str%?\\t%1, [sp, #-4]!\;ldf%?s\\t%0, [sp], #4
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stf%?s\\t%1, [sp, #-4]!\;ldr%?\\t%0, [sp], #4
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str%?\\t%1, [%|sp, #-4]!\;ldf%?s\\t%0, [%|sp], #4
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stf%?s\\t%1, [%|sp, #-4]!\;ldr%?\\t%0, [%|sp], #4
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mov%?\\t%0, %1
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ldr%?\\t%0, %1\\t%@ float
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str%?\\t%1, %0\\t%@ float"
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@ -3252,27 +3252,27 @@
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(match_operand:SI 0 "s_register_operand" "r"))
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(use (label_ref (match_operand 1 "" "")))]
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""
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"mov%?\\tpc, %0\\t%@ table jump, label %l1")
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"mov%?\\t%|pc, %0\\t%@ table jump, label %l1")
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(define_insn ""
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[(set (pc)
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(match_operand:SI 0 "memory_operand" "m"))
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(use (label_ref (match_operand 1 "" "")))]
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""
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"ldr%?\\tpc, %0\\t%@ table jump, label %l1"
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"ldr%?\\t%|pc, %0\\t%@ table jump, label %l1"
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[(set_attr "type" "load")])
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(define_insn "indirect_jump"
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[(set (pc)
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(match_operand:SI 0 "s_register_operand" "r"))]
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""
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"mov%?\\tpc, %0\\t%@ indirect jump")
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"mov%?\\t%|pc, %0\\t%@ indirect jump")
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(define_insn ""
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[(set (pc)
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(match_operand:SI 0 "memory_operand" "m"))]
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""
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"ldr%?\\tpc, %0\\t%@ indirect jump"
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"ldr%?\\t%|pc, %0\\t%@ indirect jump"
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[(set_attr "type" "load")])
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;; Misc insns
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@ -3500,8 +3500,8 @@
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(match_operand:SI 1 "s_register_operand" "0,?r")))]
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""
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"@
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orr%d2\\t%0, %1, #1
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mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
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orr%d2\\t%0, %1, #1
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mov%D2\\t%0, %1\;orr%d2\\t%0, %1, #1"
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[(set_attr "conds" "use")
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(set_attr "length" "4,8")])
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@ -4284,8 +4284,8 @@
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(clobber (reg 24))]
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""
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"@
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cmp\\t%4, %5\;mvn%D6\\t%0, %1\;%I7%d6\\t%0, %2, %3
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cmn\\t%4, #%n5\;mvn%D6\\t%0, %1\;%I7%d6\\t%0, %2, %3"
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cmp\\t%4, %5\;mvn%D6\\t%0, %1\;%I7%d6\\t%0, %2, %3
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cmn\\t%4, #%n5\;mvn%D6\\t%0, %1\;%I7%d6\\t%0, %2, %3"
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[(set_attr "conds" "clob")
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(set_attr "length" "12")])
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@ -5029,18 +5029,18 @@
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if (TARGET_6)
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{
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if (backward)
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output_asm_insn (\"sub%?\\tlr, pc, #(8 + . -%l2)\", operands);
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output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l2)\", operands);
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else
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output_asm_insn (\"add%?\\tlr, pc, #(%l2 - . -8)\", operands);
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output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l2 - . -8)\", operands);
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}
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else
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#endif
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{
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output_asm_insn (\"mov%?\\tlr, pc\\t%@ protect cc\", operands);
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output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
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if (backward)
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output_asm_insn (\"sub%?\\tlr, lr, #(4 + . -%l2)\", operands);
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output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l2)\", operands);
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else
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output_asm_insn (\"add%?\\tlr, lr, #(%l2 - . -4)\", operands);
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output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l2 - . -4)\", operands);
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}
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return \"b%?\\t%a0\";
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}"
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@ -5075,18 +5075,18 @@
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if (TARGET_6)
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{
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if (backward)
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output_asm_insn (\"sub%?\\tlr, pc, #(8 + . -%l3)\", operands);
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output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l3)\", operands);
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else
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output_asm_insn (\"add%?\\tlr, pc, #(%l3 - . -8)\", operands);
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output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l3 - . -8)\", operands);
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}
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else
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#endif
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{
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output_asm_insn (\"mov%?\\tlr, pc\\t%@ protect cc\", operands);
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output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
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if (backward)
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output_asm_insn (\"sub%?\\tlr, lr, #(4 + . -%l3)\", operands);
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output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l3)\", operands);
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else
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output_asm_insn (\"add%?\\tlr, lr, #(%l3 - . -4)\", operands);
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output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l3 - . -4)\", operands);
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}
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return \"b%?\\t%a1\";
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}"
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@ -5226,8 +5226,8 @@
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(match_operand:SI 2 "s_register_operand" "r,r"))))]
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""
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"@
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mvn%D4\\t%0, %2
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mov%d4\\t%0, %1\;mvn%D4\\t%0, %2"
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mvn%D4\\t%0, %2
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mov%d4\\t%0, %1\;mvn%D4\\t%0, %2"
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[(set_attr "conds" "use")
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(set_attr "length" "4,8")])
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