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amdgcn: align TImode registers

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This prevents execution failures caused by partially overlapping input and
output registers.  This is the same solution already used for DImode.

gcc/ChangeLog:

	* config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align TImode registers.
	* config/gcn/gcn.md: Assert that TImode registers do not early clobber.
This commit is contained in:
Andrew Stubbs 2020-09-10 10:10:32 +01:00
parent 054fc495fa
commit 8ae0de5621
2 changed files with 4 additions and 1 deletions
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3
gcc/config/gcn/gcn.c
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@ -475,7 +475,8 @@ gcn_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
return (vgpr_1reg_mode_p (mode)
|| (!((regno - FIRST_VGPR_REG) & 1) && vgpr_2reg_mode_p (mode))
/* TImode is used by DImode compare_and_swap. */
|| mode == TImode);
|| (mode == TImode
&& !((regno - FIRST_VGPR_REG) & 3)));
return false;
}

2
gcc/config/gcn/gcn.md
View File

@ -677,6 +677,8 @@
(set (match_dup 4) (match_dup 5))
(set (match_dup 6) (match_dup 7))]
{
gcc_assert (rtx_equal_p (operands[0], operands[1])
|| !reg_overlap_mentioned_p (operands[0], operands[1]));
operands[6] = gcn_operand_part (TImode, operands[0], 3);
operands[7] = gcn_operand_part (TImode, operands[1], 3);
operands[4] = gcn_operand_part (TImode, operands[0], 2);