aarch64: Reimplement vabd* intrinsics using builtins
This patch reimplements the vabd* intrinsics using RTL builtins. It's fairly straightforward with new builtins + arm_neon.h changes. gcc/ * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3): Rename to... (aarch64_<su>abd<mode>): ... This. (<sur>sadv16qi): Adjust callsite of the above. * config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define builtins. * config/aarch64/arm_neon.h (vabd_s8): Reimplement using builtin. (vabd_s16): Likewise. (vabd_s32): Likewise. (vabd_u8): Likewise. (vabd_u16): Likewise. (vabd_u32): Likewise. (vabdq_s8): Likewise. (vabdq_s16): Likewise. (vabdq_s32): Likewise. (vabdq_u8): Likewise. (vabdq_u16): Likewise. (vabdq_u32): Likewise.
This commit is contained in:
Kyrylo Tkachov
parent
cab822d4ea
commit
79db5945ad
@ -149,6 +149,10 @@
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BUILTIN_VDQ_BHSI (BINOP, srhadd, 0, NONE)
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BUILTIN_VDQ_BHSI (BINOP, urhadd, 0, NONE)
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/* Implemented by aarch64_<su>abd<mode>. */
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BUILTIN_VDQ_BHSI (BINOP, sabd, 0, NONE)
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BUILTIN_VDQ_BHSI (BINOPU, uabd, 0, NONE)
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/* Implemented by aarch64_<su>aba<mode>. */
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BUILTIN_VDQ_BHSI (TERNOP, saba, 0, NONE)
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BUILTIN_VDQ_BHSI (TERNOPU, uaba, 0, NONE)
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@ -766,7 +766,7 @@
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;; So (ABS:QI (minus:QI 64 -128)) == (ABS:QI (192 or -64 signed)) == 64.
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;; Whereas SABD would return 192 (-64 signed) on the above example.
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;; Use MINUS ([us]max (op1, op2), [us]min (op1, op2)) instead.
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(define_insn "aarch64_<su>abd<mode>_3"
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(define_insn "aarch64_<su>abd<mode>"
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[(set (match_operand:VDQ_BHSI 0 "register_operand" "=w")
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(minus:VDQ_BHSI
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(USMAX:VDQ_BHSI
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@ -842,7 +842,7 @@
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{
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rtx ones = force_reg (V16QImode, CONST1_RTX (V16QImode));
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rtx abd = gen_reg_rtx (V16QImode);
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emit_insn (gen_aarch64_<sur>abdv16qi_3 (abd, operands[1], operands[2]));
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emit_insn (gen_aarch64_<sur>abdv16qi (abd, operands[1], operands[2]));
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emit_insn (gen_aarch64_udotv16qi (operands[0], operands[3],
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abd, ones));
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DONE;
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@ -6849,72 +6849,42 @@ __extension__ extern __inline int8x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_s8 (int8x8_t __a, int8x8_t __b)
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{
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int8x8_t __result;
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__asm__ ("sabd %0.8b, %1.8b, %2.8b"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv8qi (__a, __b);
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}
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__extension__ extern __inline int16x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_s16 (int16x4_t __a, int16x4_t __b)
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{
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int16x4_t __result;
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__asm__ ("sabd %0.4h, %1.4h, %2.4h"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv4hi (__a, __b);
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}
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__extension__ extern __inline int32x2_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_s32 (int32x2_t __a, int32x2_t __b)
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{
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int32x2_t __result;
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__asm__ ("sabd %0.2s, %1.2s, %2.2s"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv2si (__a, __b);
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}
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__extension__ extern __inline uint8x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_u8 (uint8x8_t __a, uint8x8_t __b)
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{
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uint8x8_t __result;
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__asm__ ("uabd %0.8b, %1.8b, %2.8b"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv8qi_uuu (__a, __b);
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}
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__extension__ extern __inline uint16x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_u16 (uint16x4_t __a, uint16x4_t __b)
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{
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uint16x4_t __result;
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__asm__ ("uabd %0.4h, %1.4h, %2.4h"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv4hi_uuu (__a, __b);
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}
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__extension__ extern __inline uint32x2_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabd_u32 (uint32x2_t __a, uint32x2_t __b)
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{
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uint32x2_t __result;
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__asm__ ("uabd %0.2s, %1.2s, %2.2s"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv2si_uuu (__a, __b);
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}
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__extension__ extern __inline int16x8_t
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@ -7065,72 +7035,42 @@ __extension__ extern __inline int8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_s8 (int8x16_t __a, int8x16_t __b)
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{
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int8x16_t __result;
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__asm__ ("sabd %0.16b, %1.16b, %2.16b"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv16qi (__a, __b);
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}
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__extension__ extern __inline int16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_s16 (int16x8_t __a, int16x8_t __b)
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{
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int16x8_t __result;
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__asm__ ("sabd %0.8h, %1.8h, %2.8h"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv8hi (__a, __b);
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}
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__extension__ extern __inline int32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_s32 (int32x4_t __a, int32x4_t __b)
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{
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int32x4_t __result;
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__asm__ ("sabd %0.4s, %1.4s, %2.4s"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_sabdv4si (__a, __b);
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}
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__extension__ extern __inline uint8x16_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_u8 (uint8x16_t __a, uint8x16_t __b)
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{
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uint8x16_t __result;
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__asm__ ("uabd %0.16b, %1.16b, %2.16b"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv16qi_uuu (__a, __b);
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}
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__extension__ extern __inline uint16x8_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_u16 (uint16x8_t __a, uint16x8_t __b)
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{
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uint16x8_t __result;
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__asm__ ("uabd %0.8h, %1.8h, %2.8h"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv8hi_uuu (__a, __b);
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}
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__extension__ extern __inline uint32x4_t
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__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
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vabdq_u32 (uint32x4_t __a, uint32x4_t __b)
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{
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uint32x4_t __result;
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__asm__ ("uabd %0.4s, %1.4s, %2.4s"
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: "=w"(__result)
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: "w"(__a), "w"(__b)
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: /* No clobbers */);
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return __result;
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return __builtin_aarch64_uabdv4si_uuu (__a, __b);
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}
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__extension__ extern __inline int16_t
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