AArch64: Fix options canonicalization for assembler

It is currently impossible to use fp16 on any architecture higher than Armv8.3-a
due to a bug in options canonization.  This bug results in the fp16 flag not
being emitted in the assembly when it should have been.

This is caused by a complicated architectural requirement at Armv8.4-a.  On
Armv8.2-a and Armv8.3-a fp16fml is an optional extension and turning it on turns
on both fp and fp16.  However starting with Armv8.4-a fp16fml is mandatory if
fp16 is available, otherwise it's optional.

In short this means that to enable fp16fml the smallest option that needs to
passed to the assembler is Armv8.4-a+fp16.

The fix in this patch takes into account that an option may be on by default in
an architecture, but that not all the bits required to use it are on by default
in an architecture.  In such cases the difference between the two are still
emitted to the assembler.

gcc/ChangeLog:

	PR target/94396
	* common/config/aarch64/aarch64-common.c
	(aarch64_get_extension_string_for_isa_flags): Handle default flags.

gcc/testsuite/ChangeLog:

	PR target/94396
	* gcc.target/aarch64/options_set_11.c: New test.
	* gcc.target/aarch64/options_set_12.c: New test.
	* gcc.target/aarch64/options_set_13.c: New test.
	* gcc.target/aarch64/options_set_14.c: New test.
	* gcc.target/aarch64/options_set_15.c: New test.
	* gcc.target/aarch64/options_set_16.c: New test.
	* gcc.target/aarch64/options_set_17.c: New test.
	* gcc.target/aarch64/options_set_18.c: New test.
	* gcc.target/aarch64/options_set_19.c: New test.
	* gcc.target/aarch64/options_set_20.c: New test.
	* gcc.target/aarch64/options_set_21.c: New test.
	* gcc.target/aarch64/options_set_22.c: New test.
	* gcc.target/aarch64/options_set_23.c: New test.
	* gcc.target/aarch64/options_set_24.c: New test.
	* gcc.target/aarch64/options_set_25.c: New test.
	* gcc.target/aarch64/options_set_26.c: New test.
This commit is contained in:
Tamar Christina 2020-04-03 15:18:35 +01:00
parent ef6631051d
commit 5316135818
19 changed files with 218 additions and 1 deletions

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@ -1,3 +1,9 @@
2020-04-03 Tamar Christina <tamar.christina@arm.com>
PR target/94396
* common/config/aarch64/aarch64-common.c
(aarch64_get_extension_string_for_isa_flags): Handle default flags.
2020-04-03 Richard Biener <rguenther@suse.de>
PR middle-end/94465

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@ -391,7 +391,22 @@ aarch64_get_extension_string_for_isa_flags (uint64_t isa_flags,
/* We remove all the dependent bits, to prevent them from being turned
on twice. This only works because we assume that all there are
individual options to set all bits standalone. */
isa_flag_bits &= ~opt->flags_on;
/* PR target/94396.
For flags which would already imply a bit that's on by default (e.g
fp16fml which implies +fp,+fp16) we must emit the flags that are not
on by default. i.e. in Armv8.4-a +fp16fml is default if +fp16. So
if a user passes armv8.4-a+fp16 (or +fp16fml) then we need to emit
+fp16. But if +fp16fml is used in an architecture where it is
completely optional we only have to emit the canonical flag. */
uint64_t toggle_bits = opt->flags_on & default_arch_flags;
/* Now check to see if the canonical flag is on by default. If it
is not then enabling it will enable all bits in flags_on. */
if ((opt->flag_canonical & default_arch_flags) == 0)
toggle_bits = opt->flags_on;
isa_flag_bits &= ~toggle_bits;
isa_flag_bits |= opt->flag_canonical;
}
}

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@ -1,3 +1,23 @@
2020-04-03 Tamar Christina <tamar.christina@arm.com>
PR target/94396
* gcc.target/aarch64/options_set_11.c: New test.
* gcc.target/aarch64/options_set_12.c: New test.
* gcc.target/aarch64/options_set_13.c: New test.
* gcc.target/aarch64/options_set_14.c: New test.
* gcc.target/aarch64/options_set_15.c: New test.
* gcc.target/aarch64/options_set_16.c: New test.
* gcc.target/aarch64/options_set_17.c: New test.
* gcc.target/aarch64/options_set_18.c: New test.
* gcc.target/aarch64/options_set_19.c: New test.
* gcc.target/aarch64/options_set_20.c: New test.
* gcc.target/aarch64/options_set_21.c: New test.
* gcc.target/aarch64/options_set_22.c: New test.
* gcc.target/aarch64/options_set_23.c: New test.
* gcc.target/aarch64/options_set_24.c: New test.
* gcc.target/aarch64/options_set_25.c: New test.
* gcc.target/aarch64/options_set_26.c: New test.
2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
PR tree-optimization/94443

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc} } } */
/* FP is default on, no need to pass on to assembler. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp16" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
/* fp16 not default, should be emitted. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp16+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16} } } */
/* FP is part of FP16, don't emit it. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp16fml" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
/* fmp16fml is smallest option to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp16fml+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml*} } } */
/* fp included in fp16fml, only emit latter. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+fp16fml+fp16+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+fp16fml} } } */
/* fp16fml is smallest options to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.2-a+dotprod" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.2-a\+crc\+dotprod} } } */
/* dotprod needs to be emitted pre armv8.4. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+dotprod" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
/* dotprod is default in armv8.4-a, don't emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc} } } */
/* fp default, don't emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16fml" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16fml+fp" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16fml+fp16" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16fml+fp+fp16" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */

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@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-additional-options "-march=armv8.4-a+fp16" } */
int main ()
{
return 0;
}
/* { dg-final { scan-assembler {\.arch armv8\.4-a\+crc\+fp16} } } */
/* fp16 smallest set to emit. */