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arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...).

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* arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...).
* arm.h: Likewise.
* arm.c: Likewise.
* arm.h (TARGET_OPTIONS): Reformat for clarity.
(GO_IF_LEGITIMATE_ADDRESS): When generating PIC, references to symbols
in the constant pool aren't valid.
(LEGITIMATE_PIC_OPERAND_P): Likewise.
* arm.c: Include "system.h", not stdio.h and string.h.

From-SVN: r25175
This commit is contained in:
Richard Earnshaw 1999-02-13 05:41:18 +00:00 committed by Richard Earnshaw
parent b4fce8ab0e
commit 43cffd112f
4 changed files with 320 additions and 283 deletions
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13
gcc/ChangeLog
View File

@ -1,3 +1,16 @@
Sat Feb 13 05:32:00 1999 Richard Earnshaw (rearnsha@arm.com)
* arm.md: Use gen_rtx_FOO instead of gen_rtx (FOO, ...).
* arm.h: Likewise.
* arm.c: Likewise.
* arm.h (TARGET_OPTIONS): Reformat for clarity.
(GO_IF_LEGITIMATE_ADDRESS): When generating PIC, references to symbols
in the constant pool aren't valid.
(LEGITIMATE_PIC_OPERAND_P): Likewise.
* arm.c: Include "system.h", not stdio.h and string.h.
Fri Feb 12 13:06:28 1999 Jim Wilson <wilson@cygnus.com>
* stmt.c (expand_return): Return if optimize_tail_recursion succeeded.

441
gcc/config/arm/arm.c
View File

@ -22,8 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include <string.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -556,22 +555,22 @@ arm_split_constant (code, mode, val, target, source, subtargets)
{
/* Currently SET is the only monadic value for CODE, all
the rest are diadic. */
emit_insn (gen_rtx (SET, VOIDmode, target, GEN_INT (val)));
emit_insn (gen_rtx_SET (VOIDmode, target, GEN_INT (val)));
return 1;
}
else
{
rtx temp = subtargets ? gen_reg_rtx (mode) : target;
emit_insn (gen_rtx (SET, VOIDmode, temp, GEN_INT (val)));
emit_insn (gen_rtx_SET (VOIDmode, temp, GEN_INT (val)));
/* For MINUS, the value is subtracted from, since we never
have subtraction of a constant. */
if (code == MINUS)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (code, mode, temp, source)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx (code, mode, temp, source)));
else
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (code, mode, source, temp)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx (code, mode, source, temp)));
return 2;
}
}
@ -626,8 +625,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (remainder == 0xffffffff)
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
GEN_INT (ARM_SIGN_EXTEND (val))));
emit_insn (gen_rtx_SET (VOIDmode, target,
GEN_INT (ARM_SIGN_EXTEND (val))));
return 1;
}
if (remainder == 0)
@ -635,7 +634,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (reload_completed && rtx_equal_p (target, source))
return 0;
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target, source));
emit_insn (gen_rtx_SET (VOIDmode, target, source));
return 1;
}
break;
@ -644,7 +643,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (remainder == 0)
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target, const0_rtx));
emit_insn (gen_rtx_SET (VOIDmode, target, const0_rtx));
return 1;
}
if (remainder == 0xffffffff)
@ -652,7 +651,7 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (reload_completed && rtx_equal_p (target, source))
return 0;
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target, source));
emit_insn (gen_rtx_SET (VOIDmode, target, source));
return 1;
}
can_invert = 1;
@ -664,14 +663,14 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (reload_completed && rtx_equal_p (target, source))
return 0;
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target, source));
emit_insn (gen_rtx_SET (VOIDmode, target, source));
return 1;
}
if (remainder == 0xffffffff)
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (NOT, mode, source)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_NOT (mode, source)));
return 1;
}
@ -684,15 +683,16 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (remainder == 0)
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (NEG, mode, source)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_NEG (mode, source)));
return 1;
}
if (const_ok_for_arm (val))
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (MINUS, mode, GEN_INT (val), source)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_MINUS (mode, GEN_INT (val),
source)));
return 1;
}
can_negate = 1;
@ -709,10 +709,10 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
|| (can_invert && const_ok_for_arm (~val)))
{
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
(source ? gen_rtx (code, mode, source,
GEN_INT (val))
: GEN_INT (val))));
emit_insn (gen_rtx_SET (VOIDmode, target,
(source ? gen_rtx (code, mode, source,
GEN_INT (val))
: GEN_INT (val))));
return 1;
}
@ -767,8 +767,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
emit_insn (gen_rtx (SET, VOIDmode, new_src,
GEN_INT (temp1)));
emit_insn (gen_rtx_SET (VOIDmode, new_src,
GEN_INT (temp1)));
emit_insn (gen_ashrsi3 (target, new_src,
GEN_INT (set_sign_bit_copies - 1)));
}
@ -782,8 +782,8 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
emit_insn (gen_rtx (SET, VOIDmode, new_src,
GEN_INT (temp1)));
emit_insn (gen_rtx_SET (VOIDmode, new_src,
GEN_INT (temp1)));
emit_insn (gen_ashrsi3 (target, new_src,
GEN_INT (set_sign_bit_copies - 1)));
}
@ -814,11 +814,12 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
source, subtargets, generate);
source = new_src;
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (IOR, mode,
gen_rtx (ASHIFT, mode, source,
GEN_INT (i)),
source)));
emit_insn (gen_rtx_SET
(VOIDmode, target,
gen_rtx_IOR (mode,
gen_rtx_ASHIFT (mode, source,
GEN_INT (i)),
source)));
return insns + 1;
}
}
@ -836,11 +837,13 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
source, subtargets, generate);
source = new_src;
if (generate)
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (IOR, mode,
gen_rtx (LSHIFTRT, mode,
source, GEN_INT (i)),
source)));
emit_insn
(gen_rtx_SET (VOIDmode, target,
gen_rtx_IOR
(mode,
gen_rtx_LSHIFTRT (mode, source,
GEN_INT (i)),
source)));
return insns + 1;
}
}
@ -862,9 +865,9 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
{
rtx sub = subtargets ? gen_reg_rtx (mode) : target;
emit_insn (gen_rtx (SET, VOIDmode, sub, GEN_INT (val)));
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (code, mode, source, sub)));
emit_insn (gen_rtx_SET (VOIDmode, sub, GEN_INT (val)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx (code, mode, source, sub)));
}
return 2;
}
@ -881,14 +884,15 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
rtx sub = subtargets ? gen_reg_rtx (mode) : target;
rtx shift = GEN_INT (set_sign_bit_copies);
emit_insn (gen_rtx (SET, VOIDmode, sub,
gen_rtx (NOT, mode,
gen_rtx (ASHIFT, mode, source,
shift))));
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (NOT, mode,
gen_rtx (LSHIFTRT, mode, sub,
emit_insn (gen_rtx_SET (VOIDmode, sub,
gen_rtx_NOT (mode,
gen_rtx_ASHIFT (mode,
source,
shift))));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_NOT (mode,
gen_rtx_LSHIFTRT (mode, sub,
shift))));
}
return 2;
}
@ -901,13 +905,14 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
rtx sub = subtargets ? gen_reg_rtx (mode) : target;
rtx shift = GEN_INT (set_zero_bit_copies);
emit_insn (gen_rtx (SET, VOIDmode, sub,
gen_rtx (NOT, mode,
gen_rtx (LSHIFTRT, mode, source,
emit_insn (gen_rtx_SET (VOIDmode, sub,
gen_rtx_NOT (mode,
gen_rtx_LSHIFTRT (mode,
source,
shift))));
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (NOT, mode,
gen_rtx (ASHIFT, mode, sub,
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_NOT (mode,
gen_rtx_ASHIFT (mode, sub,
shift))));
}
return 2;
@ -918,16 +923,16 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
if (generate)
{
rtx sub = subtargets ? gen_reg_rtx (mode) : target;
emit_insn (gen_rtx (SET, VOIDmode, sub,
gen_rtx (NOT, mode, source)));
emit_insn (gen_rtx_SET (VOIDmode, sub,
gen_rtx_NOT (mode, source)));
source = sub;
if (subtargets)
sub = gen_reg_rtx (mode);
emit_insn (gen_rtx (SET, VOIDmode, sub,
gen_rtx (AND, mode, source,
GEN_INT (temp1))));
emit_insn (gen_rtx (SET, VOIDmode, target,
gen_rtx (NOT, mode, sub)));
emit_insn (gen_rtx_SET (VOIDmode, sub,
gen_rtx_AND (mode, source,
GEN_INT (temp1))));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx_NOT (mode, sub)));
}
return 3;
}
@ -1079,30 +1084,31 @@ arm_gen_constant (code, mode, val, target, source, subtargets, generate)
rtx new_src;
if (code == SET)
emit_insn (gen_rtx (SET, VOIDmode,
new_src = (subtargets
? gen_reg_rtx (mode)
: target),
GEN_INT (can_invert ? ~temp1 : temp1)));
emit_insn (gen_rtx_SET (VOIDmode,
new_src = (subtargets
? gen_reg_rtx (mode)
: target),
GEN_INT (can_invert
? ~temp1 : temp1)));
else if (code == MINUS)
emit_insn (gen_rtx (SET, VOIDmode,
new_src = (subtargets
? gen_reg_rtx (mode)
: target),
gen_rtx (code, mode, GEN_INT (temp1),
source)));
emit_insn (gen_rtx_SET (VOIDmode,
new_src = (subtargets
? gen_reg_rtx (mode)
: target),
gen_rtx (code, mode, GEN_INT (temp1),
source)));
else
emit_insn (gen_rtx (SET, VOIDmode,
new_src = (remainder
? (subtargets
? gen_reg_rtx (mode)
: target)
: target),
gen_rtx (code, mode, source,
GEN_INT (can_invert ? ~temp1
: (can_negate
? -temp1
: temp1)))));
emit_insn (gen_rtx_SET (VOIDmode,
new_src = (remainder
? (subtargets
? gen_reg_rtx (mode)
: target)
: target),
gen_rtx (code, mode, source,
GEN_INT (can_invert ? ~temp1
: (can_negate
? -temp1
: temp1)))));
source = new_src;
}
@ -1277,16 +1283,17 @@ legitimize_pic_address (orig, mode, reg)
emit_insn (gen_pic_load_addr (address, orig));
pic_ref = gen_rtx (MEM, Pmode,
gen_rtx (PLUS, Pmode, pic_offset_table_rtx, address));
pic_ref = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
address));
RTX_UNCHANGING_P (pic_ref) = 1;
insn = emit_move_insn (reg, pic_ref);
#endif
current_function_uses_pic_offset_table = 1;
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig,
REG_NOTES (insn));
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
REG_NOTES (insn));
return reg;
}
else if (GET_CODE (orig) == CONST)
@ -1338,7 +1345,7 @@ legitimize_pic_address (orig, mode, reg)
return reg;
}
return gen_rtx (PLUS, Pmode, base, offset);
return gen_rtx_PLUS (Pmode, base, offset);
}
else if (GET_CODE (orig) == LABEL_REF)
current_function_uses_pic_offset_table = 1;
@ -1373,20 +1380,15 @@ arm_finalize_pic ()
start_sequence ();
l1 = gen_label_rtx ();
global_offset_table = gen_rtx (SYMBOL_REF, Pmode, "_GLOBAL_OFFSET_TABLE_");
global_offset_table = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
/* The PC contains 'dot'+8, but the label L1 is on the next
instruction, so the offset is only 'dot'+4. */
pic_tmp = gen_rtx (CONST, VOIDmode,
gen_rtx (PLUS, Pmode,
gen_rtx (LABEL_REF, VOIDmode, l1),
GEN_INT (4)));
pic_tmp2 = gen_rtx (CONST, VOIDmode,
gen_rtx (PLUS, Pmode,
global_offset_table,
pc_rtx));
pic_tmp = plus_constant (gen_rtx_LABEL_REF (Pmode, l1),
GEN_INT (4));
pic_tmp2 = gen_rtx_CONST (VOIDmode,
gen_rtx_PLUS (Pmode, global_offset_table, pc_rtx));
pic_rtx = gen_rtx (CONST, Pmode,
gen_rtx (MINUS, Pmode, pic_tmp2, pic_tmp));
pic_rtx = gen_rtx_CONST (Pmode, gen_rtx_MINUS (Pmode, pic_tmp2, pic_tmp));
emit_insn (gen_pic_load_addr (pic_offset_table_rtx, pic_rtx));
emit_jump_insn (gen_pic_add_dot_plus_eight(l1, pic_offset_table_rtx));
@ -1398,7 +1400,7 @@ arm_finalize_pic ()
/* Need to emit this whether or not we obey regdecls,
since setjmp/longjmp can cause life info to screw up. */
emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx));
emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
#endif /* AOF_ASSEMBLER */
}
@ -2922,30 +2924,29 @@ arm_gen_load_multiple (base_regno, count, from, up, write_back, unchanging_p,
int sign = up ? 1 : -1;
rtx mem;
result = gen_rtx (PARALLEL, VOIDmode,
rtvec_alloc (count + (write_back ? 2 : 0)));
result = gen_rtx_PARALLEL (VOIDmode,
rtvec_alloc (count + (write_back ? 2 : 0)));
if (write_back)
{
XVECEXP (result, 0, 0)
= gen_rtx (SET, GET_MODE (from), from,
plus_constant (from, count * 4 * sign));
= gen_rtx_SET (GET_MODE (from), from,
plus_constant (from, count * 4 * sign));
i = 1;
count++;
}
for (j = 0; i < count; i++, j++)
{
mem = gen_rtx (MEM, SImode, plus_constant (from, j * 4 * sign));
mem = gen_rtx_MEM (SImode, plus_constant (from, j * 4 * sign));
RTX_UNCHANGING_P (mem) = unchanging_p;
MEM_IN_STRUCT_P (mem) = in_struct_p;
MEM_SCALAR_P (mem) = scalar_p;
XVECEXP (result, 0, i) = gen_rtx (SET, VOIDmode,
gen_rtx (REG, SImode, base_regno + j),
mem);
XVECEXP (result, 0, i)
= gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, base_regno + j), mem);
}
if (write_back)
XVECEXP (result, 0, i) = gen_rtx (CLOBBER, SImode, from);
XVECEXP (result, 0, i) = gen_rtx_CLOBBER (SImode, from);
return result;
}
@ -2967,30 +2968,30 @@ arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p,
int sign = up ? 1 : -1;
rtx mem;
result = gen_rtx (PARALLEL, VOIDmode,
rtvec_alloc (count + (write_back ? 2 : 0)));
result = gen_rtx_PARALLEL (VOIDmode,
rtvec_alloc (count + (write_back ? 2 : 0)));
if (write_back)
{
XVECEXP (result, 0, 0)
= gen_rtx (SET, GET_MODE (to), to,
plus_constant (to, count * 4 * sign));
= gen_rtx_SET (GET_MODE (to), to,
plus_constant (to, count * 4 * sign));
i = 1;
count++;
}
for (j = 0; i < count; i++, j++)
{
mem = gen_rtx (MEM, SImode, plus_constant (to, j * 4 * sign));
mem = gen_rtx_MEM (SImode, plus_constant (to, j * 4 * sign));
RTX_UNCHANGING_P (mem) = unchanging_p;
MEM_IN_STRUCT_P (mem) = in_struct_p;
MEM_SCALAR_P (mem) = scalar_p;
XVECEXP (result, 0, i) = gen_rtx (SET, VOIDmode, mem,
gen_rtx (REG, SImode, base_regno + j));
XVECEXP (result, 0, i)
= gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, base_regno + j));
}
if (write_back)
XVECEXP (result, 0, i) = gen_rtx (CLOBBER, SImode, to);
XVECEXP (result, 0, i) = gen_rtx_CLOBBER (SImode, to);
return result;
}
@ -3032,7 +3033,7 @@ arm_gen_movstrqi (operands)
last_bytes = INTVAL (operands[2]) & 3;
if (out_words_to_go != in_words_to_go && ((in_words_to_go - 1) & 3) != 0)
part_bytes_reg = gen_rtx (REG, SImode, (in_words_to_go - 1) & 3);
part_bytes_reg = gen_rtx_REG (SImode, (in_words_to_go - 1) & 3);
for (i = 0; in_words_to_go >= 2; i+=4)
{
@ -3063,11 +3064,11 @@ arm_gen_movstrqi (operands)
dst_scalar_p));
else
{
mem = gen_rtx (MEM, SImode, dst);
mem = gen_rtx_MEM (SImode, dst);
RTX_UNCHANGING_P (mem) = dst_unchanging_p;
MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
MEM_SCALAR_P (mem) = dst_scalar_p;
emit_move_insn (mem, gen_rtx (REG, SImode, 0));
emit_move_insn (mem, gen_rtx_REG (SImode, 0));
if (last_bytes != 0)
emit_insn (gen_addsi3 (dst, dst, GEN_INT (4)));
}
@ -3082,14 +3083,14 @@ arm_gen_movstrqi (operands)
{
rtx sreg;
mem = gen_rtx (MEM, SImode, src);
mem = gen_rtx_MEM (SImode, src);
RTX_UNCHANGING_P (mem) = src_unchanging_p;
MEM_IN_STRUCT_P (mem) = src_in_struct_p;
MEM_SCALAR_P (mem) = src_scalar_p;
emit_move_insn (sreg = gen_reg_rtx (SImode), mem);
emit_move_insn (fin_src = gen_reg_rtx (SImode), plus_constant (src, 4));
mem = gen_rtx (MEM, SImode, dst);
mem = gen_rtx_MEM (SImode, dst);
RTX_UNCHANGING_P (mem) = dst_unchanging_p;
MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
MEM_SCALAR_P (mem) = dst_scalar_p;
@ -3106,7 +3107,7 @@ arm_gen_movstrqi (operands)
if (in_words_to_go < 0)
abort ();
mem = gen_rtx (MEM, SImode, src);
mem = gen_rtx_MEM (SImode, src);
RTX_UNCHANGING_P (mem) = src_unchanging_p;
MEM_IN_STRUCT_P (mem) = src_in_struct_p;
MEM_SCALAR_P (mem) = src_scalar_p;
@ -3127,11 +3128,11 @@ arm_gen_movstrqi (operands)
while (last_bytes)
{
mem = gen_rtx (MEM, QImode, plus_constant (dst, last_bytes - 1));
mem = gen_rtx_MEM (QImode, plus_constant (dst, last_bytes - 1));
RTX_UNCHANGING_P (mem) = dst_unchanging_p;
MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
MEM_SCALAR_P (mem) = dst_scalar_p;
emit_move_insn (mem, gen_rtx (SUBREG, QImode, part_bytes_reg, 0));
emit_move_insn (mem, gen_rtx_SUBREG (QImode, part_bytes_reg, 0));
if (--last_bytes)
{
tmp = gen_reg_rtx (SImode);
@ -3148,11 +3149,11 @@ arm_gen_movstrqi (operands)
if (part_bytes_reg == NULL)
abort ();
mem = gen_rtx (MEM, QImode, dst);
mem = gen_rtx_MEM (QImode, dst);
RTX_UNCHANGING_P (mem) = dst_unchanging_p;
MEM_IN_STRUCT_P (mem) = dst_in_struct_p;
MEM_SCALAR_P (mem) = dst_scalar_p;
emit_move_insn (mem, gen_rtx (SUBREG, QImode, part_bytes_reg, 0));
emit_move_insn (mem, gen_rtx_SUBREG (QImode, part_bytes_reg, 0));
if (--last_bytes)
{
rtx tmp = gen_reg_rtx (SImode);
@ -3188,12 +3189,12 @@ gen_rotated_half_load (memref)
&& ((BYTES_BIG_ENDIAN ? 1 : 0) ^ ((offset & 2) == 0)))
return NULL;
base = gen_rtx (MEM, SImode, plus_constant (base, offset & ~2));
base = gen_rtx_MEM (SImode, plus_constant (base, offset & ~2));
if ((BYTES_BIG_ENDIAN ? 1 : 0) ^ ((offset & 2) == 2))
return base;
return gen_rtx (ROTATE, SImode, base, GEN_INT (16));
return gen_rtx_ROTATE (SImode, base, GEN_INT (16));
}
static enum machine_mode
@ -3393,10 +3394,10 @@ gen_compare_reg (code, x, y, fp)
int fp;
{
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
rtx cc_reg = gen_rtx (REG, mode, 24);
rtx cc_reg = gen_rtx_REG (mode, 24);
emit_insn (gen_rtx (SET, VOIDmode, cc_reg,
gen_rtx (COMPARE, mode, x, y)));
emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
gen_rtx_COMPARE (mode, x, y)));
return cc_reg;
}
@ -3407,37 +3408,35 @@ arm_reload_in_hi (operands)
{
rtx base = find_replacement (&XEXP (operands[1], 0));
emit_insn (gen_zero_extendqisi2 (operands[2], gen_rtx (MEM, QImode, base)));
emit_insn (gen_zero_extendqisi2 (operands[2], gen_rtx_MEM (QImode, base)));
/* Handle the case where the address is too complex to be offset by 1. */
if (GET_CODE (base) == MINUS
|| (GET_CODE (base) == PLUS && GET_CODE (XEXP (base, 1)) != CONST_INT))
{
rtx base_plus = gen_rtx (REG, SImode, REGNO (operands[0]));
rtx base_plus = gen_rtx_REG (SImode, REGNO (operands[0]));
emit_insn (gen_rtx (SET, VOIDmode, base_plus, base));
emit_insn (gen_rtx_SET (VOIDmode, base_plus, base));
base = base_plus;
}
emit_insn (gen_zero_extendqisi2 (gen_rtx (SUBREG, SImode, operands[0], 0),
gen_rtx (MEM, QImode,
plus_constant (base, 1))));
emit_insn (gen_zero_extendqisi2 (gen_rtx_SUBREG (SImode, operands[0], 0),
gen_rtx_MEM (QImode,
plus_constant (base, 1))));
if (BYTES_BIG_ENDIAN)
emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (SUBREG, SImode,
operands[0], 0),
gen_rtx (IOR, SImode,
gen_rtx (ASHIFT, SImode,
gen_rtx (SUBREG, SImode,
operands[0], 0),
GEN_INT (8)),
operands[2])));
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operands[0], 0),
gen_rtx_IOR (SImode,
gen_rtx_ASHIFT
(SImode,
gen_rtx_SUBREG (SImode, operands[0], 0),
GEN_INT (8)),
operands[2])));
else
emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (SUBREG, SImode,
operands[0], 0),
gen_rtx (IOR, SImode,
gen_rtx (ASHIFT, SImode,
operands[2],
GEN_INT (8)),
gen_rtx (SUBREG, SImode, operands[0], 0))));
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operands[0], 0),
gen_rtx_IOR (SImode,
gen_rtx_ASHIFT (SImode, operands[2],
GEN_INT (8)),
gen_rtx_SUBREG (SImode, operands[0],
0))));
}
void
@ -3448,23 +3447,23 @@ arm_reload_out_hi (operands)
if (BYTES_BIG_ENDIAN)
{
emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (base, 1)),
gen_rtx (SUBREG, QImode, operands[1], 0)));
emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, 1)),
gen_rtx_SUBREG (QImode, operands[1], 0)));
emit_insn (gen_lshrsi3 (operands[2],
gen_rtx (SUBREG, SImode, operands[1], 0),
gen_rtx_SUBREG (SImode, operands[1], 0),
GEN_INT (8)));
emit_insn (gen_movqi (gen_rtx (MEM, QImode, base),
gen_rtx (SUBREG, QImode, operands[2], 0)));
emit_insn (gen_movqi (gen_rtx_MEM (QImode, base),
gen_rtx_SUBREG (QImode, operands[2], 0)));
}
else
{
emit_insn (gen_movqi (gen_rtx (MEM, QImode, base),
gen_rtx (SUBREG, QImode, operands[1], 0)));
emit_insn (gen_movqi (gen_rtx_MEM (QImode, base),
gen_rtx_SUBREG (QImode, operands[1], 0)));
emit_insn (gen_lshrsi3 (operands[2],
gen_rtx (SUBREG, SImode, operands[1], 0),
gen_rtx_SUBREG (SImode, operands[1], 0),
GEN_INT (8)));
emit_insn (gen_movqi (gen_rtx (MEM, QImode, plus_constant (base, 1)),
gen_rtx (SUBREG, QImode, operands[2], 0)));
emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, 1)),
gen_rtx_SUBREG (QImode, operands[2], 0)));
}
}
@ -3853,8 +3852,8 @@ arm_reorg (first)
}
offset = add_constant (src, mode, &address_only);
addr = plus_constant (gen_rtx (LABEL_REF, VOIDmode,
pool_vector_label),
addr = plus_constant (gen_rtx_LABEL_REF (VOIDmode,
pool_vector_label),
offset);
/* If we only want the address of the pool entry, or
@ -3873,7 +3872,7 @@ arm_reorg (first)
if (mode == SImode)
reg = dst;
else
reg = gen_rtx (REG, SImode, scratch);
reg = gen_rtx_REG (SImode, scratch);
newinsn = emit_insn_after (gen_movaddr (reg, addr),
newinsn);
@ -3882,15 +3881,17 @@ arm_reorg (first)
if (! address_only)
{
newsrc = gen_rtx (MEM, mode, addr);
newsrc = gen_rtx_MEM (mode, addr);
/* XXX Fixme -- I think the following is bogus. */
/* Build a jump insn wrapper around the move instead
of an ordinary insn, because we want to have room for
the target label rtx in fld[7], which an ordinary
insn doesn't have. */
newinsn = emit_jump_insn_after
(gen_rtx (SET, VOIDmode, dst, newsrc), newinsn);
newinsn
= emit_jump_insn_after (gen_rtx_SET (VOIDmode, dst,
newsrc),
newinsn);
JUMP_LABEL (newinsn) = pool_vector_label;
/* But it's still an ordinary insn */
@ -3988,7 +3989,7 @@ output_call (operands)
if (REGNO (operands[0]) == 14)
{
operands[0] = gen_rtx (REG, SImode, 12);
operands[0] = gen_rtx_REG (SImode, 12);
output_asm_insn ("mov%?\t%0, %|lr", operands);
}
output_asm_insn ("mov%?\t%|lr, %|pc", operands);
@ -4016,7 +4017,7 @@ eliminate_lr2ip (x)
case REG:
if (REGNO (x0) == 14)
{
*x = gen_rtx (REG, SImode, 12);
*x = gen_rtx_REG (SImode, 12);
return 1;
}
return 0;
@ -4075,9 +4076,9 @@ output_mov_long_double_fpu_from_arm (operands)
if (arm_reg0 == 12)
abort();
ops[0] = gen_rtx (REG, SImode, arm_reg0);
ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0);
ops[2] = gen_rtx (REG, SImode, 2 + arm_reg0);
ops[0] = gen_rtx_REG (SImode, arm_reg0);
ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0);
ops[2] = gen_rtx_REG (SImode, 2 + arm_reg0);
output_asm_insn ("stm%?fd\t%|sp!, {%0, %1, %2}", ops);
output_asm_insn ("ldf%?e\t%0, [%|sp], #12", operands);
@ -4098,9 +4099,9 @@ output_mov_long_double_arm_from_fpu (operands)
if (arm_reg0 == 12)
abort();
ops[0] = gen_rtx (REG, SImode, arm_reg0);
ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0);
ops[2] = gen_rtx (REG, SImode, 2 + arm_reg0);
ops[0] = gen_rtx_REG (SImode, arm_reg0);
ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0);
ops[2] = gen_rtx_REG (SImode, 2 + arm_reg0);
output_asm_insn ("stf%?e\t%1, [%|sp, #-12]!", operands);
output_asm_insn ("ldm%?fd\t%|sp!, {%0, %1, %2}", ops);
@ -4124,8 +4125,8 @@ output_mov_long_double_arm_from_arm (operands)
{
for (i = 0; i < 3; i++)
{
ops[0] = gen_rtx (REG, SImode, dest_start + i);
ops[1] = gen_rtx (REG, SImode, src_start + i);
ops[0] = gen_rtx_REG (SImode, dest_start + i);
ops[1] = gen_rtx_REG (SImode, src_start + i);
output_asm_insn ("mov%?\t%0, %1", ops);
}
}
@ -4133,8 +4134,8 @@ output_mov_long_double_arm_from_arm (operands)
{
for (i = 2; i >= 0; i--)
{
ops[0] = gen_rtx (REG, SImode, dest_start + i);
ops[1] = gen_rtx (REG, SImode, src_start + i);
ops[0] = gen_rtx_REG (SImode, dest_start + i);
ops[1] = gen_rtx_REG (SImode, src_start + i);
output_asm_insn ("mov%?\t%0, %1", ops);
}
}
@ -4156,8 +4157,8 @@ output_mov_double_fpu_from_arm (operands)
if (arm_reg0 == 12)
abort();
ops[0] = gen_rtx (REG, SImode, arm_reg0);
ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0);
ops[0] = gen_rtx_REG (SImode, arm_reg0);
ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0);
output_asm_insn ("stm%?fd\t%|sp!, {%0, %1}", ops);
output_asm_insn ("ldf%?d\t%0, [%|sp], #8", operands);
return "";
@ -4177,8 +4178,8 @@ output_mov_double_arm_from_fpu (operands)
if (arm_reg0 == 12)
abort();
ops[0] = gen_rtx (REG, SImode, arm_reg0);
ops[1] = gen_rtx (REG, SImode, 1 + arm_reg0);
ops[0] = gen_rtx_REG (SImode, arm_reg0);
ops[1] = gen_rtx_REG (SImode, 1 + arm_reg0);
output_asm_insn ("stf%?d\t%1, [%|sp, #-8]!", operands);
output_asm_insn ("ldm%?fd\t%|sp!, {%0, %1}", ops);
return "";
@ -4200,7 +4201,7 @@ output_move_double (operands)
{
int reg0 = REGNO (operands[0]);
otherops[0] = gen_rtx (REG, SImode, 1 + reg0);
otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
if (code1 == REG)
{
int reg1 = REGNO (operands[1]);
@ -4405,7 +4406,7 @@ output_move_double (operands)
default:
otherops[0] = adj_offsettable_operand (operands[0], 4);
otherops[1] = gen_rtx (REG, SImode, 1 + REGNO (operands[1]));
otherops[1] = gen_rtx_REG (SImode, 1 + REGNO (operands[1]));
output_asm_insn ("str%?\t%1, %0", operands);
output_asm_insn ("str%?\t%1, %0", otherops);
}
@ -4876,7 +4877,7 @@ output_return_instruction (operand, really_return, reverse)
/* Otherwise, trap an attempted return by aborting. */
ops[0] = operand;
ops[1] = gen_rtx (SYMBOL_REF, Pmode, "abort");
ops[1] = gen_rtx_SYMBOL_REF (Pmode, "abort");
assemble_external_libcall (ops[1]);
output_asm_insn (reverse ? "bl%D0\t%a1" : "bl%d0\t%a1", ops);
return "";
@ -5085,7 +5086,7 @@ output_func_epilogue (f, frame_size)
/* A volatile function should never return. Call abort. */
if (TARGET_ABORT_NORETURN && volatile_func)
{
rtx op = gen_rtx (SYMBOL_REF, Pmode, "abort");
rtx op = gen_rtx_SYMBOL_REF (Pmode, "abort");
assemble_external_libcall (op);
output_asm_insn ("bl\t%a0", &op);
goto epilogue_done;
@ -5278,19 +5279,21 @@ emit_multi_reg_push (mask)
if (num_regs == 0 || num_regs > 16)
abort ();
par = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (num_regs));
par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (num_regs));
for (i = 0; i < 16; i++)
{
if (mask & (1 << i))
{
XVECEXP (par, 0, 0)
= gen_rtx (SET, VOIDmode, gen_rtx (MEM, BLKmode,
gen_rtx (PRE_DEC, BLKmode,
stack_pointer_rtx)),
gen_rtx (UNSPEC, BLKmode,
gen_rtvec (1, gen_rtx (REG, SImode, i)),
2));
= gen_rtx_SET (VOIDmode,
gen_rtx_MEM (BLKmode,
gen_rtx_PRE_DEC (BLKmode,
stack_pointer_rtx)),
gen_rtx_UNSPEC (BLKmode,
gen_rtvec (1,
gen_rtx_REG (SImode, i)),
2));
break;
}
}
@ -5300,7 +5303,7 @@ emit_multi_reg_push (mask)
if (mask & (1 << i))
{
XVECEXP (par, 0, j)
= gen_rtx (USE, VOIDmode, gen_rtx (REG, SImode, i));
= gen_rtx_USE (VOIDmode, gen_rtx_REG (SImode, i));
j++;
}
}
@ -5316,19 +5319,20 @@ emit_sfm (base_reg, count)
rtx par;
int i;
par = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count));
par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
XVECEXP (par, 0, 0)
= gen_rtx_SET (VOIDmode,
gen_rtx_MEM (BLKmode,
gen_rtx_PRE_DEC (BLKmode, stack_pointer_rtx)),
gen_rtx_UNSPEC (BLKmode,
gen_rtvec (1, gen_rtx_REG (XFmode,
base_reg++)),
2));
XVECEXP (par, 0, 0) = gen_rtx (SET, VOIDmode,
gen_rtx (MEM, BLKmode,
gen_rtx (PRE_DEC, BLKmode,
stack_pointer_rtx)),
gen_rtx (UNSPEC, BLKmode,
gen_rtvec (1, gen_rtx (REG, XFmode,
base_reg++)),
2));
for (i = 1; i < count; i++)
XVECEXP (par, 0, i) = gen_rtx (USE, VOIDmode,
gen_rtx (REG, XFmode, base_reg++));
XVECEXP (par, 0, i) = gen_rtx_USE (VOIDmode,
gen_rtx_REG (XFmode, base_reg++));
emit_insn (par);
}
@ -5362,7 +5366,7 @@ arm_expand_prologue ()
if (frame_pointer_needed)
{
live_regs_mask |= 0xD800;
emit_insn (gen_movsi (gen_rtx (REG, SImode, 12),
emit_insn (gen_movsi (gen_rtx_REG (SImode, 12),
stack_pointer_rtx));
}
@ -5392,11 +5396,12 @@ arm_expand_prologue ()
{
for (reg = 23; reg > 15; reg--)
if (regs_ever_live[reg] && ! call_used_regs[reg])
emit_insn (gen_rtx (SET, VOIDmode,
gen_rtx (MEM, XFmode,
gen_rtx (PRE_DEC, XFmode,
stack_pointer_rtx)),
gen_rtx (REG, XFmode, reg)));
emit_insn (gen_rtx_SET
(VOIDmode,
gen_rtx_MEM (XFmode,
gen_rtx_PRE_DEC (XFmode,
stack_pointer_rtx)),
gen_rtx_REG (XFmode, reg)));
}
else
{
@ -5426,15 +5431,15 @@ arm_expand_prologue ()
}
if (frame_pointer_needed)
emit_insn (gen_addsi3 (hard_frame_pointer_rtx, gen_rtx (REG, SImode, 12),
emit_insn (gen_addsi3 (hard_frame_pointer_rtx, gen_rtx_REG (SImode, 12),
(GEN_INT
(-(4 + current_function_pretend_args_size)))));
if (amount != const0_rtx)
{
emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, amount));
emit_insn (gen_rtx (CLOBBER, VOIDmode,
gen_rtx (MEM, BLKmode, stack_pointer_rtx)));
emit_insn (gen_rtx_CLOBBER (VOIDmode,
gen_rtx_MEM (BLKmode, stack_pointer_rtx)));
}
/* If we are profiling, make sure no instructions are scheduled before
@ -6107,7 +6112,7 @@ aof_pic_entry (x)
{
/* This needs to persist throughout the compilation. */
end_temporary_allocation ();
aof_pic_label = gen_rtx (SYMBOL_REF, Pmode, "x$adcons");
aof_pic_label = gen_rtx_SYMBOL_REF (Pmode, "x$adcons");
resume_temporary_allocation ();
}

64
gcc/config/arm/arm.h
View File

@ -395,14 +395,23 @@ function tries to return. */
{"", TARGET_DEFAULT } \
}
#define TARGET_OPTIONS \
{ \
{"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \
{"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
{"tune=", & arm_select[3].string, "" }, \
{"fp=", & target_fp_name, "Specify the version of the floating point emulator"}, \
{ "structure-size-boundary=", & structure_size_string, \
"Specify the minumum bit alignment of structures" } \
#define TARGET_OPTIONS \
{ \
{"cpu=", \
&arm_select[1].string, \
"Specify the name of the target CPU"}, \
{"arch=", \
&arm_select[2].string, \
"Specify the name of the target architecture"}, \
{"tune=", \
&arm_select[3].string, \
"Order instructions for best performance on this CPU"}, \
{"fp=", \
&target_fp_name, \
"Specify the version of the floating point emulator"}, \
{"structure-size-boundary=", \
&structure_size_string, \
"Specify the minumum bit alignment of structures"} \
}
/* arm_select[0] is reserved for the default cpu. */
@ -1035,15 +1044,15 @@ do { \
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT && TARGET_HARD_FLOAT \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
(GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT \
? gen_rtx (REG, MODE, 16) \
: gen_rtx (REG, MODE, 0))
? gen_rtx_REG (MODE, 16) \
: gen_rtx_REG (MODE, 0))
/* 1 if N is a possible register number for a function value.
On the ARM, only r0 and f0 can return results. */
@ -1053,7 +1062,7 @@ do { \
/* How large values are returned */
/* A C expression which can inhibit the returning of certain function values
in registers, based on the type of value. */
#define RETURN_IN_MEMORY(TYPE) \
#define RETURN_IN_MEMORY(TYPE) \
(TYPE_MODE ((TYPE)) == BLKmode || \
(AGGREGATE_TYPE_P ((TYPE)) && arm_return_in_memory ((TYPE))))
@ -1082,7 +1091,7 @@ do { \
stack if necessary). */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((NAMED) \
? ((CUM) >= 16 ? 0 : gen_rtx (REG, MODE, (CUM) / 4)) \
? ((CUM) >= 16 ? 0 : gen_rtx_REG (MODE, (CUM) / 4)) \
: 0)
/* For an arg passed partly in registers and partly in memory,
@ -1275,9 +1284,9 @@ do { \
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
}
@ -1515,7 +1524,9 @@ do \
} */ \
else if (GET_MODE_CLASS (MODE) != MODE_FLOAT \
&& GET_CODE (X) == SYMBOL_REF \
&& CONSTANT_POOL_ADDRESS_P (X)) \
&& CONSTANT_POOL_ADDRESS_P (X) \
&& ! (flag_pic \
&& symbol_mentioned_p (get_pool_constant (X)))) \
goto LABEL; \
else if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_DEC) \
&& (GET_MODE_SIZE (MODE) <= 4) \
@ -1575,14 +1586,14 @@ extern struct rtx_def *legitimize_pic_address ();
n -= low_n; \
} \
base_reg = gen_reg_rtx (SImode); \
val = force_operand (gen_rtx (PLUS, SImode, xop0, \
GEN_INT (n)), NULL_RTX); \
val = force_operand (gen_rtx_PLUS (SImode, xop0, \
GEN_INT (n)), NULL_RTX); \
emit_move_insn (base_reg, val); \
(X) = (low_n == 0 ? base_reg \
: gen_rtx (PLUS, SImode, base_reg, GEN_INT (low_n))); \
: gen_rtx_PLUS (SImode, base_reg, GEN_INT (low_n))); \
} \
else if (xop0 != XEXP (X, 0) || xop1 != XEXP (x, 1)) \
(X) = gen_rtx (PLUS, SImode, xop0, xop1); \
(X) = gen_rtx_PLUS (SImode, xop0, xop1); \
} \
else if (GET_CODE (X) == MINUS) \
{ \
@ -1594,7 +1605,7 @@ extern struct rtx_def *legitimize_pic_address ();
if (CONSTANT_P (xop1) && ! symbol_mentioned_p (xop1)) \
xop1 = force_reg (SImode, xop1); \
if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \
(X) = gen_rtx (MINUS, SImode, xop0, xop1); \
(X) = gen_rtx_MINUS (SImode, xop0, xop1); \
} \
if (flag_pic) \
(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \
@ -1768,7 +1779,12 @@ extern int arm_pic_register;
#define FINALIZE_PIC arm_finalize_pic ()
#define LEGITIMATE_PIC_OPERAND_P(X) (! symbol_mentioned_p (X))
/* We can't directly access anything that contains a symbol, nor can
we indirect via the constant pool */
#define LEGITIMATE_PIC_OPERAND_P(X) \
(! symbol_mentioned_p (X) \
&& (! CONSTANT_POOL_ADDRESS_P (X) \
|| ! symbol_mentioned_p (get_pool_constant (X))))
@ -2041,7 +2057,7 @@ do { \
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT == 0) \
? gen_rtx (MEM, Pmode, plus_constant (FRAME, -4)) \
? gen_rtx_MEM (Pmode, plus_constant (FRAME, -4)) \
: NULL_RTX)
/* Used to mask out junk bits from the return address, such as

85
gcc/config/arm/arm.md
View File

@ -1298,8 +1298,8 @@
rtx op1 = gen_reg_rtx (SImode);
emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
emit_insn (gen_iorsi3 (op1, gen_rtx (LSHIFTRT, SImode, operands[0],
operands[1]),
emit_insn (gen_iorsi3 (op1, gen_rtx_LSHIFTRT (SImode, operands[0],
operands[1]),
op0));
emit_insn (gen_rotlsi3 (subtarget, op1, operands[1]));
}
@ -1315,8 +1315,8 @@
emit_insn (gen_ashlsi3 (op0, operands[3], GEN_INT (32 - width)));
emit_insn (gen_ashlsi3 (op1, operands[0], operands[1]));
emit_insn (gen_iorsi3 (subtarget,
gen_rtx (LSHIFTRT, SImode, op1,
operands[1]), op0));
gen_rtx_LSHIFTRT (SImode, op1, operands[1]),
op0));
}
else
{
@ -1353,13 +1353,13 @@
}
if (start_bit != 0)
op0 = gen_rtx (ASHIFT, SImode, op0, operands[2]);
op0 = gen_rtx_ASHIFT (SImode, op0, operands[2]);
emit_insn (gen_andsi_notsi_si (op2, operands[0], op0));
}
if (start_bit != 0)
op1 = gen_rtx (ASHIFT, SImode, op1, operands[2]);
op1 = gen_rtx_ASHIFT (SImode, op1, operands[2]);
emit_insn (gen_iorsi3 (subtarget, op1, op2));
}
@ -2187,8 +2187,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (ZERO_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_ZERO_EXTEND (SImode, operands[1])));
DONE;
}
if (TARGET_SHORT_BY_BYTES && GET_CODE (operands[1]) == MEM)
@ -2289,8 +2289,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
@ -2318,10 +2318,10 @@
rtx mem1, mem2;
rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
mem1 = gen_rtx (MEM, QImode, addr);
mem1 = gen_rtx_MEM (QImode, addr);
MEM_COPY_ATTRIBUTES (mem1, operands[1]);
RTX_UNCHANGING_P (mem1) = RTX_UNCHANGING_P (operands[1]);
mem2 = gen_rtx (MEM, QImode, plus_constant (addr, 1));
mem2 = gen_rtx_MEM (QImode, plus_constant (addr, 1));
MEM_COPY_ATTRIBUTES (mem2, operands[1]);
RTX_UNCHANGING_P (mem2) = RTX_UNCHANGING_P (operands[1]);
operands[0] = gen_lowpart (SImode, operands[0]);
@ -2393,8 +2393,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, HImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (HImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
@ -2429,8 +2429,8 @@
{
HOST_WIDE_INT offset;
operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]));
operands[2] = gen_rtx (MEM, QImode, operands[3]);
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]));
operands[2] = gen_rtx_MEM (QImode, operands[3]);
MEM_COPY_ATTRIBUTES (operands[2], operands[1]);
RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]);
operands[1] = XEXP (operands[1], 0);
@ -2448,8 +2448,9 @@
else if (GET_CODE (operands[1]) == PLUS
&& GET_CODE (XEXP (operands[1], 1)) != CONST_INT
&& ! s_register_operand (XEXP (operands[1], 1), VOIDmode))
operands[1] = gen_rtx (PLUS, GET_MODE (operands[1]),
XEXP (operands[1], 1), XEXP (operands[1], 0));
operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]),
XEXP (operands[1], 1),
XEXP (operands[1], 0));
}
")
@ -2465,8 +2466,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SIGN_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
@ -2500,7 +2501,7 @@
{
HOST_WIDE_INT offset;
operands[2] = gen_rtx (MEM, QImode, operands[0]);
operands[2] = gen_rtx_MEM (QImode, operands[0]);
MEM_COPY_ATTRIBUTES (operands[2], operands[1]);
RTX_UNCHANGING_P (operands[2]) = RTX_UNCHANGING_P (operands[1]);
operands[1] = XEXP (operands[1], 0);
@ -2518,8 +2519,9 @@
else if (GET_CODE (operands[1]) == PLUS
&& GET_CODE (XEXP (operands[1], 1)) != CONST_INT
&& ! s_register_operand (XEXP (operands[1], 1), VOIDmode))
operands[1] = gen_rtx (PLUS, GET_MODE (operands[1]),
XEXP (operands[1], 1), XEXP (operands[1], 0));
operands[1] = gen_rtx_PLUS (GET_MODE (operands[1]),
XEXP (operands[1], 1),
XEXP (operands[1], 0));
}
")
@ -2898,7 +2900,7 @@
}
emit_insn (gen_movsi (reg, GEN_INT (val)));
operands[1] = gen_rtx (SUBREG, HImode, reg, 0);
operands[1] = gen_rtx_SUBREG (HImode, reg, 0);
}
else if (! arm_arch4)
{
@ -2919,8 +2921,8 @@
HOST_WIDE_INT new_offset = INTVAL (offset) & ~2;
rtx new;
new = gen_rtx (MEM, SImode,
plus_constant (base, new_offset));
new = gen_rtx_MEM (SImode,
plus_constant (base, new_offset));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_movsi (reg, new));
@ -2955,17 +2957,18 @@
if ((INTVAL (offset) & 2) == 2)
{
HOST_WIDE_INT new_offset = INTVAL (offset) ^ 2;
new = gen_rtx (MEM, SImode,
plus_constant (base, new_offset));
new = gen_rtx_MEM (SImode,
plus_constant (base, new_offset));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_movsi (reg, new));
}
else
{
new = gen_rtx (MEM, SImode, XEXP (operands[1], 0));
new = gen_rtx_MEM (SImode, XEXP (operands[1], 0));
MEM_COPY_ATTRIBUTES (new, operands[1]);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (operands[1]);
RTX_UNCHANGING_P (new)
= RTX_UNCHANGING_P (operands[1]);
emit_insn (gen_rotated_loadsi (reg, new));
}
@ -2990,7 +2993,7 @@
if (GET_CODE (operands[0]) != REG)
abort ();
operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
DONE;
}
@ -3007,7 +3010,7 @@
rtx ops[2];
ops[0] = operands[0];
ops[1] = gen_rtx (MEM, SImode, plus_constant (XEXP (operands[1], 0), 2));
ops[1] = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[1], 0), 2));
output_asm_insn (\"ldr%?\\t%0, %1\\t%@ load-rotate\", ops);
return \"\";
}"
@ -3025,10 +3028,10 @@
rtx mem1, mem2;
rtx addr = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
mem1 = gen_rtx (MEM, QImode, addr);
mem1 = gen_rtx_MEM (QImode, addr);
MEM_COPY_ATTRIBUTES (mem1, operands[1]);
RTX_UNCHANGING_P (mem1) = RTX_UNCHANGING_P (operands[1]);
mem2 = gen_rtx (MEM, QImode, plus_constant (addr, 1));
mem2 = gen_rtx_MEM (QImode, plus_constant (addr, 1));
MEM_COPY_ATTRIBUTES (mem2, operands[1]);
RTX_UNCHANGING_P (mem2) = RTX_UNCHANGING_P (operands[1]);
operands[0] = gen_lowpart (SImode, operands[0]);
@ -3163,7 +3166,7 @@
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_movsi (reg, operands[1]));
operands[1] = gen_rtx (SUBREG, QImode, reg, 0);
operands[1] = gen_rtx_SUBREG (QImode, reg, 0);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
@ -3251,8 +3254,8 @@
operands[2] = XEXP (operands[0], 0);
else if (code == POST_INC || code == PRE_DEC)
{
operands[0] = gen_rtx (SUBREG, DImode, operands[0], 0);
operands[1] = gen_rtx (SUBREG, DImode, operands[1], 0);
operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0);
operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0);
emit_insn (gen_movdi (operands[0], operands[1]));
DONE;
}
@ -3268,8 +3271,8 @@
emit_insn (gen_addsi3 (operands[2], XEXP (XEXP (operands[0], 0), 0),
XEXP (XEXP (operands[0], 0), 1)));
emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (MEM, DFmode, operands[2]),
operands[1]));
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_MEM (DFmode, operands[2]),
operands[1]));
if (code == POST_DEC)
emit_insn (gen_addsi3 (operands[2], operands[2], GEN_INT (-8)));
@ -6140,8 +6143,8 @@
enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2],
operands[3]);
operands[6] = gen_rtx (REG, mode, 24);
operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]);
operands[6] = gen_rtx_REG (mode, 24);
operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
}
")