testsuite: aarch64: Add tests for v[q]mov[u]n_high intrinsics
Add tests for v[q]mov[u]n_high Neon intrinsics. Since these intrinsics are only supported for AArch64, these tests are restricted to only run on AArch64 targets. gcc/testsuite/ChangeLog: 2021-03-02 Jonathan Wright <jonathan.wright@arm.com> * gcc.target/aarch64/advsimd-intrinsics/vmovn_high.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vqmovn_high.c: New test. * gcc.target/aarch64/advsimd-intrinsics/vqmovun_high.c: New test.
This commit is contained in:
Jonathan Wright
parent
fd85814c4b
commit
3a0fbf7604
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/* { dg-skip-if "" { arm*-*-* } } */
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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/* Expected results. */
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VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0xf0, 0xf1, 0xf2, 0xf3,
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0xf4, 0xf5, 0xf6, 0xf7 };
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VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0xfff0, 0xfff1, 0xfff2, 0xfff3 };
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VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0xfffffff0, 0xfffffff1 };
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VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0xf0, 0xf1, 0xf2, 0xf3,
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0xf4, 0xf5, 0xf6, 0xf7 };
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VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0xfff0, 0xfff1, 0xfff2, 0xfff3 };
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VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0xfffffff0, 0xfffffff1 };
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#define TEST_MSG "VMOVN_HIGH"
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void exec_vmovn_high (void)
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{
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/* Basic test: vec128_r=vmovn_high(vec64_r, vec128_x), store the result. */
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#define TEST_VMOVN_HIGH(T1, T2, W1, W2, N1, N2) \
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VECT_VAR(vec128_r, T1, W2, N2) = \
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vmovn_high_##T2##W1(VECT_VAR(vec64_r, T1, W2, N1), \
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VECT_VAR(vec128_x, T1, W1, N1)); \
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vst1q_##T2##W2(VECT_VAR(result, T1, W2, N2), VECT_VAR(vec128_r, T1, W2, N2))
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DECL_VARIABLE_128BITS_VARIANTS(vec128_r);
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DECL_VARIABLE_64BITS_VARIANTS(vec64_r);
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DECL_VARIABLE_128BITS_VARIANTS(vec128_x);
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clean_results ();
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/* Fill vec64_r with a value easy to recognise in the result vector. */
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VDUP(vec64_r, , int, s, 8, 8, 0x5);
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VDUP(vec64_r, , int, s, 16, 4, 0x5);
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VDUP(vec64_r, , int, s, 32, 2, 0x5);
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VDUP(vec64_r, , uint, u, 8, 8, 0x5);
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VDUP(vec64_r, , uint, u, 16, 4, 0x5);
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VDUP(vec64_r, , uint, u, 32, 2, 0x5);
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VLOAD(vec128_x, buffer, q, int, s, 16, 8);
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VLOAD(vec128_x, buffer, q, int, s, 32, 4);
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VLOAD(vec128_x, buffer, q, int, s, 64, 2);
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VLOAD(vec128_x, buffer, q, uint, u, 16, 8);
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VLOAD(vec128_x, buffer, q, uint, u, 32, 4);
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VLOAD(vec128_x, buffer, q, uint, u, 64, 2);
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TEST_VMOVN_HIGH(int, s, 16, 8, 8, 16);
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TEST_VMOVN_HIGH(int, s, 32, 16, 4, 8);
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TEST_VMOVN_HIGH(int, s, 64, 32, 2, 4);
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TEST_VMOVN_HIGH(uint, u, 16, 8, 8, 16);
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TEST_VMOVN_HIGH(uint, u, 32, 16, 4, 8);
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TEST_VMOVN_HIGH(uint, u, 64, 32, 2, 4);
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CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
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CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
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CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
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}
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int main (void)
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{
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exec_vmovn_high ();
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return 0;
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}
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/* { dg-skip-if "" { arm*-*-* } } */
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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/* Expected results. */
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VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0x12, 0x12, 0x12, 0x12,
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0x12, 0x12, 0x12, 0x12 };
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VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0x1278, 0x1278, 0x1278, 0x1278 };
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VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0x12345678, 0x12345678 };
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VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0x82, 0x82, 0x82, 0x82,
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0x82, 0x82, 0x82, 0x82 };
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VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0x8765, 0x8765, 0x8765, 0x8765 };
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VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x87654321, 0x87654321 };
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/* Expected results when saturation occurs. */
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VECT_VAR_DECL(expected1, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0x7f, 0x7f, 0x7f, 0x7f,
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0x7f, 0x7f, 0x7f, 0x7f };
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VECT_VAR_DECL(expected1, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0x7fff, 0x7fff, 0x7fff, 0x7fff };
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VECT_VAR_DECL(expected1, int, 32, 4) [] = { 0x5, 0x5, 0x7fffffff, 0x7fffffff };
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VECT_VAR_DECL(expected1, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff };
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VECT_VAR_DECL(expected1, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0xffff, 0xffff, 0xffff, 0xffff };
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VECT_VAR_DECL(expected1, uint, 32, 4) [] = { 0x5, 0x5,
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0xffffffff, 0xffffffff };
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#define TEST_MSG "VQMOVN_HIGH"
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void exec_vqmovn_high (void)
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{
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/* Basic test: vec128_r=vqmovn_high(vec64_r,vec128_x), store the result. */
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#define TEST_VQMOVN_HIGH(T1, T2, W1, W2, N1, N2, CMT) \
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Set_Neon_Cumulative_Sat(0, VECT_VAR(vec128_r, T1, W1, N2)); \
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VECT_VAR(vec128_r, T1, W1, N2) = \
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vqmovn_high_##T2##W2(VECT_VAR(vec64_r, T1, W1, N1), \
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VECT_VAR(vec128_x, T1, W2, N1)); \
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vst1q##_##T2##W1(VECT_VAR(result, T1, W1, N2), \
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VECT_VAR(vec128_r, T1, W1, N2))
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DECL_VARIABLE_128BITS_VARIANTS(vec128_r);
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DECL_VARIABLE_64BITS_VARIANTS(vec64_r);
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DECL_VARIABLE_128BITS_VARIANTS(vec128_x);
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clean_results ();
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/* Fill vec64_r with a value easy to recognise in the result vector. */
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VDUP(vec64_r, , int, s, 8, 8, 0x5);
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VDUP(vec64_r, , int, s, 16, 4, 0x5);
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VDUP(vec64_r, , int, s, 32, 2, 0x5);
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VDUP(vec64_r, , uint, u, 8, 8, 0x5);
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VDUP(vec64_r, , uint, u, 16, 4, 0x5);
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VDUP(vec64_r, , uint, u, 32, 2, 0x5);
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/* Fill input vector with arbitrary values. */
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VDUP(vec128_x, q, int, s, 16, 8, 0x12);
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VDUP(vec128_x, q, int, s, 32, 4, 0x1278);
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VDUP(vec128_x, q, int, s, 64, 2, 0x12345678);
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VDUP(vec128_x, q, uint, u, 16, 8, 0x82);
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VDUP(vec128_x, q, uint, u, 32, 4, 0x8765);
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VDUP(vec128_x, q, uint, u, 64, 2, 0x87654321);
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#define CMT ""
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TEST_VQMOVN_HIGH(int, s, 8, 16, 8, 16, CMT);
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TEST_VQMOVN_HIGH(int, s, 16, 32, 4, 8, CMT);
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TEST_VQMOVN_HIGH(int, s, 32, 64, 2, 4, CMT);
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TEST_VQMOVN_HIGH(uint, u, 8, 16, 8, 16, CMT);
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TEST_VQMOVN_HIGH(uint, u, 16, 32, 4, 8, CMT);
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TEST_VQMOVN_HIGH(uint, u, 32, 64, 2, 4, CMT);
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CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
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CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
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CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
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/* Fill input vector with arbitrary values which cause cumulative
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saturation. */
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VDUP(vec128_x, q, int, s, 16, 8, 0x1234);
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VDUP(vec128_x, q, int, s, 32, 4, 0x12345678);
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VDUP(vec128_x, q, int, s, 64, 2, 0x1234567890ABLL);
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VDUP(vec128_x, q, uint, u, 16, 8, 0x8234);
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VDUP(vec128_x, q, uint, u, 32, 4, 0x87654321);
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VDUP(vec128_x, q, uint, u, 64, 2, 0x8765432187654321ULL);
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#undef CMT
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#define CMT " (with saturation)"
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TEST_VQMOVN_HIGH(int, s, 8, 16, 8, 16, CMT);
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TEST_VQMOVN_HIGH(int, s, 16, 32, 4, 8, CMT);
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TEST_VQMOVN_HIGH(int, s, 32, 64, 2, 4, CMT);
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TEST_VQMOVN_HIGH(uint, u, 8, 16, 8, 16, CMT);
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TEST_VQMOVN_HIGH(uint, u, 16, 32, 4, 8, CMT);
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TEST_VQMOVN_HIGH(uint, u, 32, 64, 2, 4, CMT);
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CHECK(TEST_MSG, int, 8, 16, PRIx8, expected1, CMT);
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CHECK(TEST_MSG, int, 16, 8, PRIx16, expected1, CMT);
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CHECK(TEST_MSG, int, 32, 4, PRIx32, expected1, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected1, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected1, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected1, CMT);
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}
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int main (void)
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{
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exec_vqmovn_high ();
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return 0;
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}
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@ -0,0 +1,91 @@
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/* { dg-skip-if "" { arm*-*-* } } */
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#include <arm_neon.h>
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#include "arm-neon-ref.h"
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#include "compute-ref-data.h"
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/* Expected results. */
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VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0x34, 0x34, 0x34, 0x34,
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0x34, 0x34, 0x34, 0x34 };
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VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5678, 0x5678, 0x5678, 0x5678 };
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VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x12345678, 0x12345678 };
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/* Expected results with negative input. */
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VECT_VAR_DECL(expected_neg, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
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0x5, 0x5, 0x5, 0x5,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
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0x0, 0x0, 0x0, 0x0 };
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VECT_VAR_DECL(expected_neg, uint, 32, 4) [] = { 0x5, 0x5, 0x0, 0x0 };
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#define TEST_MSG "VQMOVUN_HIGH"
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void exec_vqmovun_high (void)
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{
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/* Basic test: vec128_r=vqmovun_high(vec64)_r, vec128_x), store result. */
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#define TEST_VQMOVUN_HIGH(T1, T2, W1, W2, N1, N2, CMT) \
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Set_Neon_Cumulative_Sat(0, VECT_VAR(vec128_r, T1, W1, N2)); \
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VECT_VAR(vec128_r, T1, W1, N2) = \
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vqmovun_high_s##W2(VECT_VAR(vec64_r, uint, W1, N1), \
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VECT_VAR(vec128_x, int, W2, N1)); \
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vst1q##_u##W1(VECT_VAR(result, T1, W1, N2), VECT_VAR(vec128_r, T1, W1, N2))
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DECL_VARIABLE(vec64_r, uint, 8, 8);
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DECL_VARIABLE(vec64_r, uint, 16, 4);
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DECL_VARIABLE(vec64_r, uint, 32, 2);
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DECL_VARIABLE(vec128_x, int, 16, 8);
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DECL_VARIABLE(vec128_x, int, 32, 4);
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DECL_VARIABLE(vec128_x, int, 64, 2);
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DECL_VARIABLE(vec128_r, uint, 8, 16);
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DECL_VARIABLE(vec128_r, uint, 16, 8);
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DECL_VARIABLE(vec128_r, uint, 32, 4);
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clean_results ();
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/* Fill vec64_r with a value easy to recognise in the result vector. */
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VDUP(vec64_r, , uint, u, 8, 8, 0x5);
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VDUP(vec64_r, , uint, u, 16, 4, 0x5);
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VDUP(vec64_r, , uint, u, 32, 2, 0x5);
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/* Fill input vector with arbitrary values. */
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VDUP(vec128_x, q, int, s, 16, 8, 0x34);
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VDUP(vec128_x, q, int, s, 32, 4, 0x5678);
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VDUP(vec128_x, q, int, s, 64, 2, 0x12345678);
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#define CMT ""
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TEST_VQMOVUN_HIGH(uint, u, 8, 16, 8, 16, CMT);
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TEST_VQMOVUN_HIGH(uint, u, 16, 32, 4, 8, CMT);
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TEST_VQMOVUN_HIGH(uint, u, 32, 64, 2, 4, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
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/* Fill input vector with negative values. */
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VDUP(vec128_x, q, int, s, 16, 8, 0x8234);
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VDUP(vec128_x, q, int, s, 32, 4, 0x87654321);
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VDUP(vec128_x, q, int, s, 64, 2, 0x8765432187654321LL);
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#undef CMT
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#define CMT " (negative input)"
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TEST_VQMOVUN_HIGH(uint, u, 8, 16, 8, 16, CMT);
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TEST_VQMOVUN_HIGH(uint, u, 16, 32, 4, 8, CMT);
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TEST_VQMOVUN_HIGH(uint, u, 32, 64, 2, 4, CMT);
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CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
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CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
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}
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int main (void)
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{
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exec_vqmovun_high ();
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return 0;
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}
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