(extendsidi2): Use lwa_operand predicate.
(sign_extend load with update): New PowerPC64 pattern. From-SVN: r8587
This commit is contained in:
parent
5c30aff875
commit
287f13ffdd
@ -422,7 +422,7 @@
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
|
||||
(sign_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "m,r")))]
|
||||
(sign_extend:DI (match_operand:SI 1 "lwa_operand" "m,r")))]
|
||||
"TARGET_POWERPC64"
|
||||
"@
|
||||
lwa%U1%X1 %0,%1
|
||||
@ -4284,6 +4284,17 @@
|
||||
ldu %3,%2(%0)"
|
||||
[(set_attr "type" "load")])
|
||||
|
||||
(define_insn ""
|
||||
[(set (match_operand:DI 3 "gpc_reg_operand" "=r")
|
||||
(sign_extend:DI
|
||||
(mem:SI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "0")
|
||||
(match_operand:DI 2 "gpc_reg_operand" "r")))))
|
||||
(set (match_operand:DI 0 "gpc_reg_operand" "=b")
|
||||
(plus:DI (match_dup 1) (match_dup 2)))]
|
||||
"TARGET_POWERPC64"
|
||||
"lwaux %3,%0,%2"
|
||||
[(set_attr "type" "load")])
|
||||
|
||||
(define_insn ""
|
||||
[(set (mem:DI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "0,0")
|
||||
(match_operand:DI 2 "reg_or_short_operand" "r,I")))
|
||||
|
Loading…
Reference in New Issue
Block a user