AArch64 Support BFXIL in backend
From-SVN: r200595
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@ -1,3 +1,7 @@
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2013-07-02 Ian Bolton <ian.bolton@arm.com>
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* config/aarch64/aarch64.md (*extr_insv_reg<mode>): New pattern.
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2013-07-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit
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@ -3225,6 +3225,21 @@
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(set_attr "mode" "<MODE>")]
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)
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(define_insn "*extr_insv_lower_reg<mode>"
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[(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
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(match_operand 1 "const_int_operand" "n")
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(const_int 0))
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(zero_extract:GPI (match_operand:GPI 2 "register_operand" "+r")
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(match_dup 1)
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(match_operand 3 "const_int_operand" "n")))]
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"!(UINTVAL (operands[1]) == 0
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|| (UINTVAL (operands[3]) + UINTVAL (operands[1])
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> GET_MODE_BITSIZE (<MODE>mode)))"
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"bfxil\\t%<w>0, %<w>2, %3, %1"
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[(set_attr "v8type" "bfm")
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(set_attr "mode" "<MODE>")]
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)
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(define_insn "*<optab><ALLX:mode>_shft_<GPI:mode>"
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[(set (match_operand:GPI 0 "register_operand" "=r")
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(ashift:GPI (ANY_EXTEND:GPI
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@ -1,3 +1,8 @@
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2013-07-02 Ian Bolton <ian.bolton@arm.com>
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* gcc.target/aarch64/bfxil_1.c: New test.
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* gcc.target/aarch64/bfxil_2.c: Likewise.
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2013-07-01 Balaji V. Iyer <balaji.v.iyer@intel.com>
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PR c/57766
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40
gcc/testsuite/gcc.target/aarch64/bfxil_1.c
Normal file
40
gcc/testsuite/gcc.target/aarch64/bfxil_1.c
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@ -0,0 +1,40 @@
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/* { dg-do run { target aarch64*-*-* } } */
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/* { dg-options "-O2 --save-temps -fno-inline" } */
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/* { dg-require-effective-target aarch64_little_endian } */
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extern void abort (void);
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typedef struct bitfield
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{
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unsigned short eight1: 8;
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unsigned short four: 4;
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unsigned short eight2: 8;
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unsigned short seven: 7;
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unsigned int sixteen: 16;
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} bitfield;
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bitfield
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bfxil (bitfield a)
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{
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/* { dg-final { scan-assembler "bfxil\tx\[0-9\]+, x\[0-9\]+, 16, 8" } } */
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a.eight1 = a.eight2;
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return a;
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}
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int
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main (void)
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{
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static bitfield a;
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bitfield b;
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a.eight1 = 9;
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a.eight2 = 57;
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b = bfxil (a);
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if (b.eight1 != a.eight2)
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abort ();
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return 0;
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}
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/* { dg-final { cleanup-saved-temps } } */
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42
gcc/testsuite/gcc.target/aarch64/bfxil_2.c
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42
gcc/testsuite/gcc.target/aarch64/bfxil_2.c
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@ -0,0 +1,42 @@
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/* { dg-do run { target aarch64*-*-* } } */
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/* { dg-options "-O2 --save-temps -fno-inline" } */
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/* { dg-require-effective-target aarch64_big_endian } */
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extern void abort (void);
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typedef struct bitfield
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{
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unsigned short eight1: 8;
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unsigned short four: 4;
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unsigned short eight2: 8;
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unsigned short seven: 7;
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unsigned int sixteen: 16;
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unsigned short eight3: 8;
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unsigned short eight4: 8;
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} bitfield;
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bitfield
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bfxil (bitfield a)
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{
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/* { dg-final { scan-assembler "bfxil\tx\[0-9\]+, x\[0-9\]+, 40, 8" } } */
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a.eight4 = a.eight2;
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return a;
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}
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int
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main (void)
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{
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static bitfield a;
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bitfield b;
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a.eight4 = 9;
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a.eight2 = 57;
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b = bfxil (a);
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if (b.eight4 != a.eight2)
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abort ();
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return 0;
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}
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/* { dg-final { cleanup-saved-temps } } */
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