[rs6000] Make load cost a bit more in vectorization cost

To align with rs6000_insn_cost costing more for load type insns,
this patch is to make load insns cost more in vectorization cost
function.  The latency of load insns is about twice that of
"simple" instructions; 2 vs. 1 on older cores, and 4 (or so) vs.
2 on newer cores.  Considering that the result of load usually
is used somehow later (true-dep) but store won't, we keep the
store as before.

The SPEC2017 performance evaluation on Power8 shows 525.x264_r
+9.56%, 511.povray_r +2.08%, 527.cam4_r 1.16% gains, no 
significant degradation, SPECINT geomean +0.88%, SPECFP geomean
+0.26%.

The SPEC2017 performance evaluation on Power9 shows no significant
improvement or degradation, SPECINT geomean +0.04%, SPECFP geomean
+0.04%.

The SPEC2006 performance evaluation on Power8 shows 454.calculix
+4.41% gain but 416.gamess -1.19% and 453.povray -3.83% degradation.
I looked into the two degradation bmks, the degradation were NOT
due to hotspot changes by vectorization, were all side effects.
SPECINT geomean +0.10%, SPECFP geomean no changed considering
the degradation.

gcc/ChangeLog

2019-11-11  Kewen Lin  <linkw@gcc.gnu.org>

    * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Make
    scalar_load, vector_load, unaligned_load and vector_gather_load cost
    more to conform hardware latency and insn cost settings.

From-SVN: r278033
This commit is contained in:
Kewen Lin 2019-11-11 05:08:20 +00:00
parent 4b41bff297
commit 103cba80bd
2 changed files with 42 additions and 31 deletions

View File

@ -1,3 +1,10 @@
2019-11-11 Kewen Lin <linkw@gcc.gnu.org>
* config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost):
Make scalar_load, vector_load, unaligned_load and
vector_gather_load cost more to conform hardware latency and
insn cost settings.
2019-11-10 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.h (MACHO_SYMBOL_FLAG_LINKER_VIS): New.

View File

@ -4783,15 +4783,17 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
switch (type_of_cost)
{
case scalar_stmt:
case scalar_load:
case scalar_store:
case vector_stmt:
case vector_load:
case vector_store:
case vec_to_scalar:
case scalar_to_vec:
case cond_branch_not_taken:
return 1;
case scalar_load:
case vector_load:
/* Like rs6000_insn_cost, make load insns cost a bit more. */
return 2;
case vec_perm:
/* Power7 has only one permute unit, make it a bit expensive. */
@ -4812,42 +4814,44 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
case unaligned_load:
case vector_gather_load:
/* Like rs6000_insn_cost, make load insns cost a bit more. */
if (TARGET_EFFICIENT_UNALIGNED_VSX)
return 1;
return 2;
if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN)
{
elements = TYPE_VECTOR_SUBPARTS (vectype);
if (elements == 2)
/* Double word aligned. */
return 2;
if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN)
{
elements = TYPE_VECTOR_SUBPARTS (vectype);
if (elements == 2)
/* Double word aligned. */
return 4;
if (elements == 4)
{
switch (misalign)
{
case 8:
/* Double word aligned. */
return 2;
if (elements == 4)
{
switch (misalign)
{
case 8:
/* Double word aligned. */
return 4;
case -1:
/* Unknown misalignment. */
case 4:
case 12:
/* Word aligned. */
return 22;
case -1:
/* Unknown misalignment. */
case 4:
case 12:
/* Word aligned. */
return 33;
default:
gcc_unreachable ();
}
}
}
default:
gcc_unreachable ();
}
}
}
if (TARGET_ALTIVEC)
/* Misaligned loads are not supported. */
gcc_unreachable ();
if (TARGET_ALTIVEC)
/* Misaligned loads are not supported. */
gcc_unreachable ();
return 2;
/* Like rs6000_insn_cost, make load insns cost a bit more. */
return 4;
case unaligned_store:
case vector_scatter_store: