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updates for 2.3

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From-SVN: r2448
This commit is contained in:
Chris Smith 1992-10-14 01:27:21 +00:00
parent 2c16c66660
commit 0bd2462c23
2 changed files with 29 additions and 9 deletions
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13
gcc/config/convex/convex.h
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@ -96,6 +96,11 @@ extern char *output_call ();
#define TARGET_DEFAULT 0 #define TARGET_DEFAULT 0
#endif #endif
/* Convex ships /tmp as a separate file system - thus it
usually has more free space than /usr/tmp */
#define P_tmpdir "/tmp/"
/* Allow $ in identifiers. */ /* Allow $ in identifiers. */
#define DOLLARS_IN_IDENTIFIERS 2 #define DOLLARS_IN_IDENTIFIERS 2
@ -399,7 +404,7 @@ enum reg_class {
/* The standard Convex call, with arg count word, includes popping the /* The standard Convex call, with arg count word, includes popping the
args as part of the call template. We optionally omit the arg count args as part of the call template. We optionally omit the arg count
word and let gcc combine the arg pops. */ word and let gcc combine the arg pops. */
#define RETURN_POPS_ARGS(FUNTYPE,SIZE) (TARGET_ARGCOUNT) #define RETURN_POPS_ARGS(FUNTYPE, SIZE) (TARGET_ARGCOUNT ? (SIZE) : 0)
/* Define how to find the value returned by a function. /* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree). VALTYPE is the data type of the value (as a tree).
@ -841,6 +846,12 @@ enum reg_class {
#define ASM_APP_OFF ";NO_APP\n" #define ASM_APP_OFF ";NO_APP\n"
/* Output something following the gcc2_compiled tag to keep that label from
hiding a real function name for tools like adb and prof. */
#define ASM_IDENTIFY_GCC(FILE) \
fprintf (FILE, "gcc2_compiled.:\n\tds.h 0\n");
/* Alignment with Convex's assembler goes like this: /* Alignment with Convex's assembler goes like this:
.text can be .aligned up to a halfword. .text can be .aligned up to a halfword.
.data and .bss can be .aligned up to a longword. .data and .bss can be .aligned up to a longword.

25
gcc/config/convex/convex.md
View File

@ -714,7 +714,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (match_operand:DI 1 "register_operand" "%0") (and:DI (match_operand:DI 1 "register_operand" "%0")
(match_operand:DI 2 "immediate_operand" "Fn")))] (match_operand:DI 2 "immediate_operand" "Fn")))]
"GET_CODE (operands[2]) == CONST_INT "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
|| (GET_CODE (operands[2]) == CONST_DOUBLE || (GET_CODE (operands[2]) == CONST_DOUBLE
&& CONST_DOUBLE_HIGH (operands[2]) == -1)" && CONST_DOUBLE_HIGH (operands[2]) == -1)"
"and %2,%0") "and %2,%0")
@ -753,7 +753,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(ior:DI (match_operand:DI 1 "register_operand" "%0") (ior:DI (match_operand:DI 1 "register_operand" "%0")
(match_operand:DI 2 "immediate_operand" "Fn")))] (match_operand:DI 2 "immediate_operand" "Fn")))]
"GET_CODE (operands[2]) == CONST_INT "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 0)
|| (GET_CODE (operands[2]) == CONST_DOUBLE || (GET_CODE (operands[2]) == CONST_DOUBLE
&& CONST_DOUBLE_HIGH (operands[2]) == 0)" && CONST_DOUBLE_HIGH (operands[2]) == 0)"
"or %2,%0") "or %2,%0")
@ -792,7 +792,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(xor:DI (match_operand:DI 1 "register_operand" "%0") (xor:DI (match_operand:DI 1 "register_operand" "%0")
(match_operand:DI 2 "immediate_operand" "Fn")))] (match_operand:DI 2 "immediate_operand" "Fn")))]
"GET_CODE (operands[2]) == CONST_INT "(GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 0)
|| (GET_CODE (operands[2]) == CONST_DOUBLE || (GET_CODE (operands[2]) == CONST_DOUBLE
&& CONST_DOUBLE_HIGH (operands[2]) == 0)" && CONST_DOUBLE_HIGH (operands[2]) == 0)"
"xor %2,%0") "xor %2,%0")
@ -1032,9 +1032,18 @@
if (GET_CODE (operands[2]) == CONST_INT) if (GET_CODE (operands[2]) == CONST_INT)
{ {
int rshift = INTVAL (operands[2]); int rshift = INTVAL (operands[2]);
operands[3] = if (rshift < 0)
force_reg (DImode, immed_double_const (1 << (63 - rshift), operands[3] = force_reg (DImode, immed_double_const (0, 0, DImode));
1 << (31 - rshift), DImode)); else if (rshift < 32)
operands[3] =
force_reg (DImode,
immed_double_const (0, 1 << (31 - rshift), DImode));
else if (rshift < 64)
operands[3] =
force_reg (DImode,
immed_double_const (1 << (63 - rshift), 0, DImode));
else
operands[3] = force_reg (DImode, immed_double_const (0, 0, DImode));
} }
else else
{ {
@ -1291,14 +1300,14 @@
(define_insn "call" (define_insn "call"
[(call (match_operand:QI 0 "memory_operand" "m") [(call (match_operand:QI 0 "memory_operand" "m")
(match_operand:SI 1 "general_operand" "g"))] (match_operand 1 "" "g"))]
"" ""
"* return output_call (insn, operands[0], operands[1]);") "* return output_call (insn, operands[0], operands[1]);")
(define_insn "call_value" (define_insn "call_value"
[(set (match_operand 0 "" "=g") [(set (match_operand 0 "" "=g")
(call (match_operand:QI 1 "memory_operand" "m") (call (match_operand:QI 1 "memory_operand" "m")
(match_operand:SI 2 "general_operand" "g")))] (match_operand 2 "" "g")))]
"" ""
"* return output_call (insn, operands[1], operands[2]);") "* return output_call (insn, operands[1], operands[2]);")