X86 disassembler checks data and address size prefixes when displaying instruction mnemonic and operands. For the extra data and address size prefixes, their names depend only on the address mode, not the data and address size prefixes. This patch changes x86 disassembler not to check the data and address size prefix when printing extra data and address size prefixes. gas/testsuite/ * gas/i386/nops-1-core2.d: Replace data32 with data16. * gas/i386/nops-4a-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/x86-64-cbw-intel.d: Likewise. * gas/i386/x86-64-cbw.d: Likewise. * gas/i386/x86-64-io-intel.d: Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/x86-64-stack-intel.d: Likewise. * gas/i386/x86-64-stack-suffix.d: Likewise. * gas/i386/x86-64-stack.d: Likewise. * gas/i386/ilp32/x86-64-cbw-intel.d: Likewise. * gas/i386/ilp32/x86-64-cbw.d: Likewise. * gas/i386/ilp32/x86-64-io-intel.d: Likewise. * gas/i386/ilp32/x86-64-io-suffix.d: Likewise. * gas/i386/ilp32/x86-64-io.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.: Likewise. * gas/i386/ilp32/x86-64-stack-intel.d: Likewise. * gas/i386/ilp32/x86-64-stack-suffix.: Likewise. * gas/i386/ilp32/x86-64-stack.d: Likewise. ld/testsuite/ * ld-x86-64/tlsbin.dd: Replace data32 with data16. * ld-x86-64/tlsdesc-nacl.pd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlsld1.dd: Likewise. * ld-x86-64/tlsld3.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. opcodes/ 2014-05-09 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (ADDR16_PREFIX): Removed. (ADDR32_PREFIX): Likewise. (DATA16_PREFIX): Likewise. (DATA32_PREFIX): Likewise. (prefix_name): Updated. (print_insn): Simplify data and address size prefixes processing.
292 lines
9.1 KiB
Plaintext
292 lines
9.1 KiB
Plaintext
2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (ADDR16_PREFIX): Removed.
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(ADDR32_PREFIX): Likewise.
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(DATA16_PREFIX): Likewise.
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(DATA32_PREFIX): Likewise.
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(prefix_name): Updated.
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(print_insn): Simplify data and address size prefixes processing.
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2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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* or1k-desc.c: Regenerated.
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* or1k-desc.h: Likewise.
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* or1k-opc.c: Likewise.
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* or1k-opc.h: Likewise.
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* or1k-opinst.c: Likewise.
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2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
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* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
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(I34): New define.
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(I36): New define.
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(I66): New define.
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(I68): New define.
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* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
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mips64r5.
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(parse_mips_dis_option): Update MSA and virtualization support to
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allow mips64r3 and mips64r5.
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2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
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* mips-opc.c (G3): Remove I4.
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2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/16893
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* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
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(end_codep): Likewise.
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(mandatory_prefix): Likewise.
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(active_seg_prefix): Likewise.
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(ckprefix): Set active_seg_prefix to the active segment register
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prefix.
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(seg_prefix): Removed.
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(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
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for prefix index. Ignore the index if it is invalid and the
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mandatory prefix isn't required.
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(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
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mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
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in used_prefixes here. Don't print unused prefixes. Check
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active_seg_prefix for the active segment register prefix.
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Restore the DFLAG bit in sizeflag if the data size prefix is
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unused. Check the unused mandatory PREFIX_XXX prefixes
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(append_seg): Only print the segment register which gets used.
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(OP_E_memory): Check active_seg_prefix for the segment register
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prefix.
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(OP_OFF): Likewise.
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(OP_OFF64): Likewise.
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(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
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2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/16886
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* config.in: Regenerated.
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* configure: Likewise.
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* configure.in: Check if sigsetjmp is available.
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* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
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* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
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* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
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* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
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(OPCODES_SIGSETJMP): Likewise.
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(OPCODES_SIGLONGJMP): Likewise.
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* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
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* xtensa-dis.c (dis_private): Replace jmp_buf with
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OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
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* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
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(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
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(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
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2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/16891
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* i386-dis.c (print_insn): Handle prefixes before fwait.
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2014-04-26 Alan Modra <amodra@gmail.com>
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* po/POTFILES.in: Regenerate.
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2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
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* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
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to allow the MIPS XPA ASE.
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(parse_mips_dis_option): Process the -Mxpa option.
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* mips-opc.c (XPA): New define.
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(mips_builtin_opcodes): Add MIPS XPA instructions and move the
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locations of the ctc0 and cfc0 instructions.
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2014-04-22 Christian Svensson <blue@cmd.nu>
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* Makefile.am: Remove openrisc and or32 support. Add support for or1k.
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* configure.in: Likewise.
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* disassemble.c: Likewise.
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* or1k-asm.c: New file.
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* or1k-desc.c: New file.
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* or1k-desc.h: New file.
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* or1k-dis.c: New file.
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* or1k-ibld.c: New file.
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* or1k-opc.c: New file.
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* or1k-opc.h: New file.
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* or1k-opinst.c: New file.
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* Makefile.in: Regenerate.
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* configure: Regenerate.
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* openrisc-asm.c: Delete.
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* openrisc-desc.c: Delete.
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* openrisc-desc.h: Delete.
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* openrisc-dis.c: Delete.
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* openrisc-ibld.c: Delete.
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* openrisc-opc.c: Delete.
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* openrisc-opc.h: Delete.
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* or32-dis.c: Delete.
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* or32-opc.c: Delete.
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2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
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* i386-dis.c (rm_table): Add encls, enclu.
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* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
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(cpu_flags): Add CpuSE1.
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* i386-opc.h (enum): Add CpuSE1.
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(i386_cpu_flags): Add cpuse1.
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* i386-opc.tbl: Add encls, enclu.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2014-04-02 Anthony Green <green@moxielogic.com>
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* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
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instructions, sex.b and sex.s.
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2014-03-26 Jiong Wang <jiong.wang@arm.com>
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* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
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instructions.
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2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
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* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
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vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
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vscatterqps.
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* i386-tbl.h: Regenerate.
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2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
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* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
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%hstick_enable added.
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2014-03-19 Nick Clifton <nickc@redhat.com>
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* rx-decode.opc (bwl): Allow for bogus instructions with a size
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field of 3.
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(sbwl, ubwl, SCALE): Likewise.
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* rx-decode.c: Regenerate.
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2014-03-12 Alan Modra <amodra@gmail.com>
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* Makefile.in: Regenerate.
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2014-03-05 Alan Modra <amodra@gmail.com>
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Update copyright years.
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2014-03-04 Heiher <r@hev.cc>
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* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
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2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
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* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
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so that they come after the Loongson extensions.
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2014-03-03 Alan Modra <amodra@gmail.com>
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* i386-gen.c (process_copyright): Emit copyright notice on one line.
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2014-02-28 Alan Modra <amodra@gmail.com>
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* msp430-decode.c: Regenerate.
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2014-02-27 Jiong Wang <jiong.wang@arm.com>
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* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
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FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
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2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
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* aarch64-opc.c (print_register_offset_address): Call
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get_int_reg_name to prepare the register name.
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2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
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* i386-opc.tbl: Remove wrong variant of vcvtps2ph
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* i386-tbl.h: Regenerate.
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2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
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(cpu_flags): Add CpuPREFETCHWT1.
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* i386-init.h: Regenerate.
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* i386-opc.h (CpuPREFETCHWT1): New.
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(i386_cpu_flags): Add cpuprefetchwt1.
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* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
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* i386-tbl.h: Regenerate.
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2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
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* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
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to CpuAVX512F.
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* i386-tbl.h: Regenerate.
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2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (output_cpu_flags): Don't output trailing space.
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(output_opcode_modifier): Likewise.
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(output_operand_type): Likewise.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
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* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
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MOD_0FC7_REG_5.
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(PREFIX enum): Add PREFIX_0FAE_REG_7.
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(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
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(prefix_table): Add clflusopt.
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(mod_table): Add xrstors, xsavec, xsaves.
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* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
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CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
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(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
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* i386-init.h: Regenerate.
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* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
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xsaves64, xsavec, xsavec64.
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* i386-tbl.h: Regenerate.
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2014-02-10 Alan Modra <amodra@gmail.com>
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* po/POTFILES.in: Regenerate.
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* po/opcodes.pot: Regenerate.
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2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
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Jan Beulich <jbeulich@suse.com>
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PR binutils/16490
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* i386-dis.c (OP_E_memory): Fix shift computation for
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vex_vsib_q_w_dq_mode.
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2014-01-09 Bradley Nelson <bradnelson@google.com>
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Roland McGrath <mcgrathr@google.com>
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* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
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last_rex_prefix is -1.
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2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update copyright year to 2014.
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2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
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* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
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For older changes see ChangeLog-2013
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Copyright (C) 2014 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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