8sa1-binutils-gdb/include/elf
James Bowman 3b4b0a629a FT32: support for FT32B processor - part 1
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12 18:41:29 -07:00
..
aarch64.h
alpha.h
arc-cpu.def
arc-reloc.def
arc.h
arm.h
avr.h
bfin.h
ChangeLog-0415
ChangeLog-9103
common.h Handle FreeBSD-specific AT_EHDRFLAGS and AT_HWCAP auxiliary vector types. 2017-10-05 09:50:01 -07:00
cr16.h
cr16c.h
cris.h
crx.h
d10v.h
d30v.h
dlx.h
dwarf.h
epiphany.h
external.h
fr30.h
frv.h
ft32.h FT32: support for FT32B processor - part 1 2017-10-12 18:41:29 -07:00
h8.h
hppa.h
i370.h
i386.h
i860.h
i960.h
ia64.h
internal.h
ip2k.h
iq2000.h
lm32.h
m32c.h
m32r.h
m68hc11.h
m68k.h
mcore.h
mep.h
metag.h
microblaze.h
mips.h
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430.h
mt.h
nds32.h
nios2.h
or1k.h
pj.h
ppc64.h
ppc.h Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelf 2017-09-05 08:42:27 +09:30
pru.h
reloc-macros.h
riscv.h
rl78.h
rx.h
s390.h
score.h
sh.h
sparc.h
spu.h
tic6x-attrs.h
tic6x.h
tilegx.h
tilepro.h
v850.h
vax.h
visium.h
vxworks.h
wasm32.h
x86-64.h
xc16x.h
xgate.h
xstormy16.h
xtensa.h