5663e32184
include/ * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC), (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30), (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34), (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC), (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34), (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34), (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34), (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34), (R_PPC64_D28, R_PPC64_PCREL28): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_D34, BFD_RELOC_PPC64_D34_LO), (BFD_RELOC_PPC64_D34_HI30, BFD_RELOC_PPC64_D34_HA30), (BFD_RELOC_PPC64_PCREL34, BFD_RELOC_PPC64_GOT_PCREL34), (BFD_RELOC_PPC64_PLT_PCREL34), (BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34), (BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34), (BFD_RELOC_PPC64_REL16_HIGHER34, BFD_RELOC_PPC64_REL16_HIGHERA34), (BFD_RELOC_PPC64_REL16_HIGHEST34, BFD_RELOC_PPC64_REL16_HIGHESTA34), (BFD_RELOC_PPC64_D28, BFD_RELOC_PPC64_PCREL28): New reloc enums. * elf64-ppc.c (PNOP): Define. (ppc64_elf_howto_raw): Add reloc howtos for new relocations. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc numbers. (ppc64_elf_ha_reloc): Adjust addend for highera34 and highesta34 relocs. (ppc64_elf_prefix_reloc): New function. (struct ppc_link_hash_table): Add notoc_plt. (is_branch_reloc): Add R_PPC64_PLTCALL_NOTOC. (is_plt_seq_reloc): Add R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC, and R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_check_relocs): Handle pcrel got and plt relocs. Set has_pltcall for section on seeing R_PPC64_PLTCALL_NOTOC. Handle possible need for dynamic relocs on non-pcrel powerxx relocs. (dec_dynrel_count): Handle non-pcrel powerxx relocs. (ppc64_elf_inline_plt): Handle R_PPC64_PLTCALL_NOTOC. (toc_adjusting_stub_needed): Likewise. (ppc64_elf_tls_optimize): Handle R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_relocate_section): Handle new powerxx relocs. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel, @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34. (fixup_size): Handle new powerxx relocs. (md_assemble): Warn for @pcrel on non-prefix insns. Accept @l, @h and @ha on prefix insns, and infer reloc without any @ suffix. Translate powerxx relocs to suit DQ and DS field instructions. Include operand tests as well as opcode test to translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA. (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs. (md_apply_fix): Handle new powerxx relocs. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34, BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34, BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28. * testsuite/gas/ppc/prefix-reloc.d, * testsuite/gas/ppc/prefix-reloc.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
276 lines
8.1 KiB
Plaintext
276 lines
8.1 KiB
Plaintext
2019-05-24 Alan Modra <amodra@gmail.com>
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* elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC),
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(R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30),
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(R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34),
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(R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
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(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
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(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
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(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
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(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
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(R_PPC64_D28, R_PPC64_PCREL28): Define.
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2019-05-24 Peter Bergner <bergner@linux.ibm.com>
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Alan Modra <amodra@gmail.com>
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* dis-asm.h (WIDE_OUTPUT): Define.
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* opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
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(PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
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(PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
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2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
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* elf/bpf.h: New file.
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2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* elf/arm.h (Tag_MVE_arch): Define new enum value.
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* opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
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operand.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
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iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
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iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
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operand.
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(enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
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2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_SVE2
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AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
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AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
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feature macros.
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2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
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Faraz Shahbazker <fshahbazker@wavecomp.com>
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* opcode/mips.h (ASE_EVA_R6): New macro.
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(M_LLWPE_AB, M_SCWPE_AB): New enum values.
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2019-05-01 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (AARCH64_FEATURE_TME): New.
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(enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
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2019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
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Faraz Shahbazker <fshahbazker@wavecomp.com>
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* opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
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(M_SCWP_AB, M_SCDP_AB): Likewise.
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2019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
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* opcode/mips.h: Update comment for MIPS32 CODE20 operand.
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2019-04-15 Sudakshina Das <sudi.das@arm.com>
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* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
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2019-04-15 Sudakshina Das <sudi.das@arm.com>
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* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
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2019-04-15 Sudakshina Das <sudi.das@arm.com>
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* elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
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2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
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(MAX_TAG_CPU_ARCH): Set value to above macro.
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* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
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(ARM_AEXT_V8_1M_MAIN): Likewise.
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(ARM_AEXT2_V8_1M_MAIN): Likewise.
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(ARM_ARCH_V8_1M_MAIN): Likewise.
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2019-04-11 Sudakshina Das <sudi.das@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
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2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
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* elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
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2019-04-07 Alan Modra <amodra@gmail.com>
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Merge from gcc.
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2019-04-03 Vineet Gupta <vgupta@synopsys.com>
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PR89877
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* longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
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(sub_ddmmss): Likewise.
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2019-04-06 H.J. Lu <hongjiu.lu@intel.com>
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* bfdlink.h (bfd_link_info): Remove x86-specific linker options.
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2019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* opcode/arm.h (FPU_NEON_ARMV8_1): New.
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(FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
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(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
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(FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
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(FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
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(FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
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(FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
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(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
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2019-03-28 Alan Modra <amodra@gmail.com>
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PR 24390
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* opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
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2019-03-25 Tamar Christina <tamar.christina@arm.com>
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* dis-asm.h (struct disassemble_info): Add stop_offset.
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2019-03-13 Sudakshina Das <sudi.das@arm.com>
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* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
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2019-03-13 Sudakshina Das <sudi.das@arm.com>
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Szabolcs Nagy <szabolcs.nagy@arm.com>
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* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
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2019-03-13 Sudakshina Das <sudi.das@arm.com>
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* elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
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(GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
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(GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
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2019-02-20 Alan Hayward <alan.hayward@arm.com>
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* elf/common.h (NT_ARM_PAC_MASK): Add define.
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2019-02-15 Saagar Jha <saagar@saagarjha.com>
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* mach-o/loader.h: Use new OS names in comments.
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2019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
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* splay-tree.h (splay_tree_delete_key_fn): Update comment.
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(splay_tree_delete_value_fn): Likewise.
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2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
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* opcode/s390.h (enum s390_opcode_cpu_val): Add
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S390_OPCODE_ARCH13.
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2019-01-25 Sudakshina Das <sudi.das@arm.com>
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Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): Remove
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AARCH64_OPND_ADDR_SIMPLE_2.
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(enum aarch64_insn_class): Remove ldstgv_indexed.
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2019-01-22 Tom Tromey <tom@tromey.com>
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* coff/ecoff.h: Include coff/sym.h.
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2018-06-24 Nick Clifton <nickc@redhat.com>
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2.32 branch created.
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2019-01-16 Kito Cheng <kito@andestech.com>
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* elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
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(Tag_RISCV_arch): Likewise.
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(Tag_RISCV_priv_spec): Likewise.
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(Tag_RISCV_priv_spec_minor): Likewise.
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(Tag_RISCV_priv_spec_revision): Likewise.
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(Tag_RISCV_unaligned_access): Likewise.
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(Tag_RISCV_stack_align): Likewise.
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2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
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* dis-asm.h: include <string.h>
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2019-01-10 Nick Clifton <nickc@redhat.com>
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* Merge from GCC:
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2018-12-22 Jason Merrill <jason@redhat.com>
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* demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
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ARM, HP, and EDG demangling styles.
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2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
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Merge from GCC:
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PR other/16615
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* libiberty.h: Mechanically replace "can not" with "cannot".
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* plugin-api.h: Likewise.
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2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
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* elf/rx.h (EF_RX_CPU_MASK): Update new bits.
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(E_FLAG_RX_V3): New RXv3 type.
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* opcode/rx.h (RX_Size): Add double size.
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(RX_Operand_Type): Add double FPU registers.
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(RX_Opcode_ID): Add new instuctions.
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2019-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2018
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Copyright (C) 2019 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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