550fd7bf68
This patch is part of a series of patches to introduce a few changes to the Armv8.5-A Memory Tagging Extension. This patch removes the LDGV and STGV instructions. These instructions needed special infrastructure to support [base]! style for addressing mode. That is also removed now. Committed on behalf of Sudakshina Das. *** gas/ChangeLog *** * config/tc-aarch64.c (parse_address_main): Remove support for [base]! address expression. (parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2. (warn_unpredictable_ldst): Remove support for ldstgv_indexed. * testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv and stgv. * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise. * testsuite/gas/aarch64/illegal-memtag.l: Likewise. * testsuite/gas/aarch64/illegal-memtag.s: Likewise. *** include/ChangeLog *** * opcode/aarch64.h (enum aarch64_opnd): Remove AARCH64_OPND_ADDR_SIMPLE_2. (enum aarch64_insn_class): Remove ldstgv_indexed. *** opcodes/ChangeLog *** * aarch64-asm.c (aarch64_ins_addr_simple_2): Remove. * aarch64-asm.h (ins_addr_simple_2): Likeiwse. * aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise. * aarch64-dis.h (ext_addr_simple_2): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): Remove case for ldstgv_indexed. (aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2. * aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv. (AARCH64_OPERANDS): Remove ADDR_SIMPLE_2. * aarch64-asm-2.c: Regenerated. * aarch64-dis-2.c: Regenerated. * aarch64-opc-2.c: Regenerated.
72 lines
1.9 KiB
Plaintext
72 lines
1.9 KiB
Plaintext
2019-01-25 Sudakshina Das <sudi.das@arm.com>
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Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* opcode/aarch64.h (enum aarch64_opnd): Remove
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AARCH64_OPND_ADDR_SIMPLE_2.
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(enum aarch64_insn_class): Remove ldstgv_indexed.
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2019-01-22 Tom Tromey <tom@tromey.com>
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* coff/ecoff.h: Include coff/sym.h.
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2018-06-24 Nick Clifton <nickc@redhat.com>
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2.32 branch created.
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2019-01-16 Kito Cheng <kito@andestech.com>
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* elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
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(Tag_RISCV_arch): Likewise.
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(Tag_RISCV_priv_spec): Likewise.
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(Tag_RISCV_priv_spec_minor): Likewise.
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(Tag_RISCV_priv_spec_revision): Likewise.
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(Tag_RISCV_unaligned_access): Likewise.
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(Tag_RISCV_stack_align): Likewise.
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2019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
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* dis-asm.h: include <string.h>
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2019-01-10 Nick Clifton <nickc@redhat.com>
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* Merge from GCC:
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2018-12-22 Jason Merrill <jason@redhat.com>
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* demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
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ARM, HP, and EDG demangling styles.
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2019-01-09 Sandra Loosemore <sandra@codesourcery.com>
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Merge from GCC:
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PR other/16615
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* libiberty.h: Mechanically replace "can not" with "cannot".
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* plugin-api.h: Likewise.
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2018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
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* elf/rx.h (EF_RX_CPU_MASK): Update new bits.
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(E_FLAG_RX_V3): New RXv3 type.
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* opcode/rx.h (RX_Size): Add double size.
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(RX_Operand_Type): Add double FPU registers.
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(RX_Opcode_ID): Add new instuctions.
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2019-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2018
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Copyright (C) 2019 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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