3d73d29e4e
Make the opcode/riscv-opc.c and include/opcode/riscv.h tidy, move the
spec versions stuff to bfd/cpu-riscv.h. Also move the csr stuff and
ext_version_table to gas/config/tc-riscv.c for internal use. To avoid
too many repeated code, define general RISCV_GET_SPEC_NAME/SPEC_CLASS
macros. Therefore, assembler/dis-assembler/linker/gdb can get all spec
versions related stuff from cpu-riscv.h and cpu-riscv.c, since the stuff
are defined there uniformly.
bfd/
* Makefile.am: Added cpu-riscv.h.
* Makefile.in: Regenerated.
* po/SRC-POTFILES.in: Regenerated.
* cpu-riscv.h: Added to support spec versions controlling.
Also added extern arrays and functions for cpu-riscv.c.
(enum riscv_spec_class): Define all spec classes here uniformly.
(struct riscv_spec): Added for all specs.
(RISCV_GET_SPEC_CLASS): Added to reduce repeated code.
(RISCV_GET_SPEC_NAME): Likewise.
(RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class.
(RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class.
(RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name.
* cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec.
(riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS.
(riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME.
(riscv_priv_specs): Moved below.
(riscv_get_priv_spec_class_from_numbers): Likewise, updated.
(riscv_isa_specs): Moved from include/opcode/riscv.h.
* elfnn-riscv.c: Included cpu-riscv.h.
(riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec.
* elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h.
(RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h.
* elfxx-riscv.h: Removed extern functions to cpu-riscv.h.
gas/
* config/tc-riscv.c: Included cpu-riscv.h.
(enum riscv_csr_clas): Moved from include/opcode/riscv.h.
(struct riscv_csr_extra): Likewise.
(struct riscv_ext_version): Likewise.
(ext_version_table): Moved from opcodes/riscv-opc.c.
(default_isa_spec): Updated type to riscv_spec_class.
(default_priv_spec): Likewise.
(riscv_set_default_isa_spec): Updated.
(init_ext_version_hash): Likewise.
(riscv_init_csr_hash): Likewise, also fixed indent.
include/
* opcode/riscv.h: Moved stuff and make the file tidy.
opcodes/
* riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
(default_priv_spec): Updated type to riscv_spec_class.
(parse_riscv_dis_option): Updated.
* riscv-opc.c: Moved stuff and make the file tidy.
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2021-02-18 Nelson Chu <nelson.chu@sifive.com>
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* riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
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(default_priv_spec): Updated type to riscv_spec_class.
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(parse_riscv_dis_option): Updated.
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* riscv-opc.c: Moved stuff and make the file tidy.
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2021-02-17 Alan Modra <amodra@gmail.com>
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* wasm32-dis.c: Include limits.h.
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(CHAR_BIT): Provide backup define.
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(wasm_read_leb128): Use CHAR_BIT to size "result" in bits.
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Correct signed overflow checking.
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2021-02-16 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl: Split CVTPI2PD template. Add SSE2AVX variant.
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* i386-tbl.h: Re-generate.
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2021-02-16 Jan Beulich <jbeulich@suse.com>
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* i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor
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Oword.
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* i386-opc.tbl (CpuFP, Mmword, Oword): Define.
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2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com>
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* s390-mkopc.c (main): Accept arch14 as cpu string.
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* s390-opc.txt: Add new arch14 instructions.
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2021-02-04 Nick Alcock <nick.alcock@oracle.com>
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* configure.ac (SHARED_LIBADD): Remove explicit -lintl population in
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favour of LIBINTL.
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* configure: Regenerated.
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2021-02-08 Mike Frysinger <vapier@gentoo.org>
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* tic54x-dis.c (sprint_mmr): Change to tic54x_mmregs.
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* tic54x-opc.c (regs): Rename to ...
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(tic54x_regs): ... this.
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(mmregs): Rename to ...
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(tic54x_mmregs): ... this.
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(condition_codes): Rename to ...
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(tic54x_condition_codes): ... this.
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(cc2_codes): Rename to ...
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(tic54x_cc2_codes): ... this.
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(cc3_codes): Rename to ...
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(tic54x_cc3_codes): ... this.
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(status_bits): Rename to ...
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(tic54x_status_bits): ... this.
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(misc_symbols): Rename to ...
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(tic54x_misc_symbols): ... this.
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2021-02-04 Nelson Chu <nelson.chu@sifive.com>
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* riscv-opc.c (MASK_RVB_IMM): Removed.
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(riscv_opcodes): Removed zb* instructions.
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(riscv_ext_version_table): Removed versions for zb*.
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2021-01-26 Alan Modra <amodra@gmail.com>
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* i386-gen.c (parse_template): Ensure entire template_instance
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is initialised.
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2021-01-15 Nelson Chu <nelson.chu@sifive.com>
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* riscv-opc.c (riscv_gpr_names_abi): Aligned the code.
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(riscv_fpr_names_abi): Likewise.
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(riscv_opcodes): Likewise.
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(riscv_insn_types): Likewise.
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2021-01-15 Nelson Chu <nelson.chu@sifive.com>
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* riscv-dis.c (parse_riscv_dis_option): Fix typos of message.
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2021-01-15 Nelson Chu <nelson.chu@sifive.com>
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* riscv-dis.c: Comments tidy and improvement.
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* riscv-opc.c: Likewise.
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2021-01-13 Alan Modra <amodra@gmail.com>
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* Makefile.in: Regenerate.
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2021-01-12 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/26792
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* configure.ac: Use GNU_MAKE_JOBSERVER.
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* aclocal.m4: Regenerated.
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* configure: Likewise.
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2021-01-12 Nick Clifton <nickc@redhat.com>
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* po/sr.po: Updated Serbian translation.
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2021-01-11 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/27173
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* configure: Regenerated.
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2021-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* aarch64-asm-2.c: Regenerate.
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* aarch64-dis-2.c: Likewise.
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* aarch64-opc-2.c: Likewise.
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* aarch64-opc.c (aarch64_print_operand):
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Delete handling of AARCH64_OPND_CSRE_CSR.
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* aarch64-tbl.h (aarch64_feature_csre): Delete.
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(CSRE): Likewise.
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(_CSRE_INSN): Likewise.
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(aarch64_opcode_table): Delete csr.
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2021-01-11 Nick Clifton <nickc@redhat.com>
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* po/de.po: Updated German translation.
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* po/fr.po: Updated French translation.
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* po/pt_BR.po: Updated Brazilian Portuguese translation.
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* po/sv.po: Updated Swedish translation.
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* po/uk.po: Updated Ukranian translation.
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2021-01-09 H.J. Lu <hongjiu.lu@intel.com>
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* configure: Regenerated.
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2021-01-09 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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* po/opcodes.pot: Regenerate.
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2021-01-09 Nick Clifton <nickc@redhat.com>
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* 2.36 release branch crated.
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2021-01-08 Peter Bergner <bergner@linux.ibm.com>
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* ppc-opc.c (insert_dw, (extract_dw): New functions.
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(DW, (XRC_MASK): Define.
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(powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
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2021-01-09 Alan Modra <amodra@gmail.com>
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* configure: Regenerate.
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2021-01-08 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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2021-01-08 Nick Clifton <nickc@redhat.com>
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PR 27129
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* aarch64-dis.c (determine_disassembling_preference): Move call to
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aarch64_match_operands_constraint outside of the assertion.
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* aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert.
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Replace with a return of FALSE.
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PR 27139
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* aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a
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core system register.
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2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
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* configure: Regenerate.
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2021-01-07 Nick Clifton <nickc@redhat.com>
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* po/fr.po: Updated French translation.
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2021-01-07 Fredrik Noring <noring@nocrew.org>
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* m68k-opc.c (chkl): Change minimum architecture requirement to
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m68020.
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2021-01-07 Philipp Tomsich <prt@gnu.org>
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* riscv-opc.c (riscv_opcodes): Add pause hint instruction.
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2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
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Jim Wilson <jimw@sifive.com>
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Andrew Waterman <andrew@sifive.com>
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Maxim Blinov <maxim.blinov@embecosm.com>
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Kito Cheng <kito.cheng@sifive.com>
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Nelson Chu <nelson.chu@sifive.com>
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* riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions.
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(MASK_RVB_IMM): Used for rev8 and orc.b encoding.
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2021-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2020
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Copyright (C) 2021 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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