2da2eaf4ce
This patch moves MVE feature bits into the CORE_HIGH section. This makes sure .fpu and -mfpu does not reset the bits set by MVE. This is important because .fpu has no option to "set" these same bits and thus, mimic'ing GCC, we choose to define MVE as an architecture extension rather than put it together with other the legacy fpu features. This will enable the following behavior: .arch armv8.1-m.main .arch mve .fpu fpv5-sp-d16 #does not disable mve. vadd.i32 q0, q1, q2 This patch also makes sure MVE is not taken into account during auto-detect. This was already the case, but because we moved the MVE bits to the architecture feature space we must make sure ARM_ANY does not include MVE. gas/ChangeLog: 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> PR 25376 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH. (armv8_1m_main_ext_table): Use CORE_HIGH for mve. * testsuite/arm/armv8_1-m-fpu-mve-1.s: New. * testsuite/arm/armv8_1-m-fpu-mve-1.d: New. * testsuite/arm/armv8_1-m-fpu-mve-2.s: New. * testsuite/arm/armv8_1-m-fpu-mve-2.d: New. include/ChangeLog: 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> PR 25376 * opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to... (ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space. (ARM_ANY): Redefine to not include any MVE bits. (ARM_FEATURE_ALL): Removed. opcodes/ChangeLog: 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> PR 25376 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits. (neon_opcodes): Likewise. (select_arm_features): Make sure we enable MVE bits when selecting armv8.1-m.main. Make sure we do not enable MVE bits when not selecting any architecture.
63 lines
1.8 KiB
Plaintext
63 lines
1.8 KiB
Plaintext
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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PR 25376
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* opcodes/arm.h (FPU_MVE, FPU_MVE_FPU): Move these features to...
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(ARM_EXT2_MVE, ARM_EXT2_MVE_FP): ... the CORE_HIGH space.
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(ARM_ANY): Redefine to not include any MVE bits.
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(ARM_FEATURE_ALL): Removed.
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2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
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* opcode/msp430.h (enum msp430_expp_e): New.
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(struct msp430_operand_s): Add expp member to struct.
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2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
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* elf/arc-cpu.def: Update ARC cpu list.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* opcode/tic4x.h (EXTR): Delete.
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(EXTRU, EXTRS, INSERTU, INSERTS): Rewrite without zero/sign
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extension using shifts. Do trim INSERTU value to specified bitfield.
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2020-01-10 Alan Modra <amodra@gmail.com>
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* opcode/spu.h: Formatting.
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(UNSIGNED_EXTRACT): Use 1u.
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(SIGNED_EXTRACT): Don't sign extend with shifts.
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(DECODE_INSN_I9a, DECODE_INSN_I9b): Avoid left shift of signed value.
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Keep result signed.
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(DECODE_INSN_U9a, DECODE_INSN_U9b): Delete.
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2020-01-07 Shahab Vahedi <shahab@synopsys.com>
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* opcode/arc.h (insn_class_t): Add 'LLOCK' and 'SCOND'.
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2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
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* coff/internal.h: Add defintions of Z80 reloc names.
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2020-01-02 Christian Biesinger <cbiesinger@google.com>
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* opcode/s12z.h: Undef REG_Y.
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2020-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2019
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Copyright (C) 2020 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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