8sa1-binutils-gdb/include/ChangeLog
Alan Modra 7ba71655a4 PowerPC addpcis fix
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA.  They ought to both be -4.  The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
	      /* Make it pc-relative.  If the back-end code has not
		 selected a pc-relative reloc, cancel the adjustment
		 we do later on all pc-relative relocs.  */
*not* cancelling the pc-relative adjustment.  So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust.  Having the new internal reloc also makes it easy to
support

 addpcis rx,sym@ha

as an equivalent to

 addpcis rx,(sym-0f)@ha
0:

The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.

Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.

include/
	* elf/ppc64.h (R_PPC64_16DX_HA): New.  Expand fake reloc comment.
	* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
	* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
	* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
	(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
	(ppc64_elf_relocate_section): Likewise.
	* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
	(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
	(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
	(md_apply_fix): Remove fx_subsy check.  Move code converting to
	pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA.  Remove code
	emiiting errors on seeing fx_pcrel set on unexpected relocs, as
	that is done now by the generic code via..
	* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
	(TC_VALIDATE_FIX_SUB): Define.
ld/
	* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
	limits of addpcis range.
2017-02-28 11:59:47 +10:30

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2017-02-28 Alan Modra <amodra@gmail.com>
* elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
* elf/ppc.h (R_PPC_16DX_HA): Likewise.
2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
* opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16)
(AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2)
(AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX)
(AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds.
2017-02-24 Richard Sandiford <richard.sandiford@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
(AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.
2017-02-22 Andrew Waterman <andrew@sifive.com>
* opcode/riscv-opc.h (CSR_SCOUNTEREN): New define.
(CSR_MCOUNTEREN): Likewise.
(scounteren): Declare register.
(mcounteren): Likewise.
2017-02-14 Andrew Waterman <andrew@sifive.com>
* opcode/riscv-opc.h (MATCH_SFENCE_VMA): New define.
(MASK_SFENCE_VMA): Likewise.
(sfence_vma): Declare instruction.
2017-02-14 Alan Modra <amodra@gmail.com>
PR 21118
* opcode/ppc.h (PPC_OPERAND_*): Reassign values, regs first.
(PPC_OPERAND_SPR, PPC_OPERAND_GQR): Define.
2017-01-24 Dimitar Dimitrov <dimitar@dinux.eu>
* opcode/hppa.h: Clarify that file is part of GNU opcodes.
* opcode/i860.h: Ditto.
* opcode/nios2.h: Ditto.
* opcode/nios2r1.h: Ditto.
* opcode/nios2r2.h: Ditto.
* opcode/pru.h: Ditto.
2017-01-24 Alan Hayward <alan.hayward@arm.com>
* elf/common.h (NT_ARM_SVE): Define.
2017-01-04 Jiong Wang <jiong.wang@arm.com>
* dwarf2.def: Sync with mainline gcc sources.
2017-01-04 Richard Earnshaw <rearnsha@arm.com>
Jiong Wang <jiong.wang@arm.com>
* dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
(DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
(AARCH64_ARCH_V8_3): Update.
2017-01-03 Kito Cheng <kito.cheng@gmail.com>
* opcode/riscv-opc.h: Add support for the "q" ISA extension.
2017-01-03 Nick Clifton <nickc@redhat.com>
* dwarf2.def: Sync with mainline gcc sources
* dwarf2.h: Likewise.
2016-12-21 Jakub Jelinek <jakub@redhat.com>
* dwarf2.def (DW_FORM_ref_sup): Renamed to ...
(DW_FORM_ref_sup4): ... this. New form.
(DW_FORM_ref_sup8): New form.
2016-10-17 Jakub Jelinek <jakub@redhat.com>
* dwarf2.h (enum dwarf_calling_convention): Add new DWARF5
calling convention codes.
(enum dwarf_line_number_content_type): New.
(enum dwarf_location_list_entry_type): Add DWARF5 DW_LLE_*
codes.
(enum dwarf_source_language): Add new DWARF5 DW_LANG_* codes.
(enum dwarf_macro_record_type): Add DWARF5 DW_MACRO_* codes.
(enum dwarf_name_index_attribute): New.
(enum dwarf_range_list_entry): New.
(enum dwarf_unit_type): New.
* dwarf2.def: Add new DWARF5 DW_TAG_*, DW_FORM_*, DW_AT_*,
DW_OP_* and DW_ATE_* entries.
2016-08-15 Jakub Jelinek <jakub@redhat.com>
* dwarf2.def (DW_AT_string_length_bit_size,
DW_AT_string_length_byte_size): New attributes.
2016-08-12 Alexandre Oliva <aoliva@redhat.com>
PR debug/63240
* dwarf2.def (DW_AT_deleted, DW_AT_defaulted): New.
* dwarf2.h (enum dwarf_defaulted_attribute): New.
2017-01-02 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
For older changes see ChangeLog-2016
Copyright (C) 2017 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
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