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Richard Sandiford 2442d8466e [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED
Some SVE instructions count the number of elements in a given vector
pattern and allow a scale factor of [1, 16] to be applied to the result.
This scale factor is written ", MUL #n", where "MUL" is a new operator.
E.g.:

	UQINCD	X0, POW2, MUL #2

This patch adds support for this kind of operand.

All existing operators were shifts of some kind, so there was a natural
range of [0, 63] regardless of context.  This was then narrowered further
by later checks (e.g. to [0, 31] when used for 32-bit values).

In contrast, MUL doesn't really have a natural context-independent range.
Rather than pick one arbitrarily, it seemed better to make the "shift"
amount a full 64-bit value and leave the range test to the usual
operand-checking code.  I've rearranged the fields of aarch64_opnd_info
so that this doesn't increase the size of the structure (although I don't
think its size is critical anyway).

include/
	* opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
	aarch64_opnd.
	(AARCH64_MOD_MUL): New aarch64_modifier_kind.
	(aarch64_opnd_info): Make shifter.amount an int64_t and
	rearrange the fields.

opcodes/
	* aarch64-tbl.h (AARCH64_OPERANDS): Add an entry for
	AARCH64_OPND_SVE_PATTERN_SCALED.
	* aarch64-opc.h (FLD_SVE_imm4): New aarch64_field_kind.
	* aarch64-opc.c (fields): Add a corresponding entry.
	(set_multiplier_out_of_range_error): New function.
	(aarch64_operand_modifiers): Add entry for AARCH64_MOD_MUL.
	(operand_general_constraint_met_p): Handle
	AARCH64_OPND_SVE_PATTERN_SCALED.
	(print_register_offset_address): Use PRIi64 to print the
	shift amount.
	(aarch64_print_operand): Likewise.  Handle
	AARCH64_OPND_SVE_PATTERN_SCALED.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-asm.h (ins_sve_scale): New inserter.
	* aarch64-asm.c (aarch64_ins_sve_scale): New function.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis.h (ext_sve_scale): New inserter.
	* aarch64-dis.c (aarch64_ext_sve_scale): New function.
	* aarch64-dis-2.c: Regenerate.

gas/
	* config/tc-aarch64.c (SHIFTED_MUL): New parse_shift_mode.
	(parse_shift): Handle it.  Reject AARCH64_MOD_MUL for all other
	shift modes.  Skip range tests for AARCH64_MOD_MUL.
	(process_omitted_operand): Handle AARCH64_OPND_SVE_PATTERN_SCALED.
	(parse_operands): Likewise.
2016-09-21 16:55:22 +01:00
bfd Automatic date update in version.in 2016-09-21 00:00:18 +00:00
binutils nm handling of synthetic symbols 2016-09-19 15:16:50 +09:30
config
cpu
elfcpp Add support for MIPS .rld_map section. 2016-06-20 12:16:26 -07:00
etc Fix compile time warning messages building with gcc v6.1.1 2016-06-13 10:49:26 +01:00
gas [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED 2016-09-21 16:55:22 +01:00
gdb MIPS/testsuite: mips16-thunks: Use `standard_output_file' 2016-09-21 12:59:33 +01:00
gold Handle ARM-specific --target1-abs, --target1-rel and --target2 options 2016-09-02 15:51:59 -07:00
gprof Partially revert previous delta - move limit testing code to first scan over symbol file. 2016-08-30 13:51:43 +01:00
include [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED 2016-09-21 16:55:22 +01:00
intl
ld ld: Fix mistake in ChangeLog 2016-09-20 15:34:20 +01:00
libdecnumber
libiberty Synchronize libiberty sources with FSF GCC mainline version. 2016-08-02 13:26:28 +01:00
opcodes [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED 2016-09-21 16:55:22 +01:00
readline Improve MinGW support in Readline 2016-09-17 11:50:37 +03:00
sim sim: m68hc11: use standard STATIC_INLINE helper 2016-08-16 06:12:39 -07:00
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ChangeLog Enable the configuration of GDB for the NDS32 target. 2016-07-20 09:06:39 +01:00
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		   README for GNU development tools

This directory contains various GNU compilers, assemblers, linkers, 
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	make

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