This patch fixes a number of cases where -z nodynamic-undefined-weak
was not effective in preventing dynamic relocations or linkage stubs.
* elf32-ppc.c (UNDEFWEAK_NO_DYNAMIC_RELOC): Define.
(ppc_elf_select_plt_layout, ppc_elf_tls_setup): Use it.
(ppc_elf_adjust_dynamic_symbol, allocate_dynrelocs): Likewise.
(ppc_elf_relocate_section): Likewise. Delete silly optimisation
for undef and undefweak dyn_relocs.
* elf64-ppc.c (UNDEFWEAK_NO_DYNAMIC_RELOC): Define.
(ppc64_elf_adjust_dynamic_symbol, ppc64_elf_tls_setup): Use it.
(allocate_got, allocate_dynrelocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
x86, PLT relocation may contain R_386_TLS_DESC or R_X86_64_TLSDESC
even though there is no real PLT. We need to add DT_PLTRELSZ, DT_PLTREL
and DT_JMPREL if there is a .rel.plt/.rela.plt section.
bfd/
* elf32-i386.c (elf_i386_size_dynamic_sections): Alwasys add
DT_PLTRELSZ, DT_PLTREL and DT_JMPREL for .rel.plt section.
* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Alwasys
add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL for .rela.plt section.
ld/
* testsuite/ld-i386/tlsdesc2.d: New test.
* testsuite/ld-x86-64/tlsdesc2.d: Likewise.
Complement commit e17b0c351f ("MIPS/BFD: Respect the ELF gABI dynamic
symbol table sort requirement") and correct an inconsistency in dynamic
symbol accounting data causing an assertion failure in the MIPS backend:
ld: BFD (GNU Binutils) 2.28.51.20170330 assertion fail
../../binutils-gdb/bfd/elfxx-mips.c:3860
in the course of making a GOT entry in a static binary to satisfy a GOT
relocation present in input, due to the local dynamic symbol count not
having been established.
To do so let backends request `_bfd_elf_link_renumber_dynsyms' to be
always called, rather than where a dynamic binary is linked only, and
then make this request in the MIPS backend.
bfd/
PR ld/21334
* elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms'
member.
* elfxx-target.h [!elf_backend_always_renumber_dynsyms]
(elf_backend_always_renumber_dynsyms): Define.
(elfNN_bed): Initialize `always_renumber_dynsyms' member.
* elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define.
* elflink.c (bfd_elf_size_dynamic_sections): Also call
`_bfd_elf_link_renumber_dynsyms' if the backend has requested
it.
(bfd_elf_size_dynsym_hash_dynstr): Likewise.
ld/
PR ld/21334
* testsuite/ld-mips-elf/pr21334.dd: New test.
* testsuite/ld-mips-elf/pr21334.gd: New test.
* testsuite/ld-mips-elf/pr21334.ld: New test linker script.
* testsuite/ld-mips-elf/pr21334.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Consistently call `_bfd_elf_link_renumber_dynsyms' only if linking a
dynamic binary, complementing code in `bfd_elf_size_dynsym_hash_dynstr'
and commit ccabcbe51e ("New attempt at fixing MIPS --gc-sections et
al."), <https://sourceware.org/ml/binutils/2005-08/msg00258.html>.
bfd/
* elflink.c (bfd_elf_size_dynamic_sections): Only call
`_bfd_elf_link_renumber_dynsyms' after section GC if dynamic
sections have been created.
Force symbol dynamic if it isn't undefined weak. Generate relative
relocation for GOT reference against non-dynamic symbol in PIC to
avoid unnecessary dynamic symbols.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
no_finish_dynamic_symbol.
(elf_x86_64_link_hash_newfunc): Set no_finish_dynamic_symbol to
0.
(elf_x86_64_allocate_dynrelocs): If a symbol isn't undefined
weak symbol, don't make it dynamic.
(elf_x86_64_relocate_section): If a symbol isn't dynamic in PIC,
set no_finish_dynamic_symbol and generate R_X86_64_RELATIVE
relocation for GOT reference.
(elf_x86_64_finish_dynamic_symbol): Abort if
no_finish_dynamic_symbol isn't 0.
ld/
* testsuite/ld-x86-64/no-plt.exp: Also check no-plt-1e.nd.
* testsuite/ld-x86-64/no-plt-1e.nd: New file.
Force symbol dynamic if it isn't undefined weak. Generate R_386_RELATIVE
relocation for R_386_GOT32 relocation against non-dynamic symbol in PIC.
PR ld/21402
* elf32-i386.c (elf_i386_allocate_dynrelocs): If a symbol isn't
undefined weak symbol, don't make it dynamic.
(elf_i386_relocate_section): If a symbol isn't dynamic in PIC,
set no_finish_dynamic_symbol and generate R_386_RELATIVE
relocation for R_386_GOT32.
commit a27e437177
Author: Roland McGrath <roland@gnu.org>
Date: Thu Jul 28 22:35:15 2011 +0000
BFD vector for elf32-i386-nacl:
changed ELF_MAXPAGESIZE to 0x10000 for VxWorks. This patch fixes it
and updated testsuite/ld-i386/vxworks2.sd to add space for program
headers.
bfd/
PR ld/21425
* elf32-i386.c (ELF_MAXPAGESIZE): Set to 0x1000 for VxWorks.
ld/
PR ld/20815
* testsuite/ld-i386/vxworks2.sd: Add space for program headers.
This patch fixes an assumption made by code that runs for objcopy and
strip, that SHT_REL/SHR_RELA sections are always named starting with a
.rel/.rela prefix. I'm also modifying the interface for
elf_backend_get_reloc_section, so any backend function just needs to
handle name mapping.
PR 21412
* elf-bfd.h (struct elf_backend_data <get_reloc_section>): Change
parameters and comment.
(_bfd_elf_get_reloc_section): Delete.
(_bfd_elf_plt_get_reloc_section): Declare.
* elf.c (_bfd_elf_plt_get_reloc_section, elf_get_reloc_section):
New functions. Don't blindly skip over assumed .rel/.rela prefix.
Extracted from..
(_bfd_elf_get_reloc_section): ..here. Delete.
(assign_section_numbers): Call elf_get_reloc_section.
* elf64-ppc.c (elf_backend_get_reloc_section): Define.
* elfxx-target.h (elf_backend_get_reloc_section): Update.
GOT reference to global symbol in PIE will lead to dynamic symbol. It
becomes a problem when "time" or "times" is defined as a variable in
an executable, clashing with functions of the same name in libc. If
a symbol isn't undefined weak symbol, don't make it dynamic in PIE and
generate R_386_RELATIVE relocation.
bfd/
PR ld/21402
* elf32-i386.c (elf_i386_link_hash_entry): Add
no_finish_dynamic_symbol.
(elf_i386_link_hash_newfunc): Set no_finish_dynamic_symbol to 0.
(elf_i386_allocate_dynrelocs): If a symbol isn't undefined weak
symbol, don't make it dynamic in PIE.
(elf_i386_relocate_section): If a symbol isn't dynamic in PIE,
set no_finish_dynamic_symbol and generate R_386_RELATIVE
relocation for R_386_GOT32
(elf_i386_finish_dynamic_symbol): Abort if no_finish_dynamic_symbol
isn't 0.
ld/
PR ld/21402
* testsuite/ld-elf/indirect.exp: Don't skip PIE indirect5 and
indirect6 tests on i386.
When -static -E/--dynamic-list are passed to linker, linker may create
executable with dynamic sections which aren't supported by run-time.
We require --no-dynamic-linker together with -static -E/--dynamic-list
before adding dynamic symbol table to static executable.
bfd/
PR ld/19617
PR ld/21086
* elflink.c (elf_link_add_object_symbols): Require
--no-dynamic-linker with -E/--dynamic-list when creating
dynamic sections.
ld/
PR ld/19617
PR ld/21086
* testsuite/ld-elf/pr19617a.d: Pass --no-dynamic-linker to ld.
* testsuite/ld-elf/pr19617b.d: Likewise.
* testsuite/ld-elf/pr19617c.d: Likewise.
*testsuite/ld-i386/pr19636-4d.d: Likewise.
* testsuite/ld-elf/readelf.exp: Pass --no-dynamic-linker to ld
with --export-dynamic.
* testsuite/ld-elf/shared.exp: Pass --no-dynamic-linker to ld
with -E.
Do not require forced local (STB_LOCAL) symbols to have a definition in
a regular file to be considered to resolve local to the current module,
matching `elf_link_renumber_local_hash_table_dynsyms'. In the absence
of a regular definition any reference to a STB_LOCAL symbol will have to
be garbage collected along with the undefined symbol itself, or the link
will eventually fail. Either way the symbol concerned is not going to
be external.
bfd/
* elflink.c (_bfd_elf_symbol_refs_local_p): Always return TRUE
if forced local.
Move the comment about dynamic symbol sorting next to where it happens.
bfd/
* elfxx-mips.c (_bfd_mips_elf_final_link): Reorder comment about
dynamic symbol sorting.
We need to make an IR symbol visible if it is defined in an IR object
and referenced in a dynamic object. When --as-needed is used, since
linker removes the IR symbol reference of the dynamic object if the
dynamic object isn't needed in the first pass, the IR definition isn't
visible to the dynamic object even if the dynamic object becomes needed
in the second pass. Add dynamic_ref_after_ir_def to bfd_link_hash_entry
to track IR symbol which is defined in an IR object and later referenced
in a dynamic object. dynamic_ref_after_ir_def is preserved when restoring
the symbol table for unneeded dynamic object.
bfd/
PR ld/21382
* elflink.c (elf_link_add_object_symbols): Preserve
dynamic_ref_after_ir_def when restoring the symbol table for
unneeded dynamic object.
include/
PR ld/21382
* bfdlink.h (bfd_link_hash_entry): Add dynamic_ref_after_ir_def.
ld/
PR ld/21382
* plugin.c (is_visible_from_outside): Symbol may be visible
from outside if dynamic_ref_after_ir_def is set.
(plugin_notice): Set dynamic_ref_after_ir_def if the symbol is
defined in an IR object and referenced in a dynamic object.
* testsuite/ld-plugin/lto.exp: Run PR ld/21382 tests.
* testsuite/ld-plugin/pr21382a.c: New file.
* testsuite/ld-plugin/pr21382b.c: Likewise.
Since undefined IFUNC symbol is treated as normal FUNC symbol, don't
abort on undefined IFUNC symbol in the second PLT.
bfd/
PR ld/21401
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Don't abort
on on undefined IFUNC symbol in the second PLT.
ld/
PR ld/21401
* testsuite/ld-ifunc/ifunc.exp: Add a libtest-2-now.so test with
-z now.
-z nodynamic-undefined-weak is only implemented for x86. (The sparc
backend has some support code but doesn't enable the option by
including ld/emulparams/dynamic_undefined_weak.sh, and since the
support looks like it may be broken I haven't enabled it.) This patch
adds the complementary -z dynamic-undefined-weak, extends both options
to affect building of shared libraries as well as executables, and
adds support for the option on powerpc.
include/
* bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
Revise comment.
bfd/
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Hide undefweak
or make dynamic for info->dynamic_undefined_weak 0 and 1.
* elf32-ppc.c:Formatting.
(ensure_undefweak_dynamic): Don't make dynamic when
info->dynamic_undefined_weak is zero.
(allocate_dynrelocs): Discard undefweak dyn_relocs for
info->dynamic_undefined_weak. Discard undef dyn_relocs when
not default visibility. Discard undef and undefweak
dyn_relocs earlier.
(ppc_elf_relocate_section): Adjust to suit.
* elf64-ppc.c: Formatting.
(ensure_undefweak_dynamic): Don't make dynamic when
info->dynamic_undefined_weak is zero.
(allocate_dynrelocs): Discard undefweak dyn_relocs for
info->dynamic_undefined_weak. Discard them earlier.
ld/
* ld.texinfo (dynamic-undefined-weak): Document.
(nodynamic-undefined-weak): Document that this option now can
be used with shared libs.
* emulparams/dynamic_undefined_weak.sh: Support -z
dynamic-undefined-weak.
* emulparams/elf32ppccommon.sh: Include dynamic_undefined_weak.sh.
* testsuite/ld-undefined/weak-undef.exp (undef_weak_so),
(undef_weak_exe): New. Use them. Add -z dynamic-undefined-weak
and -z nodynamic-undefined-weak tests.
* Makefile.am: Update powerpc dependencies.
* Makefile.in: Regenerate.
commit 902e9fc76a
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Tue Feb 21 01:46:42 2017 +0000
PR ld/20828: Move symbol version processing ahead of GC symbol sweep
breaks version definition with --version-script --soname. This patch
fixes it by getting soname index before generating the version definition
section.
bfd/
PR ld/21389
* elflink.c (bfd_elf_size_dynamic_sections): Get soname index
before generating the version definition section.
ld/
PR ld/21389
* testsuite/ld-elf/pr21389.map: New file.
* testsuite/ld-elf/pr21389.s: Likewise.
* testsuite/ld-elf/pr21389a.d: Likewise.
* testsuite/ld-elf/pr21389b.d: Likewise.
* testsuite/ld-elf/pr21389c.d: Likewise.
We already handle the case of an object file first defining a symbol
that a later shared library also defines where the symbol types are
incompatible. This patch handles the reverse, when a later object
file defines an incompatible symbol defined by an earlier shared
library.
bfd/
* elflink.c (_bfd_elf_merge_symbol): Undo dynamic linking
state when a regular object file defines a symbol with
incompatible type to that defined by an earlier shared lib.
ld/
* testsuite/ld-elf/indirect5a.c,
* testsuite/ld-elf/indirect5b.c,
* testsuite/ld-elf/indirect5.map,
* testsuite/ld-elf/indirect5.out: New test.
* testsuite/ld-elf/indirect6a.c: Likewise.
* testsuite/ld-elf/indirect.exp (check_dynamic_syms): New proc.
Run new tests and check dynsyms.
Not a comprehensive change, just some split out from fixes made for
the %A and %B changes.
* coffcode.h: Wrap some overly long _bfd_error_handler args.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-mep.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
This steals _doprnt from libiberty, extended to handle %A and %B.
Which lets us do away with the current horrible %A and %B handling
that requires all %A and %B arguments to be passed first, rather than
in the natural order.
* bfd.c (PRINT_TYPE): Define.
(_doprnt): New function.
(error_handler_internal): Use _doprnt.
* coff-arm.c: Put %A and %B arguments to _bfd_error_handler
calls in their natural order, throughout file.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-tic80.c: Likewise.
* cofflink.c: Likewise.
* elf-s390-common.c: Likewise.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-spu.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-sparc.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elf32-arm.c (arm_type_of_stub): Supply missing args to "long
branch veneers" error. Fix double space and format message.
* elf32-avr.c (avr_add_stub): Do not pass NULL as %B arg.
* elf64-ppc.c (tocsave_find): Supply missing %B arg.
Skip processor-specific GNU program properties with generic ELF target
vector. They should be handled by the matching ELF target vector.
* elf-properties.c (_bfd_elf_parse_gnu_properties): Ignore
processor-specific properties with generic ELF target vector.
* elf32-sparc.c (elf_backend_fixup_symbol): New.
* elf64-sparc.c (elf_backend_fixup_symbol): New.
* elfxx-sparc.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
(_bfd_sparc_elf_link_hash_entry): Add has_got_reloc and
has_non_got_reloc.
(link_hash_newfunc): Initialize has_got_reloc and
has_non_got_reloc.
(_bfd_sparc_elf_size_dynamic_sections): Set interp to .interp
section.
(_bfd_sparc_elf_copy_indirect_symbol): Copy has_got_reloc and
has_non_got_reloc.
(_bfd_sparc_elf_check_relocs): Set has_got_reloc and
has_non_got_reloc.
(_bfd_sparc_elf_fixup_symbol): New function.
(allocate_dynrelocs): Don't allocate space for dynamic
relocations and discard relocations against resolved undefined
weak symbols in executable. Don't make resolved undefined weak
symbols in executable dynamic. Keep dynamic non-GOT/non-PLT
relocation against undefined weak symbols in PIE.
(_bfd_sparc_elf_relocate_section): Don't generate dynamic
relocations against resolved undefined weak symbols in PIE
(_bfd_sparc_elf_finish_dynamic_symbol): Keep PLT/GOT entries
without ynamic PLT/GOT relocations for resolved undefined weak
symbols.
Don't generate dynamic relocation against resolved undefined
weak symbol in executable.
(pie_finish_undefweak_symbol): New function.
(_bfd_sparc_elf_finish_dynamic_sections): Call
pie_finish_undefweak_symbol on all symbols in PIE.
* elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add interp.
(_bfd_sparc_elf_fixup_symbol): New function.
PR21287 notes that .init_array is correctly given a type of
SHT_INIT_ARRAY while .init_array.nnn gets SHT_PROGBITS. This patch
fixes that problem, and properly drops warnings from the compiler that
would cause the testsuite to fail. My a44d0bd78 change to check
ld_compile status, necessary to pick up compile errors, also meant
warnings were not ignored.
bfd/
PR 21287
* elf.c (special_sections_f): Match .fini_array and .fini_array.*.
(special_sections_i): Likewise for .init_array.
(special_sections_p): Likewise for .preinit_array.
ld/
PR 21287
* testsuite/ld-elf/init-fini-arrays.d: Match INIT_ARRAY and FINI_ARRAY.
* testsuite/ld-elf/init-fini-arrays.s: Use %init_array and %fini_array
section types.
* testsuite/lib/ld-lib.exp (default_ld_compile): Trim assembler
warnings about "ignoring incorrect section type".
(run_ld_link_exec_tests, run_cc_link_tests): Delete old comment.
Since common symbols that are turned into definitions don't have the
DEF_REGULAR flag set, we need to check ELF_COMMON_DEF_P for common
symbols.
bfd/
PR ld/19579
PR ld/21306
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Check
ELF_COMMON_DEF_P for common symbols.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
* elflink.c (_bfd_elf_merge_symbol): Revert commits
202ac193bb and
07492f668d.
ld/
PR ld/19579
PR ld/21306
* testsuite/ld-elf/pr19579a.c (main): Updated.
* opncls.c (bfd_get_debug_link_info): Rename to...
(bfd_get_debug_link_info_1): ... this. Change type of second
parameter to void pointer. Adjust.
(bfd_get_debug_link_info): Reimplement on top of
bfd_get_debug_link_info_1.
(separate_debug_file_exists, separate_alt_debug_file_exists):
Change type of second parameter to void pointer. Adjust.
(get_func_type, check_func_type): Change type of second parameter
to void pointer.
(find_separate_debug_file): Add 'func_data' parameter. Pass it to
the callback functions instead of passing the address of a local.
(bfd_follow_gnu_debuglink): Pass address of unsigned long local to
find_separate_debug_file.
(get_alt_debug_link_info_shim): Change type of second parameter to
void pointer. Adjust.
(bfd_follow_gnu_debugaltlink): Adjust to pass NULL to
find_separate_debug_file.
(get_build_id_name, bfd_boolean check_build_id_file): Change type
of second parameter to void pointer. Adjust.
(bfd_follow_build_id_debuglink): Pass address of bfd_build_id
pointer local to find_separate_debug_file.
bfd/
* coffgen.c (_bfd_coff_gc_mark_hook): Handle PE weak
external symbols with a definition.
(_bfd_coff_gc_mark_extra_sections): Fix typo.
ld/
* testsuite/ld-pe/pe.exp: New test.
* testsuite/ld-pe/weakdef-1.s: New test source.
* testsuite/ld-pe/weakdef-1.d: New test.
Use symbolic constants from include/coff/internal.h instead of magic numbers
with add_data_entry()
bfd/ChangeLog:
2017-04-02 Jon Turney <jon.turney@dronecode.org.uk>
(_bfd_XXi_swap_aouthdr_out): For clarity, use defines rather than
numbers for DataDirectory entry indicies passed to
add_data_entry().
Mark an ALLOC section, which should be placed in special memory area,
with SHF_GNU_MBIND. Its sh_info field indicates the special memory
type. GNU_MBIND section names start with ".mbind" so that they are
placed as orphan sections by linker. All input GNU_MBIND sections
with the same sh_type, sh_flags and sh_info are placed in one output
GNU_MBIND section. In executable and shared object, create a
GNU_MBIND segment for each GNU_MBIND section and its segment type is
PT_GNU_MBIND_LO plus the sh_info value. Each GNU_MBIND segment is
aligned at page boundary.
The assembler syntax:
.section .mbind.foo,"adx",%progbits
^ 0: Special memory type.
|
'd' for SHF_GNU_MBIND.
.section .mbind.foo,"adx",%progbits,0x1
^ 1: Special memory type.
|
'd' for SHF_GNU_MBIND.
.section .mbind.bar,"adG",%progbits,.foo_group,comdat,0x2
^ 2: Special memory type.
|
'd' for SHF_GNU_MBIND.
bfd/
* elf.c (get_program_header_size): Add a GNU_MBIND segment for
each GNU_MBIND section and align GNU_MBIND section to page size.
(_bfd_elf_map_sections_to_segments): Create a GNU_MBIND
segment for each GNU_MBIND section.
(_bfd_elf_init_private_section_data): Copy sh_info from input
for GNU_MBIND section.
binutils/
* NEWS: Mention support for ELF SHF_GNU_MBIND and
PT_GNU_MBIND_XXX.
* readelf.c (get_segment_type): Handle PT_GNU_MBIND_XXX.
(get_elf_section_flags): Handle SHF_GNU_MBIND.
(process_section_headers): Likewise.
* testsuite/binutils-all/mbind1.s: New file.
* testsuite/binutils-all/objcopy.exp: Run readelf test on
mbind1.s.
gas/
* NEWS: Mention support for ELF SHF_GNU_MBIND.
* config/obj-elf.c (section_match): New.
(get_section): Match both sh_info and group name.
(obj_elf_change_section): Add argument for sh_info. Pass both
sh_info and group name to get_section. Issue an error for
SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info.
(obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'.
(obj_elf_section): Support SHF_GNU_MBIND section info.
* config/obj-elf.h (obj_elf_change_section): Add argument for
sh_info.
* config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to
obj_elf_change_section.
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
* config/tc-microblaze.c (microblaze_s_data): Likewise.
(microblaze_s_sdata): Likewise.
(microblaze_s_rdata): Likewise.
(microblaze_s_bss): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-msp430.c (msp430_profiler): Likewise.
* config/tc-rx.c (parse_rx_section): Likewise.
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
* doc/as.texinfo: Document 'd' for SHF_GNU_MBIND.
* testsuite/gas/elf/elf.exp: Run section12a, section12b and
section13.
* testsuite/gas/elf/section10.d: Updated.
* testsuite/gas/elf/section10.s: Likewise.
* testsuite/gas/elf/section12.s: New file.
* testsuite/gas/elf/section12a.d: Likewise.
* testsuite/gas/elf/section12b.d: Likewise.
* testsuite/gas/elf/section13.l: Likewise.
* testsuite/gas/elf/section13.d: Likewise.
* testsuite/gas/elf/section13.s: Likewise.
include/
* elf/common.h (PT_GNU_MBIND_NUM): New.
(PT_GNU_MBIND_LO): Likewise.
(PT_GNU_MBIND_HI): Likewise.
(SHF_GNU_MBIND): Likewise.
ld/
* NEWS: Mention support for ELF SHF_GNU_MBIND and
PT_GNU_MBIND_XXX.
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Place
input GNU_MBIND sections with the same type, attributes and
sh_info field into a single output GNU_MBIND section.
* testsuite/ld-elf/elf.exp: Run mbind2a and mbind2b.
* testsuite/ld-elf/mbind1.s: New file.
* testsuite/ld-elf/mbind1a.d: Likewise.
* testsuite/ld-elf/mbind1b.d: Likewise.
* testsuite/ld-elf/mbind1c.d: Likewise.
* testsuite/ld-elf/mbind2a.s: Likewise.
* testsuite/ld-elf/mbind2b.c: Likewise.
We missed a "_gp" when changing the GP symbol. To make sure that
doesn't happen again, we now use the same definition everywhere (thanks,
Nick).
include/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* elf/riscv.h (RISCV_GP_SYMBOL): New define.
bfd/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (GP_NAME): Delete.
(riscv_global_pointer_value): Change GP_NAME to RISCV_GP_SYMBOL.
(_bfd_riscv_relax_lui): Likewise.
opcodes/ChangeLog:
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com>
* riscv-dis.c (riscv_disassemble_insn): Change "_gp" to
RISCV_GP_SYMBOL.
PR binutils/21342
* elflink.c (_bfd_elf_define_linkage_sym): Prevent null pointer
dereference.
(bfd_elf_final_link): Only initialize the extended symbol index
section if there are extended symbol tables to list.
PR binutils/18025
* coff-bfd.h (struct coff_section_data): Add new fields:
saved_bias and bias.
* coffgen.c (coff_find_nearest_line_with_names): Cache the bias
computed for PE binaries.
* dwarf2.c (scan_unit_for_symbols): Only warn once about each
missing abbrev.
include * elf/wasm32.h: New file to support wasm32 architecture.
bfd * cpu-wasm32.c: New file to support wasm32 architecture.
* elf32-wasm32.c: New file to support wasm32 architecture.
* Makefile.am: Add wasm32 architecture.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
If you should somehow link non-pic objects into a PIE or shared
library, resulting in an object with DT_TEXTREL (text relocations)
set, and your executable or shared library also contains GNU indirect
functions, then you're in trouble. To apply dynamic relocations
ld.so will make the text segment writable. On most systems this will
make the text segment non-executable, which will then result in a
segfault when ld.so tries to run ifunc resolvers when applying
relocations against ifuncs.
This patch teaches PowerPC ld to detect the situation, and warn.
* elf64-ppc.c (struct ppc_link_hash_table): Add
local_ifunc_resolver and maybe_local_ifunc_resolver.
(ppc_build_one_stub): Set flags on emitting dynamic
relocation to ifunc.
(ppc64_elf_relocate_section): Likewise.
(ppc64_elf_finish_dynamic_symbol): Likewise.
(ppc64_elf_finish_dynamic_sections): Error on DT_TEXTREL with
local dynamic relocs to ifuncs.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add
local_ifunc_resolver and maybe_local_ifunc_resolver.
(ppc_elf_relocate_section): Set flag on emitting dynamic
relocation to ifuncs.
(ppc_elf_finish_dynamic_symbol): Likewise.
(ppc_elf_finish_dynamic_sections): Error on DT_TEXTREL with local
dynamic relocs to ifuncs.
ppc64_elf_relocate_section lacked a check which meant that it emitted
dynamic relocs against a hidden undefweak symbol for which no dynamic
relocs had been allocated.
PR 21224
PR 20519
* elf64-ppc.c (ppc64_elf_relocate_section): Add missing
dyn_relocs check.
In the last patch I said "The patch also fixes overflow checking".
In fact, there wasn't anything wrong with the previous code. So,
revert that change. The new checks are OK too, so this is just a
tidy.
* elf64-ppc.c (ppc64_elf_ha_reloc): Revert last change.
(ppc64_elf_relocate_section): Likewise.
A number of places in elf32-nios.c created dynamic sections but didn't
set the hash table dynobj. That meant we could have duplicate dynamic
sections connected to a number of bfds, so size_dynamic_sections
didn't properly discard or allocate contents.
Also, the entire set of dynamic sections was created in check_relocs
on seeing GOT relocs, when only .got related sections are needed,
probably done to hide segfaults later in finish_dynamic_sections.
The patch fixes these issues and makes the assembler emit errors when
nios2 lacks the necessary pc-relative relocs for subtraction
expressions, rather than silently generating bad code.
eg. ld-elf/merge. I've also tidied uses of elf32_nios2_hash_table and
elf_hash_table.
bfd/
PR 20995
* elf32-nios2.c (nios2_elf32_relocate_section): Use htab
rather than elf32_nios2_hash_table or elf_hash_table.
(create_got_section): Likewise.
(nios2_elf32_finish_dynamic_symbol): Likewise.
(nios2_elf32_adjust_dynamic_symbol): Likewise.
(nios2_elf32_size_dynamic_sections): Likewise.
(nios2_elf32_check_relocs): Delete dynobj, sgot, and srelgot
vars. Use htab equivalents directly instead. Don't create
all dynamic sections on needing just the GOT. Use a goto
rather than a fall-through with reloc test. Ensure
htab->dynobj is set when making dynamic sreloc section.
(nios2_elf32_finish_dynamic_sections): Delete dynobj, use htab
equivalent directly instead. Don't segfault on looking for
.dynamic when dynamic sections have not been created. Don't
segfault on .got.plt being discarded.
(nios2_elf32_size_dynamic_sections): Delete plt and got vars.
Don't set "relocs" on .rela.plt. Do handle .sbss. Delete
fixme and another not so relevant comment.
(nios2_elf_add_symbol_hook): Delete dynobj var. If not
already set, set hash table dynobj on creating .sbss.
gas/
* config/tc-nios2.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
ld/
* testsuite/ld-elf/merge.d: xfail for nios.
This came up because I was looking at ld/tmpdir/addpcis.o and noticed
the odd addends on REL16DX_HA. They ought to both be -4. The error
crept in due REL16DX_HA howto being pc-relative (as indeed it should
be), and code at gas/write.c:1001 after this comment
/* Make it pc-relative. If the back-end code has not
selected a pc-relative reloc, cancel the adjustment
we do later on all pc-relative relocs. */
*not* cancelling the pc-relative adjustment. So I've made a dummy
non-relative split reloc so that the generic code handles this, rather
than attempting to add hacks later in md_apply_fix which would not be
very robust. Having the new internal reloc also makes it easy to
support
addpcis rx,sym@ha
as an equivalent to
addpcis rx,(sym-0f)@ha
0:
The patch also fixes overflow checking, which must test whether the
addi will overflow too since @l relocs don't have any overflow check.
Lastly, since I was poking at md_apply_fix, I arranged to have the
generic gas/write.c code emit errors for subtraction expressions where
we lack reloc support.
include/
* elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment.
* elf/ppc.h (R_PPC_16DX_HA): Likewise.
bfd/
* reloc.c (BFD_RELOC_PPC_16DX_HA): New.
* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto.
(ppc64_elf_reloc_type_lookup): Translate new bfd reloc.
(ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA.
(ppc64_elf_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto.
(ppc_elf_reloc_type_lookup): Translate new bfd reloc.
(ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis.
(md_apply_fix): Remove fx_subsy check. Move code converting to
pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code
emiiting errors on seeing fx_pcrel set on unexpected relocs, as
that is done now by the generic code via..
* config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define.
(TC_VALIDATE_FIX_SUB): Define.
ld/
* testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at
limits of addpcis range.
I'd made this dynamic section read-only so a flag test distinguished
it from .dynbss, but like any other .data.rel.ro section it really
should be marked read-write. (It is read-only after relocation, not
before.) When using the standard linker scripts this usually doesn't
matter since the output section is among other read-write sections and
not page aligned. However, it might matter in the extraordinary case
of the dynamic section being the only .data.rel.ro section with the
output section just happening to be page aligned and a multiple of a
page in size. In that case the output section would be read-only, and
live it its own read-only PT_LOAD segment, which is incorrect.
* elflink.c (_bfd_elf_create_dynamic_sections): Don't make
dynamic .data.rel.ro read-only.
* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Compare section
rather than section flags when deciding where copy reloc goes.
* elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise.
* elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_finish_dynamic_symbol): Likewise.
* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Likewise.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Likewise.
* elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise.
Interpret the `jalr $0, $25' instruction encoding with an R_MIPS_JALR
relocation attached as an alias to `jr $25' and convert the jump to an
equivalent branch where possible, consequently covering the MIPSr6
architecture for the purpose of this optimization too.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Also handle the
`jalr $0, $25' instruction encoding.
gas/
* testsuite/gas/mips/jalr4.s: Add `jalr $0, $25' instructions.
* testsuite/gas/mips/jalr4.d: Adjust accordingly. Remove MIPSr6
encoding patterns.
* testsuite/gas/mips/jalr4-n64.d: Likewise.
* testsuite/gas/mips/mipsr6@jalr4.d: New test.
* testsuite/gas/mips/mipsr6@jalr4-n32.d: New test.
* testsuite/gas/mips/mipsr6@jalr4-n64.d: New test.
ld/
* testsuite/ld-mips-elf/jalr4.dd: Adjust for `jalr $0, $25'
instructions.
* testsuite/ld-mips-elf/jalr4-r6.dd: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
PR ld/21180
* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Avoid
generating a seg-fault when encountering a symbol that has been
deleted by garbage collection.
This patch fixes a number of issues in the ARC backend.
- The ARC size_dynamic_sections was trashing dynamic section contents,
in particular the .gnu.version_d contents. Those versions
definitions are therefore lost so they do not drain from the strtab,
resulting in assertion failures.
- The code attempting to set DT_TEXTREL was completely bogus.
- The ARC finish_dynamic_sections would segfault on trying to set
sh_entsize for .rela.plt if that section had been discarded.
- arc_create_dynamic_sections wouldn't have ever created dynamics
sections, which was just as well since the places it was called were
way too late to create dynamic sections. Its usefulness then
devolved down to finding just one dynamic section. All the others
packaged into a struct were unused.
- .interp wasn't set for PIEs.
* elf32-arc.c (struct dynamic_sections): Delete.
(enum dyn_section_types): Delete.
(dyn_section_names): Delete.
(arc_create_dynamic_sections): Delete.
(elf_arc_finish_dynamic_sections): Don't call the above. Don't
segfault on discarded .rela.plt section.
(elf_arc_size_dynamic_sections): Formatting. Don't call
arc_create_dynamic_sections. Don't allocate memory for sections
handled by the generic linker. Correct code finding relocs in
read-only sections. Set SEC_EXCLUDE on zero size .got,
.got.plt, and .dynbss sections. Do set .interp for pies.
bfd/ChangeLog:
2017-02-24 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (GP_NAME): New macro.
(riscv_global_pointer_value): Use it.
(_bfd_riscv_relax_lui): If symbol and global pointer are in same
output section, consider only that section's alignment.
Remove separate original NewABI JALR relocation handling, introduced
with commit d06471104a ("relax jalr $t9 [R_MIPS_JALR symbol] to bal
symbol"), <https://sourceware.org/ml/binutils/2003-03/msg00394.html>,
and only used by LD with the `--relax' option specified, and rely solely
on `mips_elf_perform_relocation' code, which has been introduced with
commit 1367d393bb ("On the RM9000 convert jal to bal if in range"),
<https://www.sourceware.org/ml/binutils/2004-12/msg00088.html> and since
made more complete, across all the three ABIs.
Also remove the `--relax' option, now irrelevant, from the tests added
with the former commit.
bfd/
* elfxx-mips.h (_bfd_mips_relax_section): Remove prototype.
* elfxx-mips.c (_bfd_mips_relax_section): Remove function.
* elf64-mips.c (bfd_elf64_bfd_relax_section): Remove macro.
* elfn32-mips.c (bfd_elf32_bfd_relax_section): Likewise.
ld/
* testsuite/ld-mips-elf/relax-jalr-n32.d: Remove `--relax'
option.
* testsuite/ld-mips-elf/relax-jalr-n32-shared.d: Likewise.
* testsuite/ld-mips-elf/relax-jalr-n64.d: Likewise.
* testsuite/ld-mips-elf/relax-jalr-n64-shared.d: Likewise.
Discard R_MIPS_JALR and R_MICROMIPS_JALR relocations associated with
jumps that cannot be converted to an equivalent branch right away in
`mips_elf_calculate_relocation' rather than letting them through to
`mips_elf_perform_relocation'. This includes cross-mode jumps which
need to flip the ISA bit or jumps to a misaligned location that cannot
be encoded with a branch, in addition to preemptible symbol references
already handled.
Cross-mode jumps are actually already rejected as the conversion is made
in `mips_elf_perform_relocation', so in this case this change only saves
some processing. Jumps to a misaligned location are however converted,
with bits causing misalignment lost, making resulting code functionally
different even if the lone effect is avoiding an address error exception
with an instruction fetch at the jump destination requested.
Add test cases suitable, also including GAS verification to confirm that
the JALR relocations explicitly requested have indeed been output in the
intermediate objects used.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR>
<R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p'
or misaligned.
gas/
* testsuite/gas/mips/jalr4.d: New test.
* testsuite/gas/mips/jalr4-n32.d: New test.
* testsuite/gas/mips/jalr4-n64.d: New test.
* testsuite/gas/mips/jalr4.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/jalr4.dd: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
PR 20744
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Correct dst_mask on all VLE
16D relocations.
(ppc_elf_vle_split16): Correct field mask and shift for 16D relocs.
(ppc_elf_relocate_section): Correct calculation for VLE SDAREL
relocs.
ld/
* testsuite/ld-powerpc/vle-reloc-2.s: Use r6 for last insn of
each group.
* testsuite/ld-powerpc/vle-reloc-2.d: Update for above change
and sdarel reloc fix.
Complement commit b531344c34 ("PR ld/20828: Reorder the symbol sweep
stage of section GC") and commit 81ff47b3a5 ("PR ld/20828: Fix linker
script symbols wrongly forced local with section GC") and move symbol
version processing ahead of the symbol sweep stage of section GC, all in
`bfd_elf_size_dynamic_sections', so that version symbols created stay in
the global scope and are not output as local symbols to the dynamic
symbol table in the presence of corresponding symbol definitions pulled
from a DSO involved in a link.
Consolidate the whole of symbol version processing into a single block
from all parts scattered across the function and rearranging the local
variables used as necessary, however leaving the setting of dynamic
entries associated with the DT_VERDEF, DT_VERDEFNUM, DT_VERNEED and
DT_VERNEEDNUM tags and the SEC_EXCLUDE flag for unused `.gnu.version'
section in the original places.
With the rearrangement of code blocks `Elf_Internal_Verneed *t' would
shadow the previous definition of `struct bfd_elf_version_tree *t', so
rename the former variable to `vn'.
bfd/
PR ld/20828
* elflink.c (bfd_elf_size_dynamic_sections): Move symbol version
processing ahead of the call to `elf_gc_sweep_symbol'.
ld/
PR ld/20828
* testsuite/ld-elf/pr20828-d.sd: New test.
* testsuite/ld-elf/pr20828-e.sd: New test.
* testsuite/ld-elf/pr20828-v.od: New test.
* testsuite/ld-elf/pr20828-v.ver: New test version script.
* testsuite/ld-elf/pr20828-v.ld: New test linker script.
* testsuite/ld-elf/pr20828.ld: Add `.gnu.version' and
`.gnu.version_d'.
* testsuite/ld-elf/shared.exp: Run the new tests.
The direct references in objcopy kind of look like a hack to me, so
I'm calling these symbols internal too. Certainly they aren't named
and documented as a public BFD symbol today anyway.
So ... give these bfd-internal symbols with external linkage a _bfd_
prefix to avoid collisions in the global symbol namespace.
While at it, give them names that more closely match the corresponding
option name that toggles them.
Also while at it, fix a few related comment typos.
gdb/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* srec.c (Chunk): Rename to ...
(_bfd_srec_len): ... this.
(S3Forced): Rename to ...
(_bfd_srec_forceS3): ... this.
* objcopy.c: Adjust all references.
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.
bfd/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* archive.c (bsd_write_armap): Rename to ...
(_bfd_bsd_write_armap): ... this.
(coff_write_armap): Rename to ...
(_bfd_coff_write_armap): ... this.
* libbfd-in.h (bsd_write_armap): Rename to ...
(_bfd_bsd_write_armap): ... this.
(coff_write_armap): Rename to ...
(_bfd_coff_write_armap): ... this.
* aout-target.h, aout-tic30.c: Adjust all users.
* libbfd.h: Regenerate.
Give this bfd-internal symbol with external linkage a _bfd_ prefix to
avoid collisions in the global symbol namespace.
bfd/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* bfd-in.h (bfd_read, bfd_write): Adjust to rename.
(warn_deprecated): Rename to ...
(_bfd_warn_deprecated): ... this.
* libbfd.c (warn_deprecated): Rename to ...
(_bfd_warn_deprecated): ... this.
* bfd-in2.h: Regenerate.
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.
bfd/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* bfdio.c (real_ftell): Rename to ...
(_bfd_real_ftell): ... this.
(real_fseek): Rename to ...
(_bfd_real_fseek): ... this.
(real_fopen): Rename to ...
(_bfd_real_fopen): ... this.
* libbfd-in.h (real_ftell): Rename to ...
(_bfd_real_ftell): ... this.
(real_fseek): Rename to ...
(_bfd_real_fseek): ... this.
(real_fopen): Rename to ...
(_bfd_real_fopen): ... this.
* cache.c, dwarf2.c, opncls.c: Adjust all callers.
* libbfd.h: Regenerate.
Give these bfd-internal symbols with external linkage a _bfd_ prefix
to avoid collisions in the global symbol namespace.
bfd/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* dwarf2.c, elf-attrs.c, elf32-nds32.c: Adjust all callers.
* libbfd.c (read_unsigned_leb128): Rename to ...
(_bfd_read_unsigned_leb128): ... this.
(read_signed_leb128): Rename to ...
(_bfd_read_signed_leb128): ... this.
(safe_read_leb128): Rename to ...
(_bfd_safe_read_leb128): ... this.
* libbfd-in.h (read_unsigned_leb128): Rename to ...
(_bfd_read_unsigned_leb128): ... this.
(read_signed_leb128): Rename to ...
(_bfd_read_signed_leb128): ... this.
(safe_read_leb128): Rename to ...
(_bfd_safe_read_leb128): ... this.
* libbfd.h: Renegerate.
When looking up file and line information (used from the linker to
report error messages) if no symbol is passed in, then use the symbol
list to look for a matching symbol.
If a matching symbol is found then use this to look up the file / line
information.
This should improve errors when looking up file / line information for
data sections. Hopefully we should find a matching data symbol, which
should, in turn (we hope) match a DW_TAG_variable in the DWARF, this
should allow us to give accurate file / line errors for data symbols.
As the hope is to find a matching DW_TAG_variable in the DWARF then we
ignore section symbols, and prefer global symbols to locals.
bfd/ChangeLog:
* dwarf2.c (_bfd_dwarf2_find_nearest_line): Perform symbol lookup
before trying to fine matching file and line information.
ld/ChangeLog:
* testsuite/ld-elf/shared.exp: Update expected results.
* testsuite/ld-elf/dwarf2.err: Likewise
When parsing DWARF data in order to report file/line type error messages
we perform section placement to make section addresses unique within
relocatable object files.
Currently, if we reuse previously loaded (and cached) dwarf data then we
neglect to perform section placement, the result is that the section
addresses will not be unique, and we might, incorrectly associate an
address with the wrong debug information, and so report an incorrect
file and line number.
Further we neglect to check that that bfd for which we are looking up
debug information is actually the bfd for which the previous debug
information was loaded, it is possible that we will reuse previously
loaded debug information for a different bfd.
And finally, due to following of gnu_debuglink links in one bfd to
another, the process of checking that the cached debug information is
valid requires us to track the original bfd in the cached debug
information. The original debug information here is either the bfd that
we're interested in, not the bfd we finally load the debug information
from.
bfd/ChangeLog:
* dwarf2.c (struct dwarf2_debug): Add orig_bfd member.
(_bfd_dwarf2_slurp_debug_info): If stashed debug information does
not match current bfd, then reload debug information. Record bfd
we're loading debug info for in the stash. If we have debug
informatin in the cache then perform section placement before
returning.
ld/ChangeLog:
* testsuite/ld-elf/dwarf.exp (build_tests): Add new tests.
* testsuite/ld-elf/dwarf2.err: New file.
* testsuite/ld-elf/dwarf2a.c: New file.
* testsuite/ld-elf/dwarf2b.c: New file.
* testsuite/ld-elf/dwarf3.c: New file.
* testsuite/ld-elf/dwarf3.err: New file.
I misunderstood the hppa alias problem. File offsets of segments need
to be such that no page is mapped twice with different permissions.
(Which still seems to me like something the kernel could fix, but
anyhow, this is not so difficult to achieve in ld.)
PR 21000
bfd/
* elf-bfd.h (struct elf_backend_data): Add no_page_alias.
* elfxx-target.h (elf_backend_no_page_alias): Define.
(elfNN_bed): Init new field.
* elf.c (assign_file_positions_for_load_sections): If no_page_alias
ensure PT_LOAD segment starts on a new page.
* elf32-hppa.c (elf_backend_no_page_alias): Define.
ld/
* testsuite/ld-elf/loadaddr1.d: Adjust for hppa file offsets.
* testsuite/ld-elf/loadaddr2.d: Likewise.
* testsuite/ld-elf/loadaddr3a.d: Likewise.
* testsuite/ld-scripts/rgn-at5.d: Likewise.
This fixes a long-standing hppa bug seen when generating PIEs, and I
think possible to trigger with forced local symbols in shared
libraries. Not allocating enough space for PLT relocs results in ld
writing outside of the buffer.
PR 21132
* elf32-hppa.c (allocate_plt_static): Allocate space for relocs
if pic.
"lea foo@GOT, %reg" is OK in PIC since it only loads the GOT offset
into register, which can be used later with a GOT base register to
get the value in the GOT entry.
bfd/
PR ld/21168
* elf32-i386.c (elf_i386_relocate_section): Allow
"lea foo@GOT, %reg" in PIC.
ld/
PR ld/21168
* testsuite/ld-i386/i386.exp: Run pr21168.
* testsuite/ld-i386/pr21168a.c: New file.
* testsuite/ld-i386/pr21168b.S: Likewise.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Properly get IFUNC
symbol name when reporting R_386_GOT32/R_386_GOT32X relocation
error against local IFUNC symbol without a base register for
PIC.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-4a, pr20244-4b and
pr20244-4c.
* testsuite/ld-i386/pr20244-4.s: New file.
* testsuite/ld-i386/pr20244-4a.d: Likewise.
* testsuite/ld-i386/pr20244-4b.d: Likewise.
* testsuite/ld-i386/pr20244-4c.d: Likewise.
Remove an inconsistency in BFD linker error messages across the PowerPC
backends, where in the presence of line information the `%P: %H:' format
sequence makes the first error message produced for any given function
different from subsequent ones.
Taking the `ld/testsuite/ld-powerpc/tocopt7.s' test case source as an
example and the `powerpc-linux' target we have:
$ as -gdwarf2 -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
ld: tocopt.o: In function `_start':
tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
ld: tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
where the first error message does not have the source file name
prefixed with the linker program executable's name, i.e. `ld:', whereas
the second error message does, as would any subsequent.
This is because with a multiple-line error message such as `%H' produces
`%P' only prints the program executable's name on the first line and not
any later ones. Also the PowerPC backend is the only part of BFD which
uses `%P' along with one of the clever `%C', `%D', `%G', `%H' format
specifiers. And last but not least this breaks a GNU Coding Standard's
requirement that error messages from compilers should look like this:
source-file-name:lineno: message
also quoted in `vfinfo' code handling these specifiers.
Convert `%P: %H:' to `%H:' in error messages across the PowerPC backends
then, yielding:
$ as -gdwarf2 -o tocopt.o -a64 tocopt.s
$ ld -o tocopt -melf64ppc tocopt.o
tocopt.o: In function `_start':
tocopt.s:35:(.text+0x14): toc optimization is not supported for 0x3fa00000 instruction.
tocopt.s:49:(.text+0x34): toc optimization is not supported for 0x3fa00000 instruction.
$
instead, making it consistent and matching the GNU Coding Standard's
requirement.
bfd/
* elf32-ppc.c (ppc_elf_check_relocs): Use `%H:' rather than
`%P: %H:' with `info->callbacks->einfo'.
(ppc_elf_relocate_section): Likewise.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
(ppc64_elf_edit_toc): Likewise.
(ppc64_elf_relocate_section): Likewise.
"_gp" could conflict with ABI-complient code. While it's probably OK
because MIPS uses this name, we figured it'd be good to clean this up
before a release with RISC-V in it.
ld/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* emulparams/elf32lriscv-defs.sh (SDATA_START_SYMBOLS): Change
_gp to __global_pointer$.
bfd/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (riscv_global_pointer_value): Change _gp to
__global_pointer$.
bfd/ChangeLog
2017-02-07 Andrew Waterman <andrew@sifive.com>
* elfnn-riscv.c (riscv_elf_finish_dynamic_sections): Only write PLT
entry size if PLT header is written.
Fixes ld/testsuite/ld-elf/shared.exp "Build libpr16496b.so".
The root cause is in bfd/elf64-sparc.c, elf64_sparc_slurp_one_reloc_table(),
bfd_get_symcount() was used for dynamic mode as well. The fix is to use
bfd_get_dynamic_symcount().
This has been tested with sparc64-linux-gnu, and it does not introduce any
regressions.
bfd/ChangeLog:
2017-02-06 Sheldon Lobo <sheldon.lobo@oracle.com>
Fix sparc64 dynamic relocation processing to use the dynamic
symbol count.
* elf64-sparc.c (elf64_sparc_slurp_one_reloc_table): Use 'dynamic'
to determine if bfd_get_symcount() or bfd_get_dynamic_symcount()
should be used.
PR 21096
bfd * coffcode.h (coff_write_object_contents): Enlarge size of
s_name_buf in order to avoid compile time warning about possible
integer truncation.
* elf32-nds32.c (nds32_elf_ex9_import_table): Mask off lower
32-bits of insn value before printing into buffer.
opcodes * aarch64-opc.c (print_register_list): Ensure that the register
list index will fir into the tb buffer.
(print_register_offset_address): Likewise.
* tic6x-dis.c (print_insn_tic6x): Increase size of func_unit_buf.
Ensure all local symbols precede external symbols in the dynamic symbol
table.
No local symbols are expected to make it to the dynamic symbol table
except for section symbols already taken care of, so this is really a
safeguard only against a potential BFD bug otherwise not so harmful,
which may become a grave one due to a symbol table sorting requirement
violation (see PR ld/20828 for an example). This means however that no
test suite coverage is possible for this change as code introduced here
is not normally expected to trigger.
Logically split then the part of the dynamic symbol table which is not
global offset table mapped, into a local area at the beginning and an
external area following. By the time `mips_elf_sort_hash_table' is
called we have the number of local dynamic symbol table entries (section
and non-section) already counted in `local_dynsymcount', so use it to
offset the external area from the beginning.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Add
`max_local_dynindx'.
(mips_elf_sort_hash_table): Handle it.
(mips_elf_sort_hash_table_f) <GGA_NONE>: For forced local
symbols bump up `max_local_dynindx' rather than
`max_non_got_dynindx'.
Use the `bfd_size_type' data type for dynamic symbol table indices in
the MIPS backend, in line with generic code and removing the need to use
a cast.
bfd/
* elfxx-mips.c (mips_elf_hash_sort_data): Convert the
`min_got_dynindx', `max_unref_got_dynindx' and
`max_non_got_dynindx' members to the `bfd_size_type' data type.
(mips_elf_sort_hash_table): Adjust accordingly.
Make all hash table references throughout `mips_elf_sort_hash_table' use
`htab', simplifying code and improving readability.
bfd/
* elfxx-mips.c (mips_elf_sort_hash_table): Use `htab' throughout
to access the hash table.
Move the assertion on non-NULL `htab' in `mips_elf_sort_hash_table' to
the beginning, before the pointer is dereferenced (`mips_elf_hash_table
(info)' and `elf_hash_table (info)' both point to the same memory
location, differently typed).
bfd/
* elfxx-mips.c (mips_elf_sort_hash_table): Move assertion on
non-NULL `htab' to the beginning.
Complement commit 9d862524f6 ("MIPS: Verify the ISA mode and alignment
of branch and jump targets") and add GAS and LD options to control the
checks for invalid branches between ISA modes introduced there, to help
with some handwritten code lacking `.insn' annotation for labels used as
branch targets and code produced by older versions of GCC which suffers
from the issue with branches to code that has been optimized away,
addressed with GCC commit 242424 ("MIPS/GCC: Mark trailing labels with
`.insn'"), <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01061.html>.
bfd/
* elfxx-mips.h (_bfd_mips_elf_insn32): Rename prototype to...
(_bfd_mips_elf_linker_flags): ... this. Add another parameter.
* elfxx-mips.c (mips_elf_link_hash_table): Add
`ignore_branch_isa' member.
(mips_elf_perform_relocation): Do not treat an ISA mode mismatch
in branch relocation calculation as an error if
`ignore_branch_isa' has been set.
(_bfd_mips_elf_insn32): Rename to...
(_bfd_mips_elf_linker_flags): ... this. Rename the `on'
parameter to `insn32' and add an `ignore_branch_isa' parameter.
Handle the new parameter.
gas/
* config/tc-mips.c (mips_ignore_branch_isa): New variable.
(options): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(md_longopts): Add "mignore-branch-isa" and
"mno-ignore-branch-isa" options.
(md_parse_option): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
(fix_bad_cross_mode_branch_p): Return FALSE if
`mips_ignore_branch_isa' has been set.
(md_show_usage): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa'.
* doc/as.texinfo (Target MIPS options): Add
`-mignore-branch-isa' and `-mno-ignore-branch-isa' options.
(-mignore-branch-isa, -mno-ignore-branch-isa): New options.
* doc/c-mips.texi (MIPS Options): Add `-mignore-branch-isa' and
`-mno-ignore-branch-isa' options.
* testsuite/gas/mips/branch-local-ignore-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-3.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-2.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-3.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* emultempl/mipself.em (ignore_branch_isa): New variable.
(mips_create_output_section_statements): Rename
`_bfd_mips_elf_insn32' called to `_bfd_mips_elf_linker_flags',
add `ignore_branch_isa' argument.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA enum values.
(PARSE_AND_LIST_LONGOPTS): Add "ignore-branch-isa" and
"no-ignore-branch-isa" options.
(PARSE_AND_LIST_OPTIONS): Add `--ignore-branch-isa' and
`--no-ignore-branch-isa'.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_IGNORE_BRANCH_ISA and
OPTION_NO_IGNORE_BRANCH_ISA.
* ld.texinfo (Options specific to MIPS targets): Add
`--ignore-branch-isa' and `--no-ignore-branch-isa' options.
(ld and the MIPS family): Likewise.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1: New test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-mips16: New
test.
* testsuite/ld-mips-elf/unaligned-branch-ignore-micromips: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
PR ld/20995
* elf32-cris.c (elf_cris_size_dynamic_sections): Handle sdynrelro.
(elf_cris_adjust_dynamic_symbol): Place variables copied into the
executable from read-only sections into sdynrelro.
(elf_cris_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
bfd/
* config.bfd (powerpcle-*-rtems*): Do not mark as removed.
(arm-*-rtems*): Move to (arm*-*-eabi*).
(i[3-7]86-*-rtems*): Move to (i[3-7]86-*-elf*).
(m68-*-rtems*): Move to (m68*-*-elf*).
ld/
* configure.tgt (arm-*-rtems*): Move to (arm*-*-eabi*).
(bfin-*-rtems*): Move to (bfin*-*-elf*).
(i[3-7]86-*-rtems*): Move to (i[3-7]86*-*-elf*).
(m68*-*-rtems*): Move to (m68*-*-elf*).
(mips*-*-rtems*): Move to (mips*-*-elf*).
(or1k*-*-rtems*): Move to (or1k*-*-elf*).
(powerpc*-*-rtems*): Move to (powerpc*-*-elf*).
(sparc*-*-rtems*): Move to (sparc*-*-elf*).
(sparc64*-*-rtems*): Move to (sparc64*-*-elf*).
Complement commit 81ff47b3a5 ("PR ld/20828: Fix linker script symbols
wrongly forced local with section GC") and move the symbol sweep stage
of section GC from `elf_gc_sweep' to `bfd_elf_size_dynamic_sections',
avoiding the need to clear the `forced_local' marker, problematic for
targets that have special processing in their `elf_backend_hide_symbol'
handler. Set `mark' instead in `bfd_elf_record_link_assignment' and,
matching changes from commit 3bd43ebcb6 ("ld --gc-sections fail with
__tls_get_addr_opt"), also in PowerPC `__tls_get_addr_opt' handling
code, removing a:
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
test suite failure with the `score-elf' target.
The rationale is it is enough if symbols are swept at the beginning of
`bfd_elf_size_dynamic_sections' as it is only in this function that the
size of the GOT, the dynamic symbol table and other dynamic sections is
determined, which will depend on the number of symbols making it to the
dynamic symbol table. It is also appropriate to do the sweep at this
point as it is already after any changes have been made to symbols with
`bfd_elf_record_link_assignment', and not possible any earlier as calls
to that function are only made just beforehand -- barring audit entry
processing -- via `gld${EMULATION_NAME}_find_statement_assignment'
invoked from `gld${EMULATION_NAME}_before_allocation' which is the ELF
handler for `ldemul_before_allocation'.
bfd/
PR ld/20828
* elflink.c (bfd_elf_record_link_assignment): Revert last
change and don't ever clear `forced_local'. Set `mark'
unconditionally.
(elf_gc_sweep_symbol_info, elf_gc_sweep_symbol): Reorder within
file.
(elf_gc_sweep): Move the call to `elf_gc_sweep_symbol'...
(bfd_elf_size_dynamic_sections): ... here.
* elf32-ppc.c (ppc_elf_tls_setup): Don't clear `forced_local'
and set `mark' instead in `__tls_get_addr_opt' processing.
* elf64-ppc.c (ppc64_elf_tls_setup): Likewise.
This patch fixes a number of issues with powerpc dynamic relocations.
1) Both ppc and ppc64 were emitting more dynamic symbols and
relocations than necessary, due to not supporting static linker
resolution of tls_index entries for __tls_get_addr_opt. This meant
that any @got@tlsgd or @got@tlsld reloc needed to make their symbols
dynamic and generate dptmod and dtprel relocs for the dynamic linker.
That would have been passable, but what happened was that practically
all @got relocations resulted in their symbols being made dynamic and
dynamic relocations emitted against the GOT entries. (Mostly visible
on ppc32 executables since ppc64 gcc really only uses @got style
relocs for TLS.)
2) The PowerOpen syntax was not supported with __tls_get_addr_opt.
DTPMOD/DTPREL relocs on tls_index TOC entries did not use the trick of
forcing dynamic symbols and relocations so those entries always
resulted in the full __tls_get_addr processing. gcc doesn't use the
PowerOpen syntax for TLS, and normally such code would be optimized to
TLS IE or LE so the impact of missing this support was minimal.
3) In an executable, relocations against GNU indirect functions always
used the value of their PLT stub. While this is correct, it is
better in some cases to use a dynamic relocation. An extra dynamic
relocation can mean that calls via function pointers need not bounce
through the PLT stub at runtime.
The patch also tidies the PLT handling code in ppc32
allocate_dynrelocs. Allocating PLT entries after other dynamic relocs
allows the PLT loop to omit special handling for undefined weak
symbols, and that in turn allows the loop to be simplified.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Merge two cases
where dynamic relocs are preferable. Allow ifunc too.
(ensure_undefweak_dynamic): New function.
(allocate_dynrelocs): Use it here. Move plt handling last and
don't make symbols dynamic, simplifying loop. Only make undef
weak symbols with GOT entries dynamic. Correct condition
for GOT relocs. Handle dynamic relocs on ifuncs. Correct
comments. Remove goto.
(ppc_elf_relocate_section): Correct test for using dynamic
symbol on GOT relocs. Rearrange test for emitting GOT relocs
to suit. Set up explicit tls_index entries and implicit GOT
tls_index entries resolvable at link time for
__tls_get_addr_opt. Simplify test to clear mem for prelink.
* elf64-ppc.c (allocate_got): Correct condition for GOT relocs.
(ensure_undefweak_dynamic): New function.
(allocate_dynrelocs): Use it here. Only make undef weak symbols
with GOT entries dynamic. Remove unnecessary test of
WILL_CALL_FINISH_DYNAMIC_SYMBOL in PLT handling.
(ppc64_elf_relocate_section): Correct test for using dynamic
symbol on GOT relocs. Rearrange test for emitting GOT relocs
to suit. Set up explicit tls_index entries and implicit GOT
tls_index entries resolvable at link time for __tls_get_addr_opt.
Simplify expression to clear mem for prelink.
ld/
* testsuite/ld-powerpc/tlsexe.r: Update for fewer dynamic relocs
and symbols.
* testsuite/ld-powerpc/tlsexe.d: Likewise.
* testsuite/ld-powerpc/tlsexe.g: Likewise.
bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode.
ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests.
* testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test.
* testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test.
* testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
bfd/
* elfnn-aarch64.c (elf_aarch64_hash_symbol): New function.
(elf_backend_hash_symbol): Define.
ld/
* testsuite/ld-aarch64/aarch64-elf.exp (aarch64elflinktests): New tests.
* testsuite/ld-aarch64/func-in-so.s: New test source file.
* testsuite/ld-aarch64/func-sym-hash-opt.s: Likewise.
* testsuite/ld-aarch64/func-sym-hash-opt.d: New expected test result.
Fix a generic ELF linker regression introduced with a chain of changes
made to unused input section garbage collection:
- commit 1a766c6843 ("Also hide symbols without PLT nor GOT
references."),
<https://sourceware.org/ml/binutils/2011-09/msg00076.html>,
- commit 1d5316ab67 ("PR ld/13177: garbage collector retains zombie
references to external libraries"),
<https://sourceware.org/ml/binutils/2011-10/msg00161.html>,
- commit 6673f753c0 ("Fix PR 12772, garbage collection of dynamic
syms"), <https://sourceware.org/ml/binutils/2011-12/msg00077.html>,
causing the garbage collection of unused symbols present in a DSO
involved in a link to make identically named symbols ordinarily defined
(i.e. not hidden or PROVIDEd) by a linker script local, even though the
latter symbols are supposed to be global as if no DSO defined them as
well.
This is because linker script assignments are processed very late as
`lang_process' proceeds, down in the call to `ldemul_before_allocation',
which is made after the call to `lang_gc_sections' to do input section
garbage collecting. Consequently if unused, then any such DSO-defined
symbol has already been garbage-collected and internally marked local.
It would ordinarily be removed from dynamic symbol table output, however
a linker script assignment correctly replaces its original definition
with the new one and enters it into the dynamic symbol table produced as
it is supposed to be exported. The original local marking is however
retained making the symbol local in the dynamic symbol table and
therefore not available externally. This also causes a sorting problem
with the MIPS target, which does not expect non-section local dynamic
symbols to be output and produces an invalid binary.
Fix the problem then, by removing the `forced_local' marking for the
offending case and add suitable test cases. First to verify that unused
symbols ordinarily defined with linker script assignments remain
exported in the context of input section garbage collection whether or
not a DSO defining identically named symbols is present in the link.
Second that a linker version script still correctly retains or removes
such symbols as requested.
bfd/
PR ld/20828
* elflink.c (bfd_elf_record_link_assignment): Clear any
`forced_local' marking for DSO symbols that are not being
provided.
ld/
PR ld/20828
* testsuite/ld-elf/pr20828-1.sd: New test.
* testsuite/ld-elf/pr20828-2a.sd: New test.
* testsuite/ld-elf/pr20828-2b.sd: New test.
* testsuite/ld-elf/pr20828.ld: New test linker script.
* testsuite/ld-elf/pr20828.ver: New test version script.
* testsuite/ld-elf/pr20828.s: New test source.
* testsuite/ld-elf/shared.exp: Run the new test.
Also generate unwind info for the .plt.bnd section. Sine it is the same
as unwind info for the .plt.got section, we use unwind info for the
.plt.got section to cover the the .plt.bnd section.
bfd/
PR ld/21038
* elf64-x86-64.c (elf_x86_64_link_hash_table): Add
plt_bnd_eh_frame.
(elf_x86_64_check_relocs): Create .eh_frame section for the
.plt.bnd section.
(elf_x86_64_size_dynamic_sections): Allocate and initialize
.eh_frame section for the .plt.bnd section.
(elf_x86_64_finish_dynamic_sections): Adjust .eh_frame section
for the .plt.bnd section.
ld/
PR ld/21038
* testsuite/ld-x86-64/pr21038b.d: Updated.
* testsuite/ld-x86-64/pr21038c.d: New file.
* testsuite/ld-x86-64/pr21038c.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr21038c.
PR binutils/20876
bfd * opncls.c (find_separate_debug_file): Add include_dirs
parameter. Only include the directory part of the bfd's filename
in search paths if include_dirs is true. Add a couple of extra
locations for looking for debug files.
( bfd_follow_gnu_debuglink): Update invocation of
find_separate_debug_file.
(bfd_follow_gnu_debugaltlink): Likewise.
(get_build_id): New function: Finds the build-id of the given bfd.
(get_build_id_name): New function: Computes the name of the
separate debug info file for a bfd, based upon its build-id.
(check_build_id_file): New function: Checks to see if a separate
debug info file exists at the given location, and that its
build-id matches that of the original bfd.
(bfd_follow_build_id_debuglink): New function: Finds a separate
debug info file for a given bfd by using the build-id method.
* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Try using the build-id
method of locating a separate debug info file before using the
debuglink method.
* bfd-in2.h: Regenerate.
binutils * NEWS: Mention the new feature.
* testsuite/binutils-all/objdump.exp (test_build_id_debuglink):
New proc to test the location of separate debug info files using
the build-id method.
bfd * config.bfd: Add entries for i686-redox and x86_64-redox.
gas * configure.tgt: Add entry for i386-redox.
ld * configure.tgt: Add entries for x86-redox and x86_64-redox.
When there are both PLT and GOT references to the same function symbol,
linker combines GOTPLT and GOT slots into a single GOT slot and create
an entry in .plt.got section for PLT access via the GOT slot. This
patch adds unwind info for .plt.got section.
bfd/
PR ld/20830
* elf32-i386.c (elf_i386_eh_frame_plt_got): New.
(PLT_GOT_FDE_LENGTH): Likewise.
(elf_i386_plt_layout): Add eh_frame_plt_got and
eh_frame_plt_got_size.
(elf_i386_plt): Updated.
(elf_i386_link_hash_table): Add plt_got_eh_frame.
(elf_i386_check_relocs): Create .eh_frame section for .plt.got.
(elf_i386_size_dynamic_sections): Allocate and initialize
.eh_frame section for .plt.got.
(elf_i386_finish_dynamic_sections): Adjust .eh_frame section for
.plt.got.
(elf_i386_nacl_plt): Add FIXME for eh_frame_plt_got and
eh_frame_plt_got_size.
* elf64-x86-64.c (elf_x86_64_eh_frame_plt_got): New.
(PLT_GOT_FDE_LENGTH): Likewise.
(elf_x86_64_backend_data): Add eh_frame_plt_got and
eh_frame_plt_got_size.
(elf_x86_64_arch_bed): Updated.
(elf_x86_64_bnd_arch_bed): Add FIXME for eh_frame_plt_got and
eh_frame_plt_got_size.
(elf_x86_64_nacl_arch_bed): Likewise.
(elf_x86_64_link_hash_table): Add plt_got_eh_frame.
(elf_x86_64_check_relocs): Create .eh_frame section for .plt.got.
(elf_x86_64_size_dynamic_sections): Allocate and initialize
.eh_frame section for .plt.got.
(elf_x86_64_finish_dynamic_sections): Adjust .eh_frame section
for .plt.got.
ld/
PR ld/20830
* testsuite/ld-i386/i386.exp: Run pr20830.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/pr20830.d: New file.
* testsuite/ld-i386/pr20830.s: Likewise.
* testsuite/ld-x86-64/pr20830.d: Likewise.
* testsuite/ld-x86-64/pr20830.s: Likewise.
Use eh_frame_plt_size and eh_frame_plt from elf_i386_plt_layout for
.eh_frame covering the .plt section.
* elf32-i386.c (elf_i386_size_dynamic_sections): Set
plt_eh_frame->size to eh_frame_plt_size and use eh_frame_plt.
bfd * dwarf2.c (lookup_address_in_function_table): Return early if
there are no functions in the given comp unit, or if the high
address of the last function in the comp unit is less than the
desired address.
binutils * objdump.c (display_file): Add new parameter 'last_file'. If
last_file is true, do not call bfd_close at the end of the
function.
(main): Set the value of the last_file parameter when calling
display_file.
Building PIE executable from non-PIC code results in broken binaries.
With this patch the problem is detected at link-time.
bfd/ChangeLog:
2017-01-07 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* elf64-s390.c (elf_s390_relocate_section): Issue error for
non-PLT relocs of shared libary symbol in exectuable.
Without this, ld has been seen to crash in libc when freeing tsec_free:
*** Error in `/usr/bin/ld': double free or corruption (!prev): 0x0000000120ceb6a0 ***
_bfd_elf_link_read_relocs will always return the cached value if
present, even if keep_memory is false, therefore setting tsec_free to
NULL only when keep_memory is true is not sufficient.
* elf64-alpha.c (elf64_alpha_relax_opt_call): Don't set tsec_free
if relocs are cached.
Fixes: tmpdir/pr14525: symbol lookup error: tmpdir/pr14525: undefined
symbol: __executable_start
FAIL: PIE PR ld/14525
* elf32-hppa.c (ensure_undef_weak_dynamic): New function.
(allocate_plt_static, allocate_dynrelocs): Use it.
This flag should be set for any section header using sh_info to
point to another section.
Fixes a readelf warning about an unexpected value in info field,
resulting in FAIL: Build warn libbar.so
* elf-hppa.h (elf_hppa_fake_sections): Set SHF_INFO_LINK for
.PARISC.unwind section.
PR ld/20989
* elfxx-sparc.c (gdop_relative_offset_ok): New function.
(_bfd_sparc_elf_relocate_section): Use it to validate GOT
indirect to GOT pointer relative code edit.
A while ago HJ fixed PR ld/18720 with commit 6e33951ed, which, among
other things, modified _bfd_elf_link_hash_copy_indirect to not copy
ref_dynamic, ref_regular, ref_regular_nonweak, non_got_ref, needs_plt
and pointer_equality_needed when setting up an indirect non-versioned
symbol pointing to a non-default versioned symbol. I didn't notice at
the time, but the pr18720 testcase fails on hppa-linux with
"internal error, aborting at binutils-gdb-2.28/bfd/elf32-hppa.c:3933
in elf32_hppa_relocate_section".
Now hppa-linux creates entries in the plt even for local functions, if
they are referenced using plabel (function pointer) relocations. So
needs_plt is set for foo when processing pr18720a.o. When the aliases
in pr28720b.o are processed, we get an indirection from foo to
foo@FOO, but don't copy needs_plt. Since foo@FOO is the "real" symbol
that is used after that point, no plt entry is made for foo and we
bomb when relocating the plabel.
As shown by the hppa-linux scenario, needs_plt should be copied even
for non-default versioned symbols. I believe all of the others ought
to be copied too, with the exception of ref_dynamic. Not copying
ref_dynamic is right because if a shared lib references "foo" it
should not be satisfied by any non-default version "foo@FOO".
* elflink.c (_bfd_elf_link_hash_copy_indirect): Only omit
copying one flag, ref_dynamic, when versioned_hidden.
* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_copy_indirect_symbol): Use same
logic for copying weakdef flags. Copy plabel flag and merge
tls_type.
* elf32-i386.c (elf_i386_copy_indirect_symbol): Use same logic
for copying weakdef flags.
* elf32-ppc.c (ppc_elf_copy_indirect_symbol): Likewise.
* elf32-s390.c (elf_s390_copy_indirect_symbol): Likewise.
* elf32-sh.c (sh_elf_copy_indirect_symbol): Likewise.
* elf64-s390.c (elf_s390_copy_indirect_symbol): Likewise.
* elfnn-ia64.c (elfNN_ia64_hash_copy_indirect): Likewise.
* elf64-x86-64.c (elf_x86_64_copy_indirect_symbol): Likewise.
Simplify.
PR ld/20995
bfd/
* elflink.c (elf_link_add_object_symbols): Mark relro sections
in dynamic objects SEC_READONLY.
ld/
* testsuite/ld-elf/pr20995c.s: New test file.
* testsuite/ld-elf/pr20995-2so.r: Likewise.
* testsuite/ld-elf/elf.exp: Run it.
Variables defined in shared libraries are copied into an executable's
.bss section when code in the executable is non-PIC and thus would
require dynamic text relocations to access the variable directly in
the shared library. Recent x86 toolchains also copy variables into
the executable to gain a small speed improvement.
The problem is that if the variable was originally read-only, the copy
in .bss is writable, potentially opening a security hole. This patch
cures that problem by putting the copy in a section that becomes
read-only after ld.so relocation, provided -z relro is in force.
The patch also fixes a microblaze linker segfault on attempting to
use dynamic bss variables.
bfd/
PR ld/20995
* elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and
sreldynrelro.
(struct elf_backend_data): Add want_dynrelro.
* elfxx-target.h (elf_backend_want_dynrelro): Define.
(elfNN_bed): Update initializer.
* elflink.c (_bfd_elf_create_dynamic_sections): Create
sdynrelro and sreldynrelro sections.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables
copied into the executable from read-only sections into sdynrelro.
(elf32_arm_size_dynamic_sections): Handle sdynrelro.
(elf32_arm_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol)
(elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-i386.c (elf_i386_adjust_dynamic_symbol)
(elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol)
(elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol)
(microblaze_elf_size_dynamic_sections)
(microblaze_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol)
(nios2_elf32_adjust_dynamic_symbol)
(nios2_elf32_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol)
(or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol)
(ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol)
(elf32_tic6x_size_dynamic_sections)
(elf32_tic6x_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol)
(tilepro_elf_size_dynamic_sections)
(tilepro_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol)
(ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol)
(elf_x86_64_size_dynamic_sections)
(elf_x86_64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol)
(elfNN_aarch64_size_dynamic_sections)
(elfNN_aarch64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol)
(riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol)
(_bfd_mips_elf_size_dynamic_sections)
(_bfd_mips_vxworks_finish_dynamic_symbol): As above.
* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol)
(_bfd_sparc_elf_size_dynamic_sections)
(_bfd_sparc_elf_finish_dynamic_symbol): As above.
* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol)
(tilegx_elf_size_dynamic_sections)
(tilegx_elf_finish_dynamic_symbol): As above.
* elf32-mips.c (elf_backend_want_dynrelro): Define.
* elf64-mips.c (elf_backend_want_dynrelro): Define.
* elf32-sparc.c (elf_backend_want_dynrelro): Define.
* elf64-sparc.c (elf_backend_want_dynrelro): Define.
* elf32-tilegx.c (elf_backend_want_dynrelro): Define.
* elf64-tilegx.c (elf_backend_want_dynrelro): Define.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy.
(microblaze_elf_size_dynamic_sections): Handle sdynbss.
* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use
of linker shortcuts to dynamic sections rather than comparing
names. Correctly set "got" flag.
ld/
PR ld/20995
* testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed
stub hash table traversal caused by section id increment. Accept
the previous output too.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib.d: Likewise.
* testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s,
* testsuite/ld-elf/pr20995.r: New test.
* testsuite/ld-elf/elf.exp: Run it.
Revert commit 17733f5be9 ("Increment the ABIVERSION to 5 for MIPS
objects with non-executable stacks.") and remove EI_ABIVERSION 5
allocation for PT_GNU_STACK support, which has not made it to glibc
and will be reassigned.
bfd/
* bfd/elfxx-mips.c (_bfd_mips_post_process_headers): Revert
2016-02-23 change and remove EI_ABIVERSION 5 support.
This allows targets that have target specific code to add object
symbols to make use of the generic archive handling.
* linker.c (generic_link_check_archive_element): Call target
bfd_link_add_symbols to add element symbols.
Nothing calls them and they were in the way of a bug fix.
* linker.c (generic_link_add_symbols): Delete. Merge into..
(_bfd_generic_link_add_symbols): ..here.
(generic_link_check_archive_element_no_collect): Delete.
(generic_link_check_archive_element_collect): Likewise.
(generic_link_add_object_symbols): Remove "collect" param. Update
callers.
(generic_link_add_symbol_list): Likewise.
(generic_link_check_archive_element): Likewise. Call
bfd_link_add_symbols rather than generic_link_add_object_symbols.
* libbfd-in.h (_bfd_generic_link_add_symbols_collect): Delete.
* libbfd.h: Regenerate.
This stops an --enable-targets selection affecting the main target in
regards to forcing 64-bit archives. It also means mips64 and s390x
will revert to binutils-2.25 and binutils-2.26 behaviour of not
forcing 64-bit archives at least in the common case when plugins were
enabled.
PR binutils/20464
PR binutils/14625
* configure.ac: Revert 2016-05-25 configure change setting
want_64_bit_archive for mips64 and s390x. Revise USE_64_BIT_ARCHIVE
description.
* configure: Regenerate.
* config.in: Regenerate.
Contrary to the comment, they can in fact be called.
* libbfd-in.h (_bfd_vms_lib_slurp_armap): Use _bfd_noarchive function.
(_bfd_vms_lib_slurp_extended_name_table: Likewise.
(_bfd_vms_lib_construct_extended_name_table: Likewise.
(_bfd_vms_lib_truncate_arname: Likewise.
(_bfd_vms_lib_write_armap: Likewise.
(_bfd_vms_lib_read_ar_hdr: Likewise.
(_bfd_vms_lib_write_ar_hdr: Likewise.
* libbfd.h: Regenerate.
ILP32 has 32-bit word and address, but currently they declared as 64-bit in
bfd_aarch64_arch_ilp32, which breaks further logic of bfd. This patch fixes it.
Glibc testsuite build with patched binutils shows that next tests stop to fail:
iconvdata/mtrace-tst-loading
iconvdata/tst-loading
iconvdata/tst-tables
localedata/mtrace-tst-leaks
localedata/tst-leaks
posix/tst-getaddrinfo4
posix/tst-getaddrinfo5
posix/tst-regex2
We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI. We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.
Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive. Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.
This patch implements these two new flags and removes the old flags that
could conflict with these. There wasn't a RISC-V release before, so we
want to just support a clean flag set.
include/
* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
* readelf.c (get_machine_flags): Use
EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
* config/tc-riscv.h (xlen): Delete.
* config/tc-riscv.c (xlen): Make static.
(abi_xlen): New variable.
(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
with OPTION_MABI.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(riscv_elf_final_processing): Likewise.
* doc/as.texinfo (Target RISC-V options): Likewise.
* doc/c-riscv.texi (OPTIONS): Likewise.
* config/tc-riscv.c (float_mode): Removed.
(float_abi): New type, specifies the floating-point ABI.
(riscv_set_abi): New function.
(riscv_add_subset): Only allow lower-case ISA names and require
them to start with "rv".
(riscv_after_parse_args): Likewise.
opcodes/
* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
XLEN when none is provided.
Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them. This patch
significantly reworks how we handle linker relaxations:
* DWARF is now properly supported
* There is a ".option norelax" to disable relaxations, for when users
write assembly that can't be relaxed (if it's to be later patched up,
for example).
* There is an additional _RELAX relocation that specifies when previous
relocations can be relaxed.
We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).
Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!
include/
* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
(BFD_RELOC_RISCV_TPREL_S): Likewise.
(BFD_RELOC_RISCV_RELAX): Likewise.
(BFD_RELOC_RISCV_CFA): Likewise.
(BFD_RELOC_RISCV_SUB6): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET8): Likewise.
(BFD_RELOC_RISCV_SET16): Likewise.
(BFD_RELOC_RISCV_SET32): Likewise.
* elfnn-riscv.c (perform_relocation): Handle the new
relocations.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Likewise.
(howto_table): Likewise.
(riscv_reloc_map): Likewise.
(relax_func_t): New type.
(_bfd_riscv_relax_call): Add reserve_size argument, which
controls the maximal offset pessimism. Correct type of max_alignment.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_section): Compute the required reserve size
when relocating and use it to when calling relax_func.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
gas/
* config/tc-riscv.c (riscv_set_options): Add relax.
(riscv_opts): Likewise.
(s_riscv_option): Add relax and norelax.
(riscv_apply_const_reloc): New function.
(append_insn): Move constant relocation handling to
riscv_apply_const_reloc.
(md_pcrel_from): Likewise.
(parse_relocation): Skip BFD_RELOC_UNUSED.
(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
(md_apply_fix): Likewise.
(riscv_pre_output_hook): New function.
* config/tc-riscv.h (md_pre_output_hook): Define.
(riscv_pre_output_hook): Declare.
(DWARF_CIE_DATA_ALIGNMENT): Always -4.
This is a mixed bag of format changes:
* Replacing constants with macros (0xffffffff with MINUS_ONE, for
example). There's one technically functional change in here (some
MINUS_ONEs are changed to 0), but it only changes the behavior of an
otherwise-unused field.
* Using 0 instead of 0x0 in the relocation table.
* There were some missing spaces before parens, the spaces have been
added.
* A handful of comments are now more descriptive.
* A bunch of whitespace-only changes, mostly alignment and brace
newlines.
bfd/
* elfnn-riscv.c: Formatting and comment fixes throughout.
* elfxx-riscv.c: Likewise.
(howto_table): Change the src_mask field from MINUS_ONE to 0 for
R_RISCV_TLS_DTPMOD32, R_RISCV_TLS_DTPMOD64, R_RISCV_TLS_DTPREL32,
R_RISCV_TLS_DTPREL64, R_RISCV_TLS_TPREL32, R_RISCV_TLS_TPREL64.
opcodes/
* riscv-opc.c: Formatting fixes.
gas/
* config/tc-riscv.c: Formatting and comment fixes throughout.
I recently ran into this error message and found it's not helpful: it
just tells me some temporary file can't be linked. This slightly
improved one at least tells me it's because of an elf32/elf64 conflict.
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Improve
error message when linking elf32 and elf64.
bfd/elf32_arm.c contains a function 'popcount' which conflicts
with a function of the same name in NetBSD's libc.
This change also changes popcount's 'sum' variable to signed
since the function returns a signed integer.
bfd/
* elf32-arm.c (elf32_arm_popcount): Rename from 'popcount'. Make
'sum' local variable signed.
Respect any ASE flags recorded in ELF file structures for the purpose of
selecting instructions to be disassembled, preventing code from being
hex-dumped even though having been clearly indicated as valid at the
assembly time. Use date from the MIPS ABI flags structure if present,
and otherwise there may be an MDMX ASE flag set in the ELF file header.
For backwards compatibility only set extra flags and do not clear any,
preserving all previously set by the architecture selected to be
disassembled for.
include/
* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
typedef as `elf_internal_abiflags_v0'.
bfd/
* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
(bfd_mips_elf_get_abiflags): New prototype.
* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
* bfd-in2.h: Regenerate.
opcodes/
* mips-dis.c (mips_convert_abiflags_ases): New function.
(set_default_mips_dis_options): Also infer ASE flags from ELF
file structures.
binutils/
* testsuite/binutils-all/mips/mips-ase-1.d: New test.
* testsuite/binutils-all/mips/mips-ase-2.d: New test.
* testsuite/binutils-all/mips/mips-ase-3.d: New test.
* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl __tls_get_addr => add R0, R0, TCB_SIZE
But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);
Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.
The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);
But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.
There are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.
Yury
* bfd/elfnn-aarch64.c: fix TLS relaxations for ilp32 where
TCB_SIZE is used.
* ld/testsuite/ld-aarch64/aarch64-elf.exp: Add tests for the case.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-small-ilp32.d: New file.
* ld/testsuite/ld-aarch64/tls-relax-ld-le-tiny-ilp32.d: New file.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
TCB_SIZE is 2*sizeof(void *), which is 0x10 for lp64, and 0x8 for
ilp32. During relaxation, ld goes to do a replace:
bl __tls_get_addr => add R0, R0, TCB_SIZE
But actual implementation is:
bfd_putl32 (0x91004000, contents + rel->r_offset + 4);
Which is equivalent of add x0, x0, 0x10. This is wrong for ilp32.
The possible fix for it is:
bfd_putl32 (0x91000000 | (TCB_SIZE<<10), contents + rel->r_offset + 4);
But ilp32 also needs w-registers, so it's simpler to put proper
instruction in #if/#else condition.
THere are 2 such relaxations in elfNN_aarch64_tls_relax(), and so 2 new
tests added for ilp32 mode to test it.
Yury
HPPA64 needs to add a DT_PHDR header for shared libs. That's fine
when linking but shouldn't happen for strip/objcopy. Also PHDR must
come first so there's no need to look at all program headers.
bfd/
* elf64-hppa.c (elf64_hppa_modify_segment_map): Don't add PHDR
for objcopy/strip or when a ld script specifies PHDRS.
ld/
* testsuite/ld-elf/nobits-1.d: Remove xfail for hppa64.
* testsuite/ld-elf/note-1.d: Likewise.
* testsuite/ld-elf/note-2.d: Likewise.
RX does horrible fudges to PT_LOAD p_vaddr, that affect the testsuite
and mean the target won't support dynamic objects. The latter
probably doesn't matter too much since RX is an embedded target, but
it's easy to stop some of the fudges in order to reduce special cases
for RX in the testsuite. The changes make sense in isolation too.
bfd/
* elf32-rx.c (elf32_rx_modify_program_headers): Don't adjust
segments that include the ELF file header or program headers.
ld/
* testsuite/ld-elf/flags1.d: Run for RX.
* testsuite/ld-scripts/phdrs.exp: Likewise.
* testsuite/ld-scripts/pr14962.d: Likewise.
* testsuite/ld-scripts/pr14962-2.d: Likewise.
Recognize power9 and a few other insns from older machines. Fixes
linker complaints like "toc optimization is not supported for
0xf4090002 instruction". 0xf4090002 is stxsd v0,0(r9)
bfd/
* elf64-ppc.c (ok_lo_toc_insn): Add r_type param. Recognize
lq,lfq,lxv,lxsd,lxssp,lfdp,stq,stfq,stxv,stxsd,stxssp,stfdp.
Don't match lmd and stmd.
ld/
* testsuite/ld-powerpc/tocopt7.s,
* testsuite/ld-powerpc/tocopt7.out,
* testsuite/ld-powerpc/tocopt7.d: New test.
* testsuite/ld-powerpc/tocopt8.s,
* testsuite/ld-powerpc/tocopt8.d: New test.
* testsuite/ld-powerpc/powerpc.exp: Run them.
bfd/ChangeLog:
2016-12-05 Alyssa Milburn <amilburn@zall.org>
* elfxx-sparc.c: Do not stop processing relocations after
partially relaxing a call with WDISP30.
ld/ChangeLog:
2016-12-05 Alyssa Milburn <amilburn@zall.org>
* testsuite/ld-sparc/wdispcall.s: New file.
* testsuite/ld-sparc/wdispcall.dd: Likewise.
* testsuite/ld-sparc/sparc.exp: Run new test.
Lots of fixes for the compatibility code that handles linking of
-mcall-aixdesc code (or that generated by 12 year old gcc) with
current ELFv1 ABI code.
1) A reference to a dot-symbol in an object file wasn't satisfied by a
function descriptor in later object files.
2) The as-needed code had bit-rotted; Shared libs now need a strong
reference to be counted as needed.
3) --gc-sections involving dot-symbols was broken, needing
func_desc_adjust to be run early and lots of other fixes.
bfd/
* elf64-ppc.c (struct ppc_link_hash_entry): Delete "was_undefined".
(struct ppc_link_hash_table): Delete "twiddled_syms". Add
"need_func_desc_adj".
(lookup_fdh): Link direct fdh sym via oh field and set flags.
(make_fdh): Make strong and weak undefined function descriptor
symbols.
(ppc64_elf_merge_symbol): New function.
(elf_backend_merge_symbol): Define.
(ppc64_elf_archive_symbol_lookup): Don't test undefweak for fake
function descriptors.
(add_symbol_adjust): Don't twiddle symbols to undefweak.
Propagate more ref flags to function descriptor symbol. Make
some function descriptor symbols dynamic.
(ppc64_elf_before_check_relocs): Only run add_symbol_adjust for
ELFv1. Set need_func_desc_adj. Don't fix undefs list.
(ppc64_elf_check_relocs): Set non_ir_ref for descriptors.
Don't call lookup_fdh here.
(ppc64_elf_gc_sections): New function.
(bfd_elf64_bfd_gc_sections): Define.
(ppc64_elf_gc_mark_hook): Mark descriptor.
(func_desc_adjust): Don't make fake function descriptor syms strong
here. Exit earlier on non-dotsyms. Take note of elf.dynamic
flag when deciding whether a dynamic function descriptor might
be needed. Transfer elf.dynamic and set elf.needs_plt. Move
plt regardless of visibility. Make descriptor dynamic if
entry sym is dynamic, not for other cases.
(ppc64_elf_func_desc_adjust): Don't run func_desc_adjust if
already done.
(ppc64_elf_edit_opd): Use oh field rather than lookup_fdh.
(ppc64_elf_size_stubs): Likewise.
(ppc_build_one_stub): Don't clear was_undefined. Only set sym
undefweak if stub symbol is defined.
(undo_symbol_twiddle, ppc64_elf_restore_symbols): Delete.
* elf64-ppc.h (ppc64_elf_restore_symbols): Don't declare.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't call
ppc64_elf_restore_symbols.
* testsuite/ld-powerpc/dotsym1.d: New.
* testsuite/ld-powerpc/dotsym2.d: New.
* testsuite/ld-powerpc/dotsym3.d: New.
* testsuite/ld-powerpc/dotsym4.d: New.
* testsuite/ld-powerpc/dotsymref.s: New.
* testsuite/ld-powerpc/nodotsym.s: New.
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
It's possible but unlikely that an indirect symbol points at a warning
symbol.
* elf64-ppc.c (add_symbol_adjust): Correct order of tests for
warning and indirect symbols.
As per _bfd_elf_link_hash_copy_indirect.
* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Don't copy dynamic
flags when direct symbol is versioned_hidden.
_bfd_elf_make_section_from_shdr calls elf_parse_notes with an offset
of -1. This argument is used to calculate Elf_Internal_Note.descpos,
which ends up set to a positive but meaningless value. This commit
updates _bfd_elf_make_section_from_shdr to pass the correct offset to
elf_parse_notes, making Elf_Internal_Note.descpos correct in all cases.
bfd/ChangeLog:
* elf.c (_bfd_elf_make_section_from_shdr): Pass offset to
elf_parse_notes.
* configure.ac: Add fuchsia to targets that use ELF.
* configure: Regenerated.
bfd * configure.tgt: Add support for fuchsia (OS).
gas * configure.tgt: Add support for fuchsia (OS).
ld * Makefile.am: Add dependency information for earmelf_fuchsia.c.
* Makefile.in: Regenerate.
* configure.tgt: Add support for aarch64-*-fuchsia, arm*-*-fuchsia*, and
x86_64-*-fuchsia* targets.
* emulparams/armelf_fuchsia.sh: New file.
* emulparams/armelfb_fuchsia.sh: New file.
PR ld/20868
bfd * elfnn-aarch64.c (elfNN_aarch64_tls_relax): Use 32-bit accesses
to the GOT when operating in 32-bit mode.
ld * testsuite/ld-aarch64/tls-relax-gd-ie-ilp32.d: New test.
* testsuite/ld-aarch64/relocs-ilp32.ld: Linker script for the new
test.
* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
The PR20886 binary is large enough that there are two stub sections
servicing .text (which is 88M). It so happens that between one
iteration of sizing and the next that one stub section grows while
the other shrinks. Since one section is always growing, the loop
never terminates.
This patch changes the algorithm to not update previous size on
shrinking, once we go past a certain number of iterations.
PR ld/20886
* elf64-ppc.c (ppc64_elf_size_stubs): Make rawsize max size seen
on any pass past STUB_SHRINK_ITER.
A hidden versioned symbol in executable should be forced local if it is
locally defined, not referenced by shared library and not exported. We
must do it before _bfd_elf_link_renumber_dynsyms.
bfd/
* elflink.c (_bfd_elf_fix_symbol_flags): Hide hidden versioned
symbol in executable.
(elf_link_output_extsym): Don't change bind from global to
local when linking executable.
ld/
* testsuite/ld-elf/indirect.exp: Add a test for PR 18720.
* testsuite/ld-elf/pr18720.rd: New file.
bfd/
PR target/20737
* elf32-arm.c (elf32_arm_final_link_relocate): Bind defined symbol
locally in PIE.
ld/
* testsuite/ld-arm/pie-bind-locally-a.s: New test source.
* testsuite/ld-arm/pie-bind-locally-b.s: Likewise.
* testsuite/ld-arm/pie-bind-locally.d: New testcase.
* testsuite/ld-arm/arm-elf.exp: Run new testcase.
PR ld/20815
bfd * elf.c (elf_modify_segment_map): Allow empty LOAD segments if
they contain the program headers.
(_bfd_elf_map_sections_to_segments): If the linker created the
PHDR segment then always attempt to include it in a LOAD segment.
(assign_file_positions_for_non_load_sections): Allow LOAD segments
to overlap PHDR segments.
(phdr_sorter): New function. Sorts program headers.
(assign_file_positions_except_relocs): Sort the program headers
before writing them out. Issue an error if the PHDR segment is
not covered by a LOAD segment, unless the backend allows it.
* elf-bfd.h (struct elf_backend_data): Add
elf_backend_allow_non_load_phdr.
* elfxx-target.h (elf_backend_allow_non_load_phdr): Provide
default definition that returns FALSE.
(elfNN_bed): Initialise the elf_backend_allow_non_load_phdr
field.
* elf64-hppa.c (elf64_hppa_allow_non_load_phdr): New function.
Returns TRUE.
(elf_backend_allow_non_load_phdr): Define.
* elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Do not
place the interpreter string into the .interp section if the
nointerp flag is set in the link info structure.
* elf32-arc.c (elf_arc_size_dynamic_sections): Likewise.
* elf32-score7.c (score_elf_final_link_relocate): Allow for the
_gp symbol not being part of the output.
binutils* readelf.c (process_program_headers): Check PT_LOAD and PT_PHDR
segments for validity.
ld * ld.texinfo: Note that PT_TLS can be used as a segment type.
* testsuite/ld-discard/discard.ld: Add space for program headers.
* testsuite/ld-elf/flags1.ld: Likewise.
* testsuite/ld-elf/maxpage3.t: Likewise.
* testsuite/ld-elf/noload-1.t: Likewise.
* testsuite/ld-elf/orphan.ld: Likewise.
* testsuite/ld-elf/overlay.t: Likewise.
* testsuite/ld-elf/pr14052.t: Likewise.
* testsuite/ld-elf/pr19539.t: Likewise.
* testsuite/ld-elf/provide-hidden-1.ld: Likewise.
* testsuite/ld-elf/provide-hidden-s.ld: Likewise.
* testsuite/ld-elf/weak-dyn-1.ld: Likewise.
* testsuite/ld-i386/pr19539.t: Likewise.
* testsuite/ld-scripts/defined.t: Likewise.
* testsuite/ld-scripts/defined6.t: Likewise.
* testsuite/ld-scripts/dynamic-sections.t: Likewise.
* testsuite/ld-scripts/empty-aligned.t: Likewise.
* testsuite/ld-scripts/provide-2.t: Likewise.
* testsuite/ld-scripts/provide-4.t: Likewise.
* testsuite/ld-vax-elf/plt-local.ld: Likewise.
* testsuite/ld-x86-64/pr19539.t: Likewise.
* testsuite/ld-elf/ehdr_start-missing.d: Do not initialise the
dynamic linker.
* testsuite/ld-elf/ehdr_start-weak.d: Likewise.
* testsuite/ld-elf/elf.exp (pr14170, pr17068): Likewise.
* testsuite/ld-elf/loadaddr1.d: Update expected readelf output.
* testsuite/ld-elf/noload-2.d: Likewise.
* testsuite/ld-powerpc/vxworks2.sd: Likewise.
* testsuite/ld-scripts/phdrs3a.d: Likewise.
* testsuite/ld-scripts/size-2.d: Likewise.
* testsuite/ld-elf/group.ld: Add program headers.
* testsuite/ld-elf/overlay.d: Skip for SPU.
* testsuite/ld-elf/flags1.d: Skip for RX.
* testsuite/ld-elf/pr19162.d: Skip for HPPA64.
* testsuite/ld-elf/pr19539.d: Skip for ALPHA.
* testsuite/ld-scripts/empty-orphan.t: Update program headers.
* testsuite/ld-scripts/size-2.t: Likewise.
It makes just a little more sense to use input_bfd when retrieving
insns for relocation, since the relocations match the endianness of
the input bfd.
* elf32-ppc.c (ppc64_elf_relocate_section): Calculate d_offset for
input_bfd. Replace occurrences of output_bfd as bfd_get_32 and
bfd_put_32 param with input_bfd.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise. Also
ppc_elf_vle_split16 param.
(ppc_elf_vle_split16): Rename output_bfd param to input_bfd.
Fix a commit 089e3718bd ("Greatly improve the speed if looking up
DWARF line number information.") build regression:
cc1: warnings being treated as errors
.../bfd/dwarf2.c: In function 'build_line_info_table':
.../bfd/dwarf2.c:1614: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
.../bfd/dwarf2.c: In function 'build_lookup_funcinfo_table':
.../bfd/dwarf2.c:2262: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[4]: *** [dwarf2.lo] Error 1
in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
bfd/
* dwarf2.c (build_line_info_table): Rename `index' local
variable to `line_index'.
(build_lookup_funcinfo_table): Rename `index' local variable to
`func_index'.
This reverts commit b19753ce31.
As it turns out, GCC (and the assembler) needs additional work in
order to support negative GOT offsets in 64-bit sparc. This is
breaking TLS Local Dynamic in position-independent code.
bfd/ChangeLog:
2016-11-18 James Clarke <jrtc27@jrtc27.com>
* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
R_SPARC_GOTDATA_OP_HIX22 and R_SPARC_GOTDATA_OP_LOX10 to
R_SPARC_GOT* for non-local references. Instead, treat them like
R_SPARC_GOTDATA_HIX22/R_SPARC_GOTDATA_LOX10 when filling in the
immediate with the calculated relocation.
Fix issues with diff relocs that have a negative value
i.e. sym2 - sym1 where sym2 is lesser than sym1.
The assembler generates a diff reloc with symbol as start of section
and addend as sym2 offset, and encodes assembly time difference at
the reloc offset.
The existing relaxation logic adjusts addends if the relaxed insn lies
between symbol and addend. That doesn't work for diff relocs where
sym2 is less than sym1 *and* the relaxed insn happens to be between
sym2 and sym1.
Fix the problems by
1. Using signed handling of the difference value (bfd_signed_vma instead
of bfd_vma, bfd_{get,set}_signed_xxx instead of bfd_{get,set}_xxx).
2. Not assuming sym2 is bigger than sym1. It instead computes the actual
addresses and sets the lower and higher addresses as start and end
addresses respectively and then sees if insn is between start and end.
3. Creating a new function elf32_avr_adjust_reloc_if_spans_insn to
centralize reloc adjustment, and ensuring diff relocs get adjusted
correctly even if their sym + addend doesn't overlap a relaxed insn.
It also removes a redundant variable did_pad. It is never set if
did_shrink is TRUE, and the code does a early return if did_shrink is
FALSE.
bfd/ChangeLog
2016-11-15 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20789
* bfd/elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Do signed
manipulation of diff value, and don't assume sym2 is less than sym1.
(elf32_avr_adjust_reloc_if_spans_insn): New function.
(elf32_avr_relax_delete_bytes): Use elf32_avr_adjust_diff_reloc_value,
and remove redundant did_pad.
ld/ChangeLog
2016-11-15 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20789
* ld/testsuite/ld-avr/pr20789.d: New test.
* ld/testsuite/ld-avr/pr20789.s: New test.
Since "-z now" replaces PLT with GOT PLT, we should also check GOT PLT
for R_X86_64_PLTOFF64 relocation.
bfd/
PR ld/20800
* elf64-x86-64.c (elf_x86_64_relocate_section): Also check
plt_got.offset for R_X86_64_PLTOFF64.
ld/
PR ld/20800
* testsuite/ld-x86-64/pr20800a.S: New file.
* testsuite/ld-x86-64/pr20800b.S: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/20800 test.
bfd/
PR target/20737
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Bind defined
symbol locally in PIE.
ld/
* testsuite/ld-aarch64/pie-bind-locally-a.s: New test source.
* testsuite/ld-aarch64/pie-bind-locally-b.s: Likewise.
* testsuite/ld-aarch64/pie-bind-locally.d: New testcase.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
Fix build breakage introduced by commit 089e3718bd ("Greatly improve
the speed if looking up DWARF line number information."):
- bfd_boolean is_linkage;
- const char *name;
- struct arange arange;
+ int line;
+ int tag;
+ bfd boolean is_linkage;
bfd/ChangeLog:
2016-11-08 Pedro Alves <palves@redhat.com>
* dwarf2.c (struct funcinfo) <is_linkage>: Type is bfd_boolean,
not "bfd boolean".
* dwarf2.c (comp_unit): Add new fields 'lookup_funcinfo_table' and
'number_of_functions' to keep lookup table and number of entries in
the table.
(line_sequence): Add new fields 'line_info_lookup' and 'num_lines'
to keep lookup table and number of entries in the table.
(lookup_funcinfo): New structure for lookup table for function
references.
(build_line_info_table): New function to create and build the lookup
table for line information.
(lookup_address_in_line_info_table): Use the lookup table instead of
traverse a linked list.
(compare_lookup_funcinfos): New compare fuction used in sorting of
lookup table for function references.
(build_lookup_funcinfo_table): New function to create, build and
sort the lookup table for functions references.
(lookup_address_in_function_table): Use the table instead of
traverse a linked list.
(_bfd_dwarf2_cleanup_debug_info): Free memory from function references
lookup table.
Break out of the outer switch statement once the inner switch for the
BFD_RELOC_CTOR relocation has been processed, preventing double BFD_FAIL
calls from being made, once from the inner switch and then again from
the default case of the outer switch.
Noticed with a `-Wimplicit-fallthrough' build error reported by a recent
GCC version:
In file included from .../bfd/reloc.c:52:0:
.../bfd/reloc.c: In function 'bfd_default_reloc_type_lookup':
.../bfd/libbfd.h:779:8: error: this statement may fall through [-Werror=implicit-fallthrough=]
do { bfd_assert(__FILE__,__LINE__); } while (0)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../bfd/reloc.c:7780:4: note: in expansion of macro 'BFD_FAIL'
BFD_FAIL ();
^~~~~~~~
.../bfd/reloc.c:7782:5: note: here
default:
^~~~~~~
cc1: all warnings being treated as errors
make[4]: *** [reloc.lo] Error 1
bfd/
* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
not fall through to the default case.
In the ARC assembler, when a cpu type is specified using the .cpu
directive, we rely on the bfd list of arc machine types in order to
validate the cpu name passed in.
This validation is only used in order to check that the cpu type passed
to the .cpu directive matches any machine type selected earlier on the
command line. Once that initial check has passed a full check is
performed using the assemblers internal list of know cpu types.
The problem is that the assembler knows about more cpu types than bfd,
some cpu types known by the assembler are actually aliases for a base
cpu type plus a specific set of assembler extensions. One such example
is NPS400, though more could be added later.
This commit removes the need for the assembler to use the bfd list of
machine types for validation. Instead the error checking, to ensure
that any value passed to a '.cpu' directive matches any earlier command
line selection, is moved into the function arc_select_cpu.
I have taken the opportunity to bundle the 4 separate static globals
that describe the currently selected machine type into a single
structure (called selected_cpu).
gas/ChangeLog:
* config/tc-arc.c (arc_target): Delete.
(arc_target_name): Delete.
(arc_features): Delete.
(arc_mach_type): Delete.
(mach_type_specified_p): Delete.
(enum mach_selection_type): New enum.
(mach_selection_mode): New static global.
(selected_cpu): New static global.
(arc_eflag): Rename to ...
(arc_initial_eflag): ...this, and make const.
(arc_select_cpu): Update comment, new parameter, check how
previous machine type selection was made, and record this
selection. Use selected_cpu instead of old globals.
(arc_option): Remove use of arc_get_mach, instead use
arc_select_cpu to validate machine type selection. Use
selected_cpu over old globals.
(allocate_tok): Use selected_cpu over old globals.
(find_opcode_match): Likewise.
(assemble_tokens): Likewise.
(arc_cons_fix_new): Likewise.
(arc_extinsn): Likewise.
(arc_extcorereg): Likewise.
(md_begin): Update default machine type selection, use
selected_cpu over old globals.
(md_parse_option): Update machine type selection option handling,
use selected_cpu over old globals.
* testsuite/gas/arc/nps400-0.s: Add .cpu directive.
bfd/ChangeLog:
* cpu-arc.c (arc_get_mach): Delete.
Fix an aliasing build error:
cc1: warnings being treated as errors
.../bfd/elf32-nds32.c: In function 'nds32_elf_check_relocs':
.../bfd/elf32-nds32.c:6644: warning: dereferencing type-punned pointer will break strict-aliasing rules
make[3]: *** [elf32-nds32.lo] Error 1
in a way following commit 6edfbbad08 ("Fix up gcc4.1 aliasing
warnings"), <https://sourceware.org/ml/binutils/2005-10/msg00071.html>.
bfd/
* elf32-nds32.c (nds32_elf_check_relocs): Avoid aliasing warning
from GCC.
Fix a commit 5025eb7c0d ("Delete relocations associatesd with deleted
exidx entries.") build regression:
cc1: warnings being treated as errors
.../bfd/elf32-arm.c: In function 'elf32_arm_update_relocs':
.../bfd/elf32-arm.c:14951: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[3]: *** [elf32-arm.lo] Error 1
in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
bfd/
* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
variable to `reloc_index'.
See https://sourceware.org/ml/binutils/2016-07/msg00091.html
This patch stop --gc-sections elf_gc_sweep_symbol localizing symbols
that ought to remain global.
The difficulty with always descending into output section statements
is that symbols defined by the script in such statements don't have
a bfd section when lang_do_assignments runs early in the link process.
There are two approaches to curing this problem. Either we can
create the bfd section early, or we can use a special section. This
patch takes the latter approach and uses bfd_und_section. (Creating
bfd sections early results in changed output section order, and thus
lots of testsuite failures. You can't create all output sections
early to ensure proper ordering as KEEP then stops empty sections
from being stripped.)
The wrinkle with this approach is that some code that runs at
gc-sections time needs to be made aware of the odd defined symbols
using bfd_und_section.
bfd/
* elf64-x86-64.c (elf_x86_64_convert_load_reloc): Handle symbols
defined temporarily with bfd_und_section.
* elflink.c (_bfd_elf_gc_keep): Don't set SEC_KEEP for bfd_und_section.
* elfxx-mips.c (mips_elf_local_pic_function_p): Exclude defined
symbols with bfd_und_section.
ld/
* ldlang.c (lang_do_assignments_1): Descend into output section
statements that do not yet have bfd sections. Set symbol section
temporarily for symbols defined in such statements to the undefined
section. Don't error on data or reloc statements until final phase.
* ldexp.c (exp_fold_tree_1 <etree_assign>): Handle bfd_und_section
in expld.section.
* testsuite/ld-mmix/bpo-10.d: Adjust.
* testsuite/ld-mmix/bpo-11.d: Adjust.
bfd/
* elf32-epiphany.c (epiphany_final_link_relocate): Use bitwise
OR in arithmetic expression, not boolean OR.
opcodes/
* cr16-dis.c (print_insn_cr16): Don't use boolean OR in arithmetic.
* crx-dis.c (print_insn_crx): Likewise.
It was like printf, which means you can't use bfd_set_error_handler to
hook in a function to do something and then call the original handler.
The patch also deletes some unused functions and makes pointers local.
bfd/
* bfd-in.h: Include stdarg.h.
* bfd.c (bfd_error_handler_type): Make like vprintf.
(_bfd_error_internal): Rename from _bfd_error_handler. Make static.
(error_handler_internal): New function, split out from..
(_bfd_default_error_handler): ..here. Rename to _bfd_error_handler.
(bfd_set_error_handler): Update.
(bfd_get_error_handler, bfd_get_assert_handler): Delete.
(_bfd_assert_handler): Make static.
* coffgen.c (null_error_handler): Update params.
* elf-bfd.h (struct elf_backend_data <link_order_error_handler>):
Don't use bfd_error_handler_type.
* elf64-mmix.c (mmix_dump_bpo_gregs): Likewise.
* elfxx-target.h (elf_backend_link_order_error_handler): Default
to _bfd_error_handler.
* libbfd-in.h (_bfd_default_error_handler): Don't declare.
(bfd_assert_handler_type): Likewise.
(_bfd_error_handler): Update.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
ld/
* ldlang.c (ignore_bfd_errors): Update params.
PR ld/20636
* elf-bfd.h (struct elf_backend_data): Delete
elf_backend_count_output_relocs callback and add
elf_backend_update_relocs.
* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
(emit_relocs): Deleted.
(elf32_arm_emit_relocs): Deleted.
(elf_backend_emit_relocs): Updated not to use the old functions.
(elf32_arm_update_relocs): New function.
(elf_backend_update_relocs): New define.
* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
relocation count. Call elf_backend_emit_relocs.
(_bfd_elf_size_reloc_section): Do not call
elf_backend_count_output_relocs.
* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
(elf_backend_update_relocs): New define.
2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
PR ld/20608
bfd/
* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
Thumb-ARM stub is too far.
ld
* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
* testsuite/ld-arm/farcall-mixed-app2.d: New file.
* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
This patch extends Tag_GNU_Power_ABI_FP to cover long double ABIs,
makes the assembler warn about undefined tag values, and removes
similar warnings from the linker. I think it is better to not
warn in the linker about undefined tag values as future extensions to
the tags then won't result in likely bogus warnings. This is
consistent with the fact that an older linker won't warn on an
entirely new tag.
include/
* elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment.
bfd/
* elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare.
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function.
(ppc_elf_merge_obj_attributes): Use it. Don't copy first file
attributes, merge them. Don't warn about undefined tag bits,
or copy unknown values to output.
* elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call
_bfd_elf_ppc_merge_fp_attributes.
binutils/
* readelf.c (display_power_gnu_attribute): Catch truncated section
for all powerpc attributes. Display long double ABI. Don't
capitalize words, except for names. Show known bits of tag values
when some unknown bits are present. Whitespace fixes.
gas/
* config/tc-ppc.c (ppc_elf_gnu_attribute): New function.
(md_pseudo_table <ELF>): Handle "gnu_attribute".
ld/
* testsuite/ld-powerpc/attr-gnu-4-4.s: Delete.
* testsuite/ld-powerpc/attr-gnu-4-14.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-24.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-34.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-41.d: Delete.
* testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning.
* testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output.
* testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise.
* testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
PR ld/20595
ld * testsuite/ld-arm/unwind-4.d: Add -q option to linker command
line and -r option to objdump command line. Match emitted relocs
to make sure that superflous relocs are not generated.
bfd * elf-bfd.h (struct elf_backend_data): Add
elf_backend_count_output_relocs callback to count relocations in
the final output.
* elf-arm.c (elf32_arm_add_relocation): Deleted.
(elf32_arm_write_section): Move additional relocation to emit_relocs.
(elf32_arm_count_output_relocs): New function.
(emit_relocs): New function.
(elf32_arm_emit_relocs): New function.
(elf32_arm_vxworks_emit_relocs): New function.
(elf_backend_emit_relocs): Updated to use the new functions.
(elf_backend_count_output_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
to the relocation count.
(_bfd_elf_link_size_reloc_section): Use callback to count the
relocations which will be in output.
(_bfd_elf_default_count_output_relocs): New function.
* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
The code compiled with the -fpic model in SPARC uses 13-bit signed
immediate PC-relative loads to fetch entries from the GOT table. In
theory this would allow using a GOT table (.got section) containing up
to 1024 entries in elf32 or 512 entries in elf64.
However, in elf64 sparc GNU targets _GLOBAL_OFFSET_TABLE_ is always
placed at the beginning of the .got section, making it impossible to use
negative offsets. This limits the usage of -fpic to GOT tables
containing a maximum of 257 entries in elf64.
This patch activates an optimization that is already used in sparc-elf32
also in sparc-elf64, that sets _GLOBAL_OFFSET_TABLE_ to point 0x1000
into the .got section if the section size is bigger than 0x1000.
2016-09-19 Jose E. Marchesi <jose.marchesi@oracle.com>
* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Allow
negative offsets to _GLOBAL_OFFSET_TABLE_ if the .got section is
bigger than 0x1000 bytes.
bfd/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
not already marked.
ld/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
Extensions entry functions in absolute section.
* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
We can resolve size relocation against symbol which needs copy relocation
when building executable.
bfd/
PR ld/20550
* elf64-x86-64.c (elf_x86_64_relocate_section): Resolve size
relocation with copy relocation when building executable.
ld/
PR ld/20550
* testsuite/ld-x86-64/pr20550a.s: New file.
* testsuite/ld-x86-64/pr20550b.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp (x86_64tests): Add tests for
PR ld/20550.
Prior to the patch, addends for relocs were being adjusted even if
they went beyond an alignment boundary. This is wrong - to
preserve alignment constraints, the relaxation logic adds as many padding
bytes at the alignment boundary as was deleted, so addends beyond the
boundary should not be adjusted. avr-prop-7.s reproduces this
scenario.
Also, prior to this patch, the relaxation logic assumed that the addr
parameter pointed to the middle of the instruction to be deleted, and
that addr - count would therefore be the shrinked instruction's
address. This is true when actually shrinking instructions.
The alignment constraints handling logic also invokes the same logic
though, with addr as the starting offset of padding bytes and
with count as the number of bytes to be deleted. Calculating the
shrinked insn's address as addr - count is obviously wrong in this
case - that offset would point to count bytes before the last
non-padded byte. avr-prop-8.s reproduces this scenario.
To fix scenario 1, the patch adds an additional check to ensure reloc addends
aren't adjusted if they cross a shrink boundary. The shrink boundary
is either the section size or an alignment boundary. Addends pointing
at an alignment boundary don't need to be adjusted, as padding would
occur and keep the boundary the same. Addends pointing at section size
need to be adjusted though, as no padding occurs and the section size
itself would get decremented. The patch records whether padding
occured (did_pad) and uses that to detect and handle this condition.
To fix scenario 2, the patch adds an additional parameter
(delete_shrinks_insn) to elf32_avr_relax_delete_bytes to distinguish
instruction bytes deletion from padding bytes deletion. It then uses that to
correctly set shrinked_insn_address.
bfd/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* elf32-avr.c (elf32_avr_relax_delete_bytes): Add parameter
delete_shrinks_insn. Modify computation of shrinked_insn_address.
Compute shrink_boundary and adjust addend only if
addend_within_shrink_boundary.
(elf32_avr_relax_section): Modify calls to
elf32_avr_relax_delete_bytes to pass extra parameter.
ld/ChangeLog:
2016-09-02 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
PR ld/20545
* testsuite/ld-avr/avr-prop-7.d: New test.
* testsuite/ld-avr/avr-prop-7.s: New test.
* testsuite/ld-avr/avr-prop-8.d: New test.
* testsuite/ld-avr/avr-prop-8.s: New test.
bfd/
* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
array of bytes and use bfd_get_16 to interpret its encoding according
to endianness of target.
Fixes a gdb segfault if a section named .opd is found in ELFv2 binaries.
* elf64-ppc.c (synthetic_opd): New static var.
(compare_symbols): Don't treat symbols in .opd specially for ELFv2.
(ppc64_elf_get_synthetic_symtab): Likewise. Comment.
Like 57f6d32d, this patch ensures that sections containing external
conditional branches limit the group size.
* elf64-ppc.c (group_sections): Delete stub14_group_size. Instead,
track max group size with a new "group_size" var that is reduced
by a factor of 1024 from the 24-bit branch size whenever a 14-bit
branch is seen.
ELF section sh_flags SHF_PPC_VLE was being set based on arch/mach,
which meant all code sections in an object file has the flag or all
lacked it. We can do better than that. Only those code sections
where VLE is enabled ought to have the flag, allowing an object file
to contain both VLE and non-VLE code.
Also, ELF header p_flags PF_PPC_VLE wasn't being set, and segments
were being split unnecessarily.
bfd/
* elf32-ppc.c (ppc_elf_section_processing): Delete.
(elf_backend_section_processing): Don't define.
(ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't
split on non-exec sections differing in SHF_PPC_VLE. When
splitting segments, mark size invalid.
gas/
* config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
ppc_cpu rather than calling ppc_mach to determine VLE mode.
(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
On i386, IFUNC function must be called via PLT. Since PLT in PIC
object uses EBX register, R_386_PLT32 relocation must be used to
call IFUNC function even when IFUNC function is defined locally.
Linker should issue an error when R_386_PC32 relocation is used
to call IFUNC function.
Since PR ld/19784 tests doesn't use PLT relocation to local IFUNC
function, they are moved to the x86-64 test directory.
bfd/
PR ld/14961
PR ld/20515
* elf32-i386.c (elf_i386_check_relocs): Issue an error when
R_386_PC32 relocation is used to call IFUNC function in PIC
object.
ld/
PR ld/14961
PR ld/20515
* testsuite/ld-i386/i386.exp: Run pr20515.
* testsuite/ld-i386/pr20515.d: New file.
* testsuite/ld-i386/pr20515.s: Likewise.
* testsuite/ld-ifunc/ifunc-14a.s: Use R_386_PLT32 to call IFUNC
function.
* testsuite/ld-ifunc/ifunc-14c.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc-2-local-i386.s: Likewise.
* testsuite/ld-ifunc/ifunc.exp: Move PR ld/19784 tests to ...
* testsuite/ld-x86-64/x86-64.exp: Here.
* testsuite/ld-ifunc/pr19784a.c: Moved to ...
* testsuite/ld-x86-64/pr19784a.c: Here.
* testsuite/ld-ifunc/pr19784b.c: Moved to ...
* testsuite/ld-x86-64/pr19784b.c: Here.
* testsuite/ld-ifunc/pr19784c.c: Moved to ...
* testsuite/ld-x86-64/pr19784c.c: Here.
Commit 980aa3e6 was supposed to cure dyn_reloc counting problems, but
did the opposite. For PIC we count two types of dyn_reloc, those on
pc-relative relocs, and the total. If a sym needs pc-relative dyn
relocs then all the relocs are dynamic. If not, then only those that
are must_be_dyn_reloc are dynamic.
PR 20519
* elf64-ppc.c (pc_dynrelocs): New function.
(ppc64_elf_relocate_section): Use it and must_be_dyn_reloc to
handle pic dynamic relocs.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (struct elf32_arm_params): Define.
(bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Use a struct
elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
* bfd-in2.h: Regenerate.
* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Pass all values via a struct
elf32_arm_params rather than as individual parameters.
ld/
* emultempl/armelf.em (params): New static variable.
(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
no_enum_size_warning, no_wchar_size_warning, pic_veneer,
merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
above new structure.
(arm_elf_before_allocation): Access static variable from the params
structure.
(gld${EMULATION_NAME}_finish): Likewise.
(arm_elf_create_output_section_statements): Likewise and pass the
address of that structure to bfd_elf32_arm_set_target_relocs instead
of the static variables.
(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
structure.
bfd/
* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
passed the end of htab->stub_group array.
(elf32_arm_create_or_find_stub_sec): Likewise.
(elf32_arm_create_stub): Likewise.
Forgot to set should_relocate to TRUE in case of GOT and TLS relocations of
undefined symbols for shared libraries.
In dynamic libraries if symbol is not known the instruction relocation would
not be resolved to point to the respective .got entry.
A test was created to detect similar future mistakes.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf32-arc.c (elf_arc_relocate_section): Changed. Set should_relocate
to TRUE for GOT and TLS relocs.
ld/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* ld/testsuite/ld-arc/tls_gd-01.s: Added a testcase for this patch.
* ld/testsuite/ld-arc/tls_gd-01.d: Likewise.
ARC was overloading this options by forcing DT_INIT AND DT_FINI
to always point to _init and _fini, respectively.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synospsys.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
Fixed conditions related to dynamic relocs relative offset patching.
Added arc_link_hash_table to be able to always generate and track
.rela.bss section.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf-bfd.h: Added ARC_ELF_DATA to enum elf_target_id.
* elf32-arc.c (struct elf_arc_link_hash_entry): Added.
(struct elf_arc_link_hash_table): Likewise.
(elf_arc_link_hash_newfunc): Likewise.
(elf_arc_link_hash_table_free): Likewise.
(arc_elf_link_hash_table_create): Likewise.
(elf_arc_relocate_section): Fixed conditions related to dynamic
(elf_arc_check_relocs): Likewise.
(arc_elf_create_dynamic_sections): Added
(elf_arc_adjust_dynamic_symbol): Changed access to .rela.bss to be done
through the hash table.
When no dynamic relocation was generated the .got content would not be
updated for the TLS_IE_GOT relocation addresses.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h (relocate_fix_got_relocs_for_got_info): Fixed addresses in
debug comments. Fixed address in .got related to TLS_IE_GOT dynamic
relocation.
ld/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* testsuite/ld-arc/tls_ie-01.s: Added to verify associated fix.
* testsuite/ld-arc/tls_ie-01.d: Likewise
Added support for ARC_SDA_12 reloc.
Fixed ARC_N32_ME.
Added ME (middle-endian) to ARC_SDA_12 reloc.
bfd/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* reloc.c: Fixed type in ARC_SECTOFF relocations. Added ARC_SDA_12
relocation.
* bfd-in2.h: Regenerated from the previous changes.
* libbfd.h: Regenerated from the previous changes.
include/ChangeLog:
Cupertino Miranda <cmiranda@synopsys.com>
* elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
* opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12 relocation.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
the input import library bfd.
* bfd-in2.h: Regenerate.
* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
and new_cmse_stub_offset fields.
(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
-1.
(elf32_arm_add_stub): Likewise for stub_offset.
(arm_new_stubs_start_offset_ptr): New function.
(arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow
empty SG veneers to have zero relocations.
(arm_size_one_stub): Only initialize stub size and template
information for non empty veneers. Do not update veneer section size
if veneer already has an offset.
(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
of a boolean indicating success or failure.
(cmse_scan): Change stub_changed parameter into an integer pointer
parameter cmse_stub_created to count the number of stub created and
adapt to change of return value in elf32_arm_create_stub.
(cmse_entry_fct_p): New function.
(arm_list_new_cmse_stub): Likewise.
(set_cmse_veneer_addr_from_implib): Likewise.
(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
cmse_scan instead of that of cmse_stub_changed to compute the number
of stub created and use it to initialize stub_changed. Call
set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change
of return value in elf32_arm_create_stub. Use
arm_stub_section_start_offset () if not NULL to initialize size of
secure gateway veneers section. Initialize stub_offset of Cortex-A8
erratum fix to -1. Use ret to hold return value.
(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
NULL to initialize size of secure gateway veneers section. Adapt
comment to stress the importance of zeroing veneer section content.
(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
initialize eponymous field in struct elf32_arm_link_hash_table.
ld/
* emultempl/armelf.em (in_implib_filename): Declare and initialize new
variable.
(arm_elf_create_output_section_statements): Open import input library
file for writing and pass resulting in_implib_bfd to
bfd_elf32_arm_set_target_relocs.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
* ld.texinfo (--cmse-implib): Update to mention --in-implib.
(--in-implib): Document new option.
* NEWS: Likewise.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): add --defsym VER=1 to gas
CLI.
(Secure gateway import library generation: errors): Likewise.
(Input secure gateway import library): New test.
(Input secure gateway import library: no output import library):
Likewise.
(Input secure gateway import library: not an SG input import library):
Likewise.
(Input secure gateway import library: earlier stub section base):
Likewise.
(Input secure gateway import library: later stub section base):
Likewise.
(Input secure gateway import library: veneer comeback): Likewise.
(Input secure gateway import library: entry function change):
Likewise.
* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
* testsuite/ld-arm/cmse-new-implib.out: New file.
* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
This enhances the 32-bit and 64-bit s390 ELF backends with support for
reading and writing the core dump note sections NT_PRSTATUS and
NT_PRPSINFO. Byte swapping is done as appropriate, such that core files
can now be processed correctly on non-s390 platforms.
bfd/ChangeLog:
* elf32-s390.c (stdarg.h): New include.
(elf_s390_grok_psinfo): New function.
(elf_s390_write_core_note): New function.
(elf_backend_grok_psinfo): Declare backend hook.
(elf_backend_write_core_note): Likewise.
* elf64-s390.c (stdarg.h): New include.
(elf_s390_grok_prstatus): New function.
(elf_s390_grok_psinfo): New function.
(elf_s390_write_core_note): New function.
(elf_backend_grok_prstatus): Declare backend hook.
(elf_backend_grok_psinfo): Likewise.
(elf_backend_write_core_note): Likewise.
This patch adds function elf32_arc_grok_parse to parse NOTE section of core
dump files. GDB requires this to work properly with core dumps.
bfd/
2016-08-24 Anton Kolesov <Anton.Kolesov@synopsys.com>
* elf32-arc.c (elf32_arc_grok_prstatus): New function.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
The pr19784 tests fail on ppc32 due to a gcc bug. The failure should
be noticed when building both libpr19784a.so and libpr19784b.so,
rather than ld building a buggy libpr19784a.so that fails at run time.
This patch fixes that by moving the @local ifunc check out of
check_relocs, where a call destination may not yet be known to be
ifunc. The patch also adds a related error for -mbss-plt code.
* elf32-ppc.c (ppc_elf_check_relocs): Move error for @local ifunc..
(ppc_elf_relocate_section): ..to here. Comment. Error on
detecting -mbss-plt -fPIC local ifuncs too.
(ppc_elf_size_dynamic_sections): Comment on unnecessary glink
branch table entries.
At the cost of an extra field in the symbol table hash entries, this
simplification to the relocate_section dynamic reloc test should help
maintainability.
* elf64-ppc.c (struct ppc_link_hash_entry): Add weakref.
(ppc64_elf_copy_indirect_symbol): Set weakref. Don't merge
dyn_relocs for weakdefs.
(alias_readonly_dynrelocs): New function.
(ppc64_elf_adjust_dynamic_symbol): Use alias_readonly_dynrelocs.
(ppc64_elf_relocate_section): Simplify condition under which
dyn_relocs are emitted.
This patch fixes quite a lot of confusion in allocate_dynrelocs over
ifuncs. Function descriptors make ELFv1 quite different to ELFv2.
PR 20472
* elf64-ppc.c (ppc64_elf_before_check_relocs): Tweak abiversion test.
(readonly_dynrelocs): Comment fix.
(global_entry_stub): New function.
(ppc64_elf_adjust_dynamic_symbol): Tweak abiversion test. Match
ELFv2 code deciding on dynamic relocs vs. global entry stubs to
that in size_global_entry_stubs, handling ifunc too. Delete dead
weak sym code.
(allocate_dynrelocs): Ensure dyn_relocs field is cleared when no
dyn_relocs are needed. Correct handling of ifunc dyn_relocs.
Tidy ELIMINATE_COPY_RELOCS code, only setting dynindx for
undefweak syms. Expand and correct comments.
(size_global_entry_stubs): Ensure symbol is defined.
(ppc64_elf_relocate_section): Match condition under which
dyn_relocs are emitted to that in allocate_dynrelocs.
Undefined weak functions, like __gmon_start__, were not being made
dynamic or emitting plt call code. While the behaviour of undefined
weak symbols is not defined in the ELF standard, the intention on
powerpc64 was to make it possible to link without a definition of such
symbols and at run time behave the same as if a definition was found
at link time in a shared library.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Don't exit with
non_got_ref true in any case where we could have generated dynbss
copies but decide not to do so.
For the case where a function which requires an LA25 stub is at the
beginning of a section we use a short sequence comprised of a LUI/ADDIU
instruction pair only and prepended to the associated function rather
than using a trailing jump to reach the function. This works by
checking for the offset into section of the function symbol being 0.
This is however never the case for microMIPS function symbols, which
have the ISA bit set. Consequently the short LA25 sequence is never
produced for microMIPS functions, like with the following example:
$ cat la25a.s
.abicalls
.global f1
.ent f1
f1:
.set noreorder
.cpload $25
.set reorder
.option pic0
jal f2
.option pic2
jr $31
.end f1
.global f2
.ent f2
f2:
jr $31
.end f2
$ cat la25b.s
.abicalls
.option pic0
.global __start
.ent __start
__start:
jal f1
jal f2
.end __start
$ as -mmicromips -32 -EB -o la25a.o la25a.s
$ as -mmicromips -32 -EB -o la25b.o la25b.s
$ ld -melf32btsmip -o la25 la25a.o la25b.o
$ objdump -d la25
la25: file format elf32-tradbigmips
Disassembly of section .text:
004000d0 <.pic.f2>:
4000d0: 41b9 0040 lui t9,0x40
4000d4: d420 0083 j 400106 <f2>
4000d8: 3339 0107 addiu t9,t9,263
4000dc: 0000 0000 nop
004000e0 <.pic.f1>:
4000e0: 41b9 0040 lui t9,0x40
4000e4: d420 0078 j 4000f0 <f1>
4000e8: 3339 00f1 addiu t9,t9,241
4000ec: 0000 0000 nop
004000f0 <f1>:
4000f0: 41bc 0002 lui gp,0x2
4000f4: 339c 801f addiu gp,gp,-32737
4000f8: 033c e150 addu gp,gp,t9
4000fc: f420 0083 jal 400106 <f2>
400100: 0000 0000 nop
400104: 45bf jrc ra
00400106 <f2>:
400106: 45bf jrc ra
...
00400110 <__start>:
400110: f420 0070 jal 4000e0 <.pic.f1>
400114: 0000 0000 nop
400118: f420 0068 jal 4000d0 <.pic.f2>
40011c: 0000 0000 nop
$
where `.pic.f1' could omit the trailing jump and the filler NOP and just
fall through to `f1'.
Correct the problem by masking out the ISA bit from microMIPS functions,
which fixes the earlier example:
$ objdump -d la25
la25: file format elf32-tradbigmips
Disassembly of section .text:
004000d0 <.pic.f2>:
4000d0: 41b9 0040 lui t9,0x40
4000d4: d420 0083 j 400106 <f2>
4000d8: 3339 0107 addiu t9,t9,263
...
004000e8 <.pic.f1>:
4000e8: 41b9 0040 lui t9,0x40
4000ec: 3339 00f1 addiu t9,t9,241
004000f0 <f1>:
4000f0: 41bc 0002 lui gp,0x2
4000f4: 339c 801f addiu gp,gp,-32737
4000f8: 033c e150 addu gp,gp,t9
4000fc: f420 0083 jal 400106 <f2>
400100: 0000 0000 nop
400104: 45bf jrc ra
00400106 <f2>:
400106: 45bf jrc ra
...
00400110 <__start>:
400110: f420 0074 jal 4000e8 <.pic.f1>
400114: 0000 0000 nop
400118: f420 0068 jal 4000d0 <.pic.f2>
40011c: 0000 0000 nop
$
There is no need to do anything for MIPS16 functions, because if any
LA25 stub has been generated for such a function, then it is only
required for an associated call thunk only, which is regular MIPS code
and the address of which, with the ISA bit clear, is returned by
`mips_elf_get_la25_target'.
This problem has been there since the beginning of microMIPS support:
commit df58fc944d
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Sun Jul 24 14:20:15 2011 +0000
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS:
microMIPS ASE support").
bfd/
* elfxx-mips.c (mips_elf_add_la25_stub): Clear the ISA bit of
the stub address retrieved if associated with a microMIPS
function.
Fix a problem with missing microMIPS symbol annotation with microMIPS
LA25 stub symbols. The consequence of the issue is these symbols appear
in the symbol table as regular MIPS symbols with the ISA bit set, as
shown with the example below:
$ cat la25a.s
.abicalls
.global f1
.ent f1
f1:
.set noreorder
.cpload $25
.set reorder
.option pic0
jal f2
.option pic2
jr $31
.end f1
.global f2
.ent f2
f2:
jr $31
.end f2
$ cat la25b.s
.abicalls
.option pic0
.global __start
.ent __start
__start:
jal f1
jal f2
.end __start
$ as -mmicromips -32 -EB -o la25a.o la25a.s
$ as -mmicromips -32 -EB -o la25b.o la25b.s
$ ld -melf32btsmip -o la25 la25a.o la25b.o
$ readelf -s la25
Symbol table '.symtab' contains 18 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00400098 0 SECTION LOCAL DEFAULT 1
2: 004000b0 0 SECTION LOCAL DEFAULT 2
3: 004000d0 0 SECTION LOCAL DEFAULT 3
4: 00000000 0 SECTION LOCAL DEFAULT 4
5: 00000000 0 SECTION LOCAL DEFAULT 5
6: 00418110 0 NOTYPE LOCAL DEFAULT 3 _gp
7: 004000e1 16 FUNC LOCAL DEFAULT 3 .pic.f1
8: 004000d1 16 FUNC LOCAL DEFAULT 3 .pic.f2
9: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fdata
10: 00400110 16 FUNC GLOBAL DEFAULT [MICROMIPS] 3 __start
11: 00400106 2 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f2
12: 004000d0 0 NOTYPE GLOBAL DEFAULT 3 _ftext
13: 00410120 0 NOTYPE GLOBAL DEFAULT 3 __bss_start
14: 004000f0 22 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f1
15: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _edata
16: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _end
17: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fbss
$
where microMIPS annotation is missing for `.pic.f1' and `.pic.f2' even
though these stubs are associated with microMIPS functions `f1' and `f2'
respectively.
Add the missing annotation then, by copying it from the function symbol
an LA25 stub is associated with, correcting the example above:
$ readelf -s la25
Symbol table '.symtab' contains 18 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00400098 0 SECTION LOCAL DEFAULT 1
2: 004000b0 0 SECTION LOCAL DEFAULT 2
3: 004000d0 0 SECTION LOCAL DEFAULT 3
4: 00000000 0 SECTION LOCAL DEFAULT 4
5: 00000000 0 SECTION LOCAL DEFAULT 5
6: 00418110 0 NOTYPE LOCAL DEFAULT 3 _gp
7: 004000e0 16 FUNC LOCAL DEFAULT [MICROMIPS] 3 .pic.f1
8: 004000d0 16 FUNC LOCAL DEFAULT [MICROMIPS] 3 .pic.f2
9: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fdata
10: 00400110 16 FUNC GLOBAL DEFAULT [MICROMIPS] 3 __start
11: 00400106 2 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f2
12: 004000d0 0 NOTYPE GLOBAL DEFAULT 3 _ftext
13: 00410120 0 NOTYPE GLOBAL DEFAULT 3 __bss_start
14: 004000f0 22 FUNC GLOBAL DEFAULT [MICROMIPS] 3 f1
15: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _edata
16: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _end
17: 00410120 0 NOTYPE GLOBAL DEFAULT 3 _fbss
$
This problem has been there since the beginning of microMIPS support:
commit df58fc944d
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date: Sun Jul 24 14:20:15 2011 +0000
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS:
microMIPS ASE support").
bfd/
* elfxx-mips.c (mips_elf_create_stub_symbol): For a microMIPS
stub also add STO_MICROMIPS annotation.
Fix a linker regression introduced with commit 9d862524f6 ("MIPS:
Verify the ISA mode and alignment of branch and jump targets") causing a
build failure in microMIPS glibc where the `zdump' tool fails to link:
.../timezone/zdump.o: In function `yeartot':
.../timezone/zdump.c:758:(.text+0x62): Jump to a non-instruction-aligned address
.../timezone/zdump.c:758:(.text+0x76): Jump to a non-instruction-aligned address
.../timezone/zdump.c:768:(.text+0x112): Jump to a non-instruction-aligned address
.../timezone/zdump.c:774:(.text+0x1b8): Jump to a non-instruction-aligned address
.../timezone/zdump.c:774:(.text+0x1cc): Jump to a non-instruction-aligned address
collect2: error: ld returned 1 exit status
make[2]: *** [.../timezone/zdump] Error 1
The cause of the failure is the stricter check introduced with the said
change for jump and branch targets tripping on the address of microMIPS
LA25 stubs. Despite being microMIPS code these stubs do not have the
ISA bit set throughout the relocation calculation process, because they
have their address set to the memory offset into the stub section they
are placed in.
The `mips_elf_la25_stub' structure does not carry ISA mode information,
but there is no need to extend it, because the ISA mode can be inferred
from the original symbol, which will have STO_MICROMIPS annotation, so
use that instead to set the ISA bit appropriately. Also only LA25 stubs
associated with microMIPS symbols need to have the ISA bit set, because
other LA25 stubs are made with regular MIPS code, even if associated
with a MIPS16 symbol (in which case they are needed by a call thunk only
rather than the MIPS16 function proper).
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Set the ISA bit
in microMIPS LA25 stub references.
* doc/chew.c (delete_string): Only free the string buffer if it is
there. Mark the buffer as NULL after freeing.
(drop): Free the dropped string.
(free_words): New function: Frees the memory allocated to the
dictionary.
(add_instrinsic): Duplicate the name string, so that it can be
freed later on.
(compile): Free unused words.
(main): Free the dictionary and top level string buffers at the
end.
bfd/
* elf32-arm.c (CMSE_PREFIX): Define macro.
(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
(cmse_branch_thumb_only): Declare stub.
(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
(elf32_arm_get_plt_info): Add globals parameter. Use it to return
FALSE if there is no PLT.
(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
(elf32_arm_final_link_relocate): Likewise.
(elf32_arm_gc_sweep_hook): Likewise.
(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
secure entry functions.
(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required): Change to a switch case
and add a case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required_alignment): Likewise.
(arm_stub_dedicated_output_section_name): Likewise.
(arm_stub_dedicated_input_section_ptr): Likewise and remove
ATTRIBUTE_UNUSED for htab parameter.
(arm_stub_required_alignment): Likewise.
(arm_stub_sym_claimed): Likewise.
(arm_dedicated_stub_section_padding): Likewise.
(cmse_scan): New function.
(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
Set stub_changed to TRUE if such veneers were created.
(elf32_arm_swap_symbol_in): Add detection code for CMSE special
symbols.
include/
* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
(ARM_SET_SYM_CMSE_SPCL): Likewise.
ld/
* ld.texinfo (Placement of SG veneers): New concept entry.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway veneers: no .gnu.sgstubs section): New test.
(Secure gateway veneers: wrong entry functions): Likewise.
(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
* testsuite/ld-arm/cmse-veneers.s: New file.
* testsuite/ld-arm/cmse-veneers.d: Likewise.
* testsuite/ld-arm/cmse-veneers.rd: Likewise.
* testsuite/ld-arm/cmse-veneers.sd: Likewise.
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
Complement:
commit 1bbce13264
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date: Mon Jun 24 23:55:46 2013 +0000
<https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS:
Compressed PLT/stubs support"), and also choose between regular and
compressed PLT entries as appropriate for any branches referring.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
in PLT compression selection.
(_bfd_mips_elf_check_relocs): Likewise.
ld/
* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
New test.
* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
bfd * arc-got.h (relocate_fix_got_relocs_for_got_info): Handle the case
where there's no elf_link_hash_entry while processing GOT_NORMAL got
entries.
ld * testsuite/ld-arc/got-01.d: New file.
* testsuite/ld-arc/got-01.s: New file.
bfd/
* elf.c (_bfd_elf_filter_global_symbols): Skip local symbols.
(swap_out_syms): Return an error when not finding ELF output
section rather than asserting.
* elflink.c (elf_output_implib): Call bfd_set_error on no symbols.
ld/
* testsuite/lib/ld-lib.exp (run_ld_link_tests): Add optional
parameter to pass list of xfails.
* testsuite/ld-elf/elf.exp: Add xfails for implib tests. Tidy
implib test formatting. Don't set .data start address.
* testsuite/ld-elf/implib.s: Remove first .bss directive and
replace second one with equivalent .section directive.
* testsuite/ld-elf/empty-implib.out: Add expected final error.
* testsuite/ld-elf/implib.rd: Update.
Version 1a adds a pr_pid member containing the process ID of the
terminating process. The presence of pr_pid is inferred from the
note's size.
bfd/ChangeLog:
* elf.c (elfcore_grok_freebsd_psinfo): Check for minimum note size
and handle pr_pid if present.
Issue an error if p_paddr becomes invalid when allocating space for
program headers.
PR ld/20376
* elf.c (assign_file_positions_for_load_sections): Also check
p_paddr for program header space.
* elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_PLTREL32>): Put
ppc64_elf_unhandled_reloc for special_function.
* elf32-ppc.c (ppc_elf_howto_raw): Similarly for lots of relocs.
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX,
similarly to how JAL instructions are converted.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
BAL to JALX.
(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
corresponding error message.
gas/
* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
Adjust comments for BAL to JALX linker conversion.
(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
expected.
* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
* testsuite/gas/mips/branch-local-4.d: New test.
* testsuite/gas/mips/branch-local-n32-4.d: New test.
* testsuite/gas/mips/branch-local-n64-4.d: New test.
* testsuite/gas/mips/branch-addend.d: New test.
* testsuite/gas/mips/branch-addend-n32.d: New test.
* testsuite/gas/mips/branch-addend-n64.d: New test.
* testsuite/gas/mips/branch-local-4.s: New test source.
* testsuite/gas/mips/branch-addend.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
messages expected.
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
source.
* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Verify that the ISA mode of branch targets is the same as the referring
relocation, so that an attempt to produce a branch between instructions
encoded in different ISA modes each causes an error rather than silently
producing non-functional code. Make sure that no symbol or addend bits
are silently truncated: terminate with an error if the relocation value
calculated cannot be encoded in the relocatable field of a branch; for
REL targets also applying to any intermediate addend.
Also make jump target's alignment verification consistent with that for
branches.
This change will require an update to some obscure handcoded assembly
sources which make branches to labels placed at data objects, however
for microMIPS code only. These labels will have to be updated with the
`.insn' directive for containing code to assemble and link successfully.
Such code is broken as any such labels have always been required by the
microMIPS architecture specification[1][2] to be annotated this way for
correct interpretation, and with our old code missing `.insn' directives
caused labels to present different semantics depending on whether they
were referred with branch (ISA bit ignored) or other relocations (ISA
bit respected).
Enforcing these checks however will ensure errors in building software,
like mixed regular MIPS and microMIPS code links with branches between,
will be diagnosed at the build time rather than causing odd run-time
errors such as intermittent crashes. It will also let cross-mode BAL
instructions be converted to JALX instructions, with a separate change.
References:
[1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level
Compatibility", p. 533
[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level
Compatibility", p. 623
bfd/
* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1.
(branch_reloc_p): New function.
(mips_elf_calculate_relocation): Handle ISA mode determination
for relocations against section symbols, against absolute
symbols and absolute relocations. Also set `*cross_mode_jump_p'
for branches.
<R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment
checks for weak undefined symbols. Also check target alignment
within the same ISA mode.
<R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches
in the alignment check.
<R_MICROMIPS_PC7_S1>: Add an alignment check.
<R_MICROMIPS_PC10_S1>: Likewise.
<R_MICROMIPS_PC16_S1>: Likewise.
(mips_elf_perform_relocation): Report a failure for unsupported
same-mode JALX instructions and cross-mode branches.
(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add
error messages for jumps to misaligned addresses.
gas/
* config/tc-mips.c (mips_force_relocation): Also retain branch
relocations against MIPS16 and microMIPS symbols.
(fix_bad_cross_mode_jump_p): New function.
(fix_bad_same_mode_jalx_p): Likewise.
(fix_bad_misaligned_jump_p): Likewise.
(fix_bad_cross_mode_branch_p): Likewise.
(fix_bad_misaligned_branch_p): Likewise.
(fix_validate_branch): Likewise.
(md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
<BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
etc. Verify the ISA mode and alignment of the jump target.
<BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
with a call to `fix_validate_branch'.
<BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
<BFD_RELOC_16_PCREL_S2>: Likewise.
<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
Verify the ISA mode and alignment of the branch target.
(md_convert_frag): Verify the ISA mode and alignment of resolved
MIPS16 branch targets.
* testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
branch targets with `.insn'.
* testsuite/gas/mips/branch-misc-5.s: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
accordingly.
* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
* testsuite/gas/mips/micromips-branch-relax.s: Annotate
non-instruction branch target with `.insn'.
* testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
with external symbols.
* testsuite/gas/mips/micromips-insn32.d: Update accordingly.
* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* testsuite/gas/mips/micromips-trap.d: Likewise.
* testsuite/gas/mips/micromips.d: Likewise.
* testsuite/gas/mips/mips16.s: Annotate non-instruction branch
targets with `.insn'.
* testsuite/gas/mips/mips16.d: Update accordingly.
* testsuite/gas/mips/mips16-64.d: Likewise.
* testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
branch target with `.insn'.
* testsuite/gas/mips/relax-swap3.s: Likewise.
* testsuite/gas/mips/branch-local-2.l: New list test.
* testsuite/gas/mips/branch-local-3.l: New list test.
* testsuite/gas/mips/branch-local-n32-2.l: New list test.
* testsuite/gas/mips/branch-local-n32-3.l: New list test.
* testsuite/gas/mips/branch-local-n64-2.l: New list test.
* testsuite/gas/mips/branch-local-n64-3.l: New list test.
* testsuite/gas/mips/unaligned-jump-1.l: New list test.
* testsuite/gas/mips/unaligned-jump-2.l: New list test.
* testsuite/gas/mips/unaligned-jump-3.d: New test.
* testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
* testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
* testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
* testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
test.
* testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
test.
* testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
* testsuite/gas/mips/unaligned-branch-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-3.d: New test.
* testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
* testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
* testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
* testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
* testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
* testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
* testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
test.
* testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
test.
* testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
* testsuite/gas/mips/branch-local-2.s: New test source.
* testsuite/gas/mips/branch-local-3.s: New test source.
* testsuite/gas/mips/branch-local-n32-2.s: New test source.
* testsuite/gas/mips/branch-local-n32-3.s: New test source.
* testsuite/gas/mips/branch-local-n64-2.s: New test source.
* testsuite/gas/mips/branch-local-n64-3.s: New test source.
* testsuite/gas/mips/unaligned-jump-1.s: New test source.
* testsuite/gas/mips/unaligned-jump-2.s: New test source.
* testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
* testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
* testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
source.
* testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
source.
* testsuite/gas/mips/unaligned-branch-1.s: New test source.
* testsuite/gas/mips/unaligned-branch-2.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
* testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
* testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
source.
* testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
source.
* testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
source.
* testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
expected.
* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
* testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps,
microMIPS BAL and MIPS16 instructions.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update
accordingly.
* testsuite/ld-mips-elf/unaligned-branch-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test.
* testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test.
* testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test.
* testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test.
* testsuite/ld-mips-elf/unaligned-jump.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Some messing with plugin code in order to not need arelt_size in
ld code. File descriptor handling in ld/plugin.c is tidied too,
simply duping the open fd rather than opening the file again.
bfd/
* elflink.c: Include plugin-api.h.
* plugin.c (bfd_plugin_open_input): New function, extracted from..
(try_claim): ..here.
* plugin.h: Don't include bfd.h.
(bfd_plugin_open_input): Declare.
binutils/
* ar.c: Include plugin-api.h.
* nm.c: Likewise.
ld/
* plugin.c: Don't include libbfd.h. Include plugin-api.h
before bfd/plugin.h.
(plugin_object_p): Use bfd_plugin_open_input.
Not much to see here, just renaming a function.
bfd/
* targets.c (bfd_seach_for_target): Rename to..
(bfd_iterate_over_targets): ..this. Rewrite doc.
* bfd-in2.h: Regenerate.
ld/
* ldlang.c (open_output): Replace bfd_search_for_target with
bfd_iterate_over_targets. Localize vars.
bfd * elf32-arc.c (PR_DEBUG): Delete.
Fix printing of debug information. Fix formatting of debug
statements.
(debug_arc_reloc): Handle symbols that are not from an input file.
(arc_do_relocation): Remove excessive exclamation points.
(elf_arc_relocate_section): Print an informative message if the
relocation fails, even if debugging is not enabled.
* arc-got.h: Fix formatting. Fix printing of debug information.
(new_got_entry_to_list): Use xmalloc.
* config.bfd: use the big-endian arc vector as the default vector
for big-endian arc targets.
ld * testsuite/ld-arc/arc.exp: Always run the sda-relocs test in
little endian mode.
Fix a generic BFD issue with relocations against absolute symbols, which
are installed without using any individual relocation handler provided
by the backend. This causes any absolute section's addend to be lost on
REL targets such as o32 MIPS, and also relocation-specific calculation
adjustments are not made.
As an example assembling this program:
$ cat test.s
.text
foo:
b bar
b baz
.set bar, 0x1234
$ as -EB -32 -o test-o32.o test.s
$ as -EB -n32 -o test-n32.o test.s
produces this binary code:
$ objdump -dr test-o32.o test-n32.o
test-o32.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <foo>:
0: 10000000 b 4 <foo+0x4>
0: R_MIPS_PC16 *ABS*
4: 00000000 nop
8: 1000ffff b 8 <foo+0x8>
8: R_MIPS_PC16 baz
c: 00000000 nop
test-n32.o: file format elf32-ntradbigmips
Disassembly of section .text:
00000000 <foo>:
0: 10000000 b 4 <foo+0x4>
0: R_MIPS_PC16 *ABS*+0x1230
4: 00000000 nop
8: 10000000 b c <foo+0xc>
8: R_MIPS_PC16 baz-0x4
c: 00000000 nop
$
where it is clearly visible in `test-o32.o', which uses REL relocations,
that the absolute section's addend equivalent to the value of `bar' -- a
reference to which cannot be fully resolved at the assembly time,
because the reference is PC-relative -- has been lost, as has been the
relocation-specific adjustment of -4, required to take into account the
PC+4-relative calculation made by hardware with branches and seen in the
external symbol reference to `baz' as the `ffff' addend encoded in the
instruction word. In `test-n32.o', which uses RELA relocations, the
absolute section's addend has been correctly retained.
Give precedence then in `bfd_perform_relocation' and
`bfd_install_relocation' to any individual relocation handler the
backend selected may have provided, while still resorting to the generic
calculation otherwise. This retains the semantics which we've had since
forever or before the beginning of our repository history, and is at the
very least compatible with `bfd_elf_generic_reloc' being used as the
handler.
Retain the `bfd_is_und_section' check unchanged at the beginning of
`bfd_perform_relocation' since this does not affect the semantics of the
function. The check returns the same `bfd_reloc_undefined' code the
check for a null `howto' does, so swapping the two does not matter.
Also the check is is mutually exclusive with the `bfd_is_abs_section'
check, since a section cannot be absolute and undefined both at once, so
swapping the two does not matter either.
With this change applied the program quoted above now has the in-place
addend correctly calculated and installed in the field being relocated:
$ objdump -dr fixed-o32.o
fixed-o32.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <foo>:
0: 1000048c b 1234 <bar>
0: R_MIPS_PC16 *ABS*
4: 00000000 nop
8: 1000ffff b 8 <foo+0x8>
8: R_MIPS_PC16 baz
c: 00000000 nop
$
Add a set of MIPS tests to cover the relevant cases, including absolute
symbols with addends, and verifying that PC-relative relocations against
symbols concerned resolve to the same value in the final link regardless
of whether the REL or the RELA relocation form is used. Exclude linker
tests though which would overflow the in-place addend on REL targets and
use them as dump patterns for RELA targets only.
bfd/
* reloc.c (bfd_perform_relocation): Try the `howto' handler
first with relocations against absolute symbols.
(bfd_install_relocation): Likewise.
gas/
* testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
* testsuite/gas/mips/branch-absolute.d: New test.
* testsuite/gas/mips/branch-absolute-n32.d: New test.
* testsuite/gas/mips/branch-absolute-n64.d: New test.
* testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
* testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
test.
* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
test.
* testsuite/gas/mips/micromips-branch-absolute.d: New test.
* testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
* testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
test.
* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
test.
* testsuite/gas/mips/branch-absolute.s: New test source.
* testsuite/gas/mips/branch-absolute-addend.s: New test source.
* testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
source.
* testsuite/gas/mips/micromips-branch-absolute.s: New test
source.
* testsuite/gas/mips/micromips-branch-absolute-addend.s: New
test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/branch-absolute.d: New test.
* testsuite/ld-mips-elf/branch-absolute-n32.d: New test.
* testsuite/ld-mips-elf/branch-absolute-n64.d: New test.
* testsuite/ld-mips-elf/branch-absolute-addend.d: New test.
* testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test.
* testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test.
* testsuite/ld-mips-elf/micromips-branch-absolute.d: New test.
* testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New
test.
* testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New
test.
* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New
test.
* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d:
New test.
* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d:
New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
from `branch-absolute-addend' and
`micromips-branch-absolute-addend', referred indirectly only.
Align x86-64 .got and .got.plt sections to their entry size.
* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Align
.got/.got.plt sections to 8 bytes.
TLS relocations did not support multiple TLS modes for the same
symbol in a single object file.
Refactored how GOT and TLS is implemented. Removed code duplications between
local and global symbols conditioning.
bfd/ChangeLog:
2016-06-14 Cupertino Miranda <cmiranda@synopsys.com>
* arc-got.h: Moved got related structures from elf32-arc.c to
this file. More precisely, tls_type_e, tls_got_entries, got_entry.
* (arc_get_local_got_ents,
got_entry_for_type,
new_got_entry_to_list,
tls_type_for_reloc,
symbol_has_entry_of_type,
get_got_entry_list_for_symbol,
arc_got_entry_type_for_reloc,
ADD_SYMBOL_REF_SEC_AND_RELOC,
arc_fill_got_info_for_reloc,
relocate_fix_got_relocs_for_got_info,
create_got_dynrelocs_for_single_entry,
create_got_dynrelocs_for_got_info): Added to file.
* elf32-arc.c: Removed GOT & TLS related structs and functions to
arc-got.h.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
The reloc for BFD_RELOC_32 was using the the 20-bit. This hack causes
problems in gdb. Fixed it to be the proper 32-bit reloc, R_FT32_32.
bfd/ChangeLog:
* elf32-ft32.c (ft32_reloc_map): Use R_FT32_32 for BFD_RELOC_32.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (THUMB32_MOVT): New veneer macro.
(THUMB32_MOVW): Likewise.
(elf32_arm_stub_long_branch_thumb2_only_pure): New.
(DEF_STUBS): Define long_branch_thumb2_only_pure.
(arm_stub_is_thumb): Add new veneer stub.
(arm_type_of_stub): Use new veneer.
(arm_stub_required_alignment): Add new veneer.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
* testsuite/ld-arm/arm-elf.exp: Run it.
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb2_bl): New function.
(arm_type_of_stub): Declare thumb2 variable together and change type
to bfd_boolean. Use using_thumb2_bl () to determine whether
THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
checked for BL range.
(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
the bit size of BL offset.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
(Thumb-2 BL on ARMv6-M): New testcase.
* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
bfd * elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
Returns TRUE for AArch64 mapping symbols.
(elfNN_aarch64_backend_symbol_processing): New function. Marks
mapping symbols as precious in object files so that they will not
be stripped.
(elf_backend_symbol_processing): Define.
* elf32-arm.c (is_arm_mapping_symbol): New function. Returns TRUE
for ARM mapping symbols.
(elf32_arm_backend_symbol_processing): Make use of the new function.
No need to check version if symbol is unreferenced and undefined.
bfd/
PR ld/20306
* elflink.c (elf_link_check_versioned_symbol): Return false
for unreferenced undefined symbol.
ld/testsuite/
* testsuite/ld-gc/gc.exp: Run pr20306 test.
* ld-gc/pr20306.c: New file.
* ld-gc/pr20306.d: Likewise.
bfin * elf32-bfin.c (bfin_adjust_dynamic_symbol): Fail if a COPY reloc
is needed.
ld * testsuite/ld-elf/comm-data.exp: Expect comm-data2 test to fail
for bfin.
* testsuite/ld-elf/elf.exp: Expect pr14170 and symbolic function
tests to fail for bfin.
* testsuite/ld-elf/endsym.d: Expect to fail with cr16, crx, dlx,
nds32 and visium.
* testsuite/ld-elf/var1.d: Expect to fail with d30v, dlx, ft32 and
microblaze.
* testsuite/ld-pe/pe.exp: Expect foreign symbol test to fail for
mcore-pe.
* elf32-arm.c (elf32_arm_backend_symbol_processing): New
function. Marks mapping symbols in object files as precious, so
that strip will not remove them.
(elf_backend_symbol_processing): Define.
bfd * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
gold * sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
to R_SPARC_RELATIVE if class is ELFCLASS64.
(Target_sparc::Scan::global): Likewise.
ld * testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
.text.
b399102 fixed the testcase in this PR but it may be possible to
trigger the problem in other ways.
PR ld/19264
* elf64-ppc.c (STUB_SHRINK_ITER): Define.
(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
if shrinking stubs.
(ppc64_elf_size_stubs): Adjust to suit.
The procstat AUXV core dump note in FreeBSD consists of 32-bit integer
followed by an array of auxiliary vector entries.
bfd/ChangeLog:
* elf.c (elfcore_grok_freebsd_note): Handle NT_FREEBSD_PROCSTAT_AUXV
notes.
Move parsing of FreeBSD-specific ELF core notes out of elfcore_grok_note
into a new elfcore_grok_freebsd_note function. Add core note grok routines
for FreeBSD's psinfo and prstatus notes while here rather than depending
on the native handling in elfcore_grok_note.
bfd/ChangeLog:
* elf.c (elfcore_grok_note): Remove handling of NT_X86_XSTATE for
FreeBSD. Remove case for NT_FREEBSD_THRMISC.
(elfcore_grok_freebsd_psinfo): New function.
(elfcore_grok_freebsd_prstatus): New function.
(elfcore_grok_freebsd_note): New function.
(elf_parse_notes): Use "elfcore_grok_freebsd_note" for "FreeBSD"
notes.
When configured with the default options, GDB currently fails to link,
due to an undefined reference to bfd_link_plugin_object_p, coming from
elflink.c:
#ifdef BFD_SUPPORTS_PLUGINS
|| (abfd->plugin_format == bfd_plugin_unknown
&& bfd_link_plugin_object_p (abfd))
#endif
This is because BFD_SUPPORTS_PLUGINS is always defined. It is its value
that determines whether plugin support is enabled or not.
bfd/ChangeLog:
* elflink.c: Check the value of BFD_SUPPORTS_PLUGINS rather
than its existance.
Some MIPS targets use a named section symbol rather than a symbol with
no name as is used with most ELF targets. When renaming sections, the
named section symbol needs to be renamed too.
Rather than fix this bug, I'd originally intended to just correct the
xfail added recently for update-1.o vs update4.o in update-section.exp,
using the same set of targets for the localize-hidden-1 mips xfail.
I'd extracted that target test into a new function, is_bad_symtab. It
turns out to be useful in readelf.exp too.
bfd/
* config.bfd: Delete mips vxworks patterns matched earlier.
Combine mips*-*-none with mips*-*-elf*.
binutils/
* objcopy.c (find_section_rename): Forward declare. Remove
ibfd and sec_ptr param. Add old_name param. Allow for NULL
returned_flags. Move read of section name and flags to..
(setup_section): ..here. Update find_section_rename call.
(filter_symbols): Rename section symbols for renamed sections.
(copy_object): Call filter_symbols when renamed sections.
* testsuite/lib/binutils-common.exp (is_bad_symtab): New.
* testsuite/binutils-all/update-section.exp: Revert 96037eb0
mips xfail.
* testsuite/binutils-all/objcopy.exp (copy_executable): Use
is_bad_symtab.
(localize-hidden-1): xfail if is_bad_symtab.
* testsuite/binutils-all/readelf.exp: Use is_bad_symtab to select
between mips/tmips.
As with commit ed53407eec ("MIPS/BFD: Don't stop processing on
`bfd_reloc_outofrange'") don't bail out right away and instead continue
processing on a cross-mode jump conversion error, so that any further
issues are also reported. Adjust message formatting accordingly, using
`%X' to abort processing at conclusion. Remove the full stop from the
end of the message, for consistency across error reporting.
Adjust the corresponding test case accordingly and make it trigger the
error twice.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Call
`info->callbacks->einfo' rather than `*_bfd_error_handler' and
use the `%X%H' format for the cross-mode jump conversion error
message. Remove the full stop from the end of the message.
Continue processing rather than returning failure.
ld/
* testsuite/ld-mips-elf/mode-change-error-1a.s: Trigger an error
twice rather than once.
* testsuite/ld-mips-elf/mode-change-error-1.d: Adjust
accordingly. Remove the full stop from the end of the message.
ELF linker shouldn't skip the IR object when searching the symbol table
of an archive element. If linker doesn't know if the object file is an
IR object, it should give LTO plugin a chance to get the correct symbol
table and use the IR symbol table if the input is an IR object.
bfd/
PR ld/18250
PR ld/20267
* elflink.c: Include plugin.h if BFD_SUPPORTS_PLUGINS is
defined.
(elf_link_is_defined_archive_symbol): Call
bfd_link_plugin_object_p on unknown plugin object and use the
IR symbol table if the input is an IR object.
* plugin.c (bfd_link_plugin_object_p): New function.
* plugin.h (bfd_link_plugin_object_p): New prototype.
ld/
PR ld/20267
* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
PR ld/20267.
(lto_run_tests): Likewise.
* testsuite/ld-plugin/pr20267a.c: New file.
* testsuite/ld-plugin/pr20267b.c: Likewise.
Also, don't check alignment on symbol from plugin dummy input.
bfd/
PR ld/20276
* elflink.c (elf_link_add_object_symbols): Don't check alignment
on symbol from plugin dummy input.
ld/
PR ld/20276
* plugin.c (plugin_notice): Set non_ir_ref on common symbols.
* testsuite/ld-plugin/lto.exp (lto_link_tests): Add test for
PR ld/20276.
(lto_run_tests): Likewise.
* testsuite/ld-plugin/pass.out: New file.
* testsuite/ld-plugin/pr20276a.c: Likewise.
* testsuite/ld-plugin/pr20276b.c: Likewise.
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
bfd/
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
This patch adds support for the opcode architectures
SPARC_OPCODE_ARCH_V9{C,D,E,V,M} and its associated BFD machine numbers
bfd_mach_sparc_v9{c,d,e,v,m} and bfd_mach_sparc_v8plus{c,d,e,v,m}.
Note that for arches up to v9b (UltraSPARC III), the detection of the
BFD machine type was based on the bits in the e_machine field of the ELF
header. However, there are no more available bits in that field, so
this patch takes the approach of using the hardware capabilities stored
in the object attributes HWCAPS/HWCAPS2 in order to characterize the
machine the object was built for.
bfd/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* archures.c (bfd_mach_sparc_v8plusc): Define.
(bfd_mach_sparc_v9c): Likewise.
(bfd_mach_sparc_v8plusd): Likewise.
(bfd_mach_sparc_v9d): Likewise.
(bfd_mach_sparc_v8pluse): Likewise.
(bfd_mach_sparc_v9e): Likewise.
(bfd_mach_sparc_v8plusv): Likewise
(bfd_mach_sparc_v9v): Likewise.
(bfd_mach_sparc_v8plusm): Likewise.
(bfd_mach_sparc_v9m): Likewise.
(bfd_mach_sparc_v9_p): Adapt to v8plusm and v9m.
(bfd_mach_sparc_64bit_p): Likewise.
* bfd-in2.h: Regenerate.
* cpu-sparc.c (arch_info_struct): Add entries for
bfd_mach_sparc_v8plus{c,d,e,v,m} and bfd_mach_sparc_v9{c,d,e,v,m}.
* aoutx.h (machine_type): Handle bfd_mach_sparc_v8plus{c,d,e,v,m}
and bfd_mach_sparc_v9{c,d,e,v,m}.
* elf32-sparc.c (elf32_sparc_final_write_processing): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_object_p): Likewise.
include/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/sparc.h (enum sparc_opcode_arch_val): Add
SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
SPARC_OPCODE_ARCH_V9M.
opcodes/ChangeLog:
2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
* sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
(compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
bfd_mach_sparc_v9{c,d,e,v,m}.
* sparc-opc.c (MASK_V9C): Define.
(MASK_V9D): Likewise.
(MASK_V9E): Likewise.
(MASK_V9V): Likewise.
(MASK_V9M): Likewise.
(v6): Add MASK_V9{C,D,E,V,M}.
(v6notlet): Likewise.
(v7): Likewise.
(v8): Likewise.
(v9): Likewise.
(v9andleon): Likewise.
(v9a): Likewise.
(v9b): Likewise.
(v9c): Define.
(v9d): Likewise.
(v9e): Likewise.
(v9v): Likewise.
(v9m): Likewise.
(sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
Since x86 elf_*_check_relocs is called after all symbols have been
resolved, there is no need to check undefined symbols for relocations
against IFUNC symbols.
bfd/
* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
symbols for relocations against IFUNC symbols.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
ld/
* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
Remove .rel.plt section.
* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
This was broken by 4ade44b727,
which changed the calculation to use the .rela.plt linker section
instead of its output section - thus skipping .rela.iplt .
Fix the calculations to include it.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
.rela.iplt in DT_PLTRELSZ.
* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
for DT_PLTRELSZ and DT_RELASZ as well.
Don't do anything special with non-loaded, non-alloced sections.
In particular, any relocs in such sections should not affect GOT
and PLT reference counting (ie. we don't allow them to create GOT
or PLT entries), there's no possibility or desire to optimize TLS
relocs, and there's not much point in propagating relocs to shared
libs that the dynamic linker won't relocate.
* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
non-loaded, non-alloced sections.
* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.
bfd/
PR ld/20254
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
offsets until reloc_toaddr.
ld/
PR ld/20254
* testsuite/ld-avr/avr-prop-6.d: New test.
* testsuite/ld-avr/avr-prop-6.s: New test.
elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for
R_386_IRELATIVE/R_X86_64_IRELATIVE relocations. There is no need to
check symbol type for STN_UNDEF symbol index.
* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
Don't check symbol type for STN_UNDEF symbol index.
* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
R_X86_64_IRELATIVE. Don't check symbol type for STN_UNDEF symbol
index.
2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then. Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic. Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.
Many more places use abfd->my_archive rather than bfd_my_archive (abfd),
so let's make the code consistently use the first idiom.
bfd/
* bfd-in.h (bfd_my_archive): Delete.
* bfd-in2.h: Regenerate.
binutils/
* ar.c: Expand uses of bfd_my_archive.
* size.c: Likewise.
ld/
* ldlang.c: Expand uses of bfd_my_archive.
* ldmain.c: Likewise.
* ldmisc.c: Likewise.
* plugin.c: Likewise.
LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem. They too cannot have their
element bfds closed.
PR ld/20241
bfd/
* archive.c (open_nested_file): Set my_archive.
* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
for thin archives.
* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
(bfd_seek): Likewise.
* bfdwin.c (bfd_get_file_window): Likewise.
* cache.c (cache_bmmap): Likewise.
(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
thin archives.
* plugin.c (try_claim): Likewise.
* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
file within thin archive, not the archive.
binutils/
* bucomm.c (bfd_get_archive_filename): Return file name within thin
archive.
ld/
* ldmain.c (add_archive_element): Just print file name of file within
thin archives.
* ldmisc.c (vfinfo): Likewise.
* plugin.c (plugin_object_p): Open file within thin archives.
(plugin_maybe_claim): Expand comment.
Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
section address for R_386_GOT32/R_386_GOT32X relocations against
IFUNC symbols if there is no base register and return error for
PIC.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
pr20244-2c and pr20244-2d.
* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
* testsuite/ld-i386/pr20244-2.s: New file.
* testsuite/ld-i386/pr20244-2a.d: Likewise.
* testsuite/ld-i386/pr20244-2b.d: Likewise.
* testsuite/ld-i386/pr20244-2c.d: Likewise.
* testsuite/ld-i386/pr20244-2d.d: Likewise.
* testsuite/ld-i386/pr20244-3a.c: Likewise.
* testsuite/ld-i386/pr20244-3b.S: Likewise.
* testsuite/ld-i386/pr20244-3c.S: Likewise.
* testsuite/ld-i386/pr20244-3d.S: Likewise.
Complement:
commit b47468a6db
Author: Catherine Moore <clm@redhat.com>
Date: Mon May 6 15:25:45 2013 +0000
and the return of support for R_MIPS_PC32 there.
bfd/
* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
Because the .got and .got.plt sections were split in new linker
scripts the header is no longer part of sgotplt contents.
Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
Fail safe for trying to reloc GOT and PLT on non dynamic linker. Fix
issue with dynamic relocs not being generated with -pie. Removed some
structures that were not being used. Fixed typo changing RELENT to
RELAENT. Fix for all SECTOFF relocations.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (arc_local_data, arc_local_data): Removed.
(SECTSTART): Changed.
(elf_arc_relocate_section): Fixed mistake in PIE related
condition.
(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
bfd/
2016-06-13 Cupertino Miranda <cmiranda@synospsy.com>
* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
enable support for "-z combreloc" and DT_RELACOUNT.
(elf_backend_reloc_type_class): Likewise
When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.
bfd/
PR ld/20244
* elf32-i386.c (elf_i386_relocate_section): When relocating
R_386_GOT32, return error without a base register for PIC and
subtract the .got.plt section address only with a base register.
ld/
PR ld/20244
* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
* testsuite/ld-i386/pr20244-1.s: New file.
* testsuite/ld-i386/pr20244-1a.d: Likewise.
* testsuite/ld-i386/pr20244-1b.d: Likewise.
* testsuite/ld-i386/pr20244-1c.d: Likewise.
I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.
* elf-strtab.c (struct strtab_save): Use size_t for "size".
(struct elf_strtab_hash): Likewise for "size" and "alloced".
(_bfd_elf_strtab_init): Formatting.
(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
(_bfd_elf_strtab_addref): Take size_t idx param.
(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
(_bfd_elf_strtab_offset): Likewise.
(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
(_bfd_elf_strtab_finalize): Similarly.
* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
using bfd_size_type.
(bfd_section_from_shdr): Delete amt.
(_bfd_elf_init_reloc_shdr): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
(assign_section_numbers): Use size_t reloc_count.
* elflink.c (struct elf_symbuf_head): Use size_t "count".
(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
(elf_link_is_defined_archive_symbol): Likewise.
(elf_add_dt_needed_tag): Likewise.
(elf_finalize_dynstr): Likewise.
(elf_link_add_object_symbols): Likewise.
(bfd_elf_size_dynamic_sections): Likewise.
(elf_create_symbuf): Similarly.
(bfd_elf_match_symbols_in_sections): Likewise.
(elf_link_swap_symbols_out): Likewise.
(elf_link_check_versioned_symbol): Likewise.
(bfd_elf_gc_record_vtinherit): Likewise.
(bfd_elf_gc_common_finalize_got_offsets): Likewise.
This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.
bfd/
* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
and relocs only if shrinking occurred.
ld/
* testsuite/ld-avr/avr-prop-5.d: New.
* testsuite/ld-avr/avr-prop-5.s: New.
We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base, instead of direct call:
call ___tls_get_addr[@PLT]
which requires EBX register as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call. For local
dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction. Since linker may convert
call ___tls_get_addr[@PLT]
to
addr32 call ____tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_i386_check_tls_transition): Check indirect call and direct
call with the addr32 prefix for general and local dynamic models.
Set the tls_get_addr feild.
(elf_i386_convert_load_reloc): Always use addr32 prefix for
indirect ___tls_get_addr call via GOT.
(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
* testsuite/ld-i386/pass.out: New file.
* testsuite/ld-i386/tls-def1.c: Likewise.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-i386/tls-ld1.S: Likewise.
* testsuite/ld-i386/tls-main1.c: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-i386/tlsbin2.dd: Likewise.
* testsuite/ld-i386/tlsbin2.rd: Likewise.
* testsuite/ld-i386/tlsbin2.sd: Likewise.
* testsuite/ld-i386/tlsbin2.td: Likewise.
* testsuite/ld-i386/tlsbinpic2.s: Likewise.
* testsuite/ld-i386/tlsgd3.dd: Likewise.
* testsuite/ld-i386/tlsgd3.s: Likewise.
* testsuite/ld-i386/tlsgd4.d: Likewise.
* testsuite/ld-i386/tlsgd4.s: Likewise.
* testsuite/ld-i386/tlsld2.s: Likewise.
* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
* testsuite/ld-i386/tlspic2.dd: Likewise.
* testsuite/ld-i386/tlspic2.rd: Likewise.
* testsuite/ld-i386/tlspic2.sd: Likewise.
* testsuite/ld-i386/tlspic2.td: Likewise.
* testsuite/ld-i386/tlspic3.s: Likewise.
* testsuite/ld-i386/tlspie3.s: Likewise.
* testsuite/ld-i386/tlspie3a.d: Likewise.
* testsuite/ld-i386/tlspie3b.d: Likewise.
* testsuite/ld-i386/tlspie3c.d: Likewise.
The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
(elf_s390_relocate_section): Fix comment.
(elf_s390_finish_dynamic_sections): Fix initialization of fixed
.got.plt entries.
Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated. Fixed
with the attached patch.
bfd/ChangeLog:
* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
section offset when calculation the larl operand in the first PLT
entry.
ld/ChangeLog:
* testsuite/ld-s390/pltoffset-1.dd: New test.
* testsuite/ld-s390/pltoffset-1.ld: New test.
* testsuite/ld-s390/pltoffset-1.s: New test.
* testsuite/ld-s390/s390.exp: Run new test.
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE. For
example
{"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe. Also, we don't check
user assembly against the processor type as well as we could.
Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31. Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.
This patch fixes those problems in the opcode table, and removes
PPCNONE. I find a plain 0 distracts less from other values.
In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects. It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.
include/
* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
PPC_APUINFO_VLE: Define.
opcodes/
* ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default
cpu for "vle" to e500.
* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
(PPCNONE): Delete, substitute throughout.
(powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated"
except for major opcode 4 and 31.
(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
to match other 32-bit archs.
* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
(ppc_elf_object_p): Call it.
(ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix
overlong line.
(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
_bfd_elf_ppc_at_tprel_transform): Move to..
* elf-bfd.h: ..here.
(_bfd_elf_ppc_set_arch): Declare.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
by vle_opcodes, and that vle flag doesn't enable opcodes. Don't
add vle_opcodes twice.
(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
* testsuite/ld-powerpc/apuinfo-vle2.s: New.
* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
instead of direct call:
call __tls_get_addr[@PLT]
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit. Since linker may convert
call *__tls_get_addr@GOTPCREL(%rip)
to
addr32 call __tls_get_addr
when producing static executable, both patterns are recognized.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
(elf_x86_64_check_tls_transition): Check indirect call and
direct call with the addr32 prefix for general and local dynamic
models. Set the tls_get_addr feild.
(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
indirect __tls_get_addr call via GOT.
(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
transitions with indirect call and direct call with the addr32
prefix.
ld/
* testsuite/ld-x86-64/pass.out: New file.
* testsuite/ld-x86-64/tls-def1.c: Likewise.
* testsuite/ld-x86-64/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/tls-ld1.S: Likewise.
* testsuite/ld-x86-64/tls-main1.c: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
* testsuite/ld-x86-64/tlsbin2.td: Likewise.
* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
* testsuite/ld-x86-64/tlsgd10.s: Likewise.
* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
* testsuite/ld-x86-64/tlsgd11.s: Likewise.
* testsuite/ld-x86-64/tlsgd12.d: Likewise.
* testsuite/ld-x86-64/tlsgd12.s: Likewise.
* testsuite/ld-x86-64/tlsgd13.d: Likewise.
* testsuite/ld-x86-64/tlsgd13.s: Likewise.
* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
* testsuite/ld-x86-64/tlsgd14.s: Likewise.
* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
* testsuite/ld-x86-64/tlsgd9.s: Likewise.
* testsuite/ld-x86-64/tlsld4.dd: Likewise.
* testsuite/ld-x86-64/tlsld4.s: Likewise.
* testsuite/ld-x86-64/tlsld5.dd: Likewise.
* testsuite/ld-x86-64/tlsld5.s: Likewise.
* testsuite/ld-x86-64/tlsld6.dd: Likewise.
* testsuite/ld-x86-64/tlsld6.s: Likewise.
* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.dd: Likewise.
* testsuite/ld-x86-64/tlspic2.rd: Likewise.
* testsuite/ld-x86-64/tlspic2.sd: Likewise.
* testsuite/ld-x86-64/tlspic2.td: Likewise.
* testsuite/ld-x86-64/tlspic3.s: Likewise.
* testsuite/ld-x86-64/tlspie2.s: Likewise.
* testsuite/ld-x86-64/tlspie2a.d: Likewise.
* testsuite/ld-x86-64/tlspie2b.d: Likewise.
* testsuite/ld-x86-64/tlspie2c.d: Likewise.
* testsuite/ld-x86-64/tlsgd5.dd: Updated.
* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
tlspie2c.
bfd/
* coff-z8k.c (extra_case): Fix range check for R_JR relocation.
ld/
* ld/testsuite/ld-z8k/0filler.s: New file.
* ld/testsuite/ld-z8k/branch-target.s: New file.
* ld/testsuite/ld-z8k/branch-target2.s: New file.
* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/calr-opcode.s: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
* ld/testsuite/ld-z8k/filler.s: New file.
* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/jr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
* ld/testsuite/ld-z8k/other-file.s: New file.
* ld/testsuite/ld-z8k/reloc.dd: New file.
* ld/testsuite/ld-z8k/reloc.ld: New file.
* ld/testsuite/ld-z8k/relocseg.dd: New file.
* ld/testsuite/ld-z8k/relocseg.ld: New file.
* ld/testsuite/ld-z8k/relocseg1.dd: New file.
* ld/testsuite/ld-z8k/test-ld.sh: New file.
* ld/testsuite/ld-z8k/this-file.s: New file.
* ld/testsuite/ld-z8k/z8k.exp: New file.
