* erc32.c (sis_memory_write): Change prototype to const unsigned char *.
* func.c (exec_cmd, event, advance_time, wait_for_irq): Use uint64
for counts.
* interf.c (run_sim): Change icount to uint64_t. Use strtol directly.
(sim_resume): Specify maximum run time as uint64.
* sis.c (run_sim): Change icount to uint64_t.
* sis.h: Define uint64 as uint64_t. Change various fields and
prototypes to uint64 to support longer simulations.
The testsuite subdir has a note about unifying the target->subdir logic,
so do just that. The end goal here is to have `make check` work out of
the box without having to delve into dejagnu internals.
The target-specific logic is split out of the top level configure.ac file
and into a dedicated configure.tgt similar to other subprojects (gdb and
ld and etc...) with the difference that this file has to be included at
the m4 level instead of the shell level. This is necessary only because
autoconf requires AC_CONFIG_SUBDIRS be given a string literal and not a
variable value.
Then the toplevel and the testsuite configure files pull this in, the sim
subdir gets expanded into testsuite/site.exp, and the default sim run code
uses this info to set the sim path to the local compiled run file if it
hasn't already been specified.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The current fpu code with externals enabled results in the warnings:
common/sim-fpu.c:2437: warning: missing initializer
common/sim-fpu.c:2437: warning: (near initialization for 'sim_fpu_zero.sign')
common/sim-fpu.c:2440: warning: missing initializer
common/sim-fpu.c:2440: warning: (near initialization for 'sim_fpu_qnan.sign')
So tweak the old style initializers to avoid these.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The common/ code uses sim_cpu rather than SIM_CPU to avoid inter-header
dependency issues, so follow convention to fix building some targets.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The profile code already has options and handling for accepting a file to
write the profile output like the trace code, but it doesn't actually use
it. At the moment, it simply opens the file at the start and closes it at
the end. So add two new local functions the way the trace code is doing
it and have them figure out whether to write the output to stdout or the
specified file. Then convert all existing output in the profile code to
use these helpers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
There is an architecture-info flag for listing possible arch values, but
there is on equivalent for listing possible model values. So add the
equivalent for models.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code. So constify them too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
A few ports rely on internal dv-sockser state in order to detect whether
a connection has been made (look for 'extern sockser_addr'). Rather than
continuing that tradition, extend the existing status function to return
the socket connection status.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Most the sim write functions declare their source buffer const because
they only ever read from it. The global sim_write() function does not
follow this convention though which causes some warnings when trying to
pass it const strings or buffers.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
I found the documentation lacking in many places, so I tried filling in a
lot of holes that I personally fell into.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The profile code has a lot of helper macros already, but none yet for the
branch profiling code. So add ones for the basic functions -- taken and
untaken branches.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The sim code has a lot of static initializer for options and devices, but
since they aren't using newer struct style, they have to specify a value
for every option otherwise gcc spits a lot of warnings about "missing
initializer". So add NULL/0 stubs for pointers/values.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The dup_arg_p function is only given const strings, and it maintains a
local table of those const strings. So constify the whole thing to fix
the GCC warnings:
common/sim-options.c: In function 'sim_parse_args':
common/sim-options.c:559: warning: passing argument 1 of 'dup_arg_p'
discards qualifiers from pointer target type
common/sim-options.c: In function 'print_help':
common/sim-options.c:675: warning: passing argument 1 of 'dup_arg_p'
discards qualifiers from pointer target type
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
I've committed the following patch as obvious. The local "prefix"
variable is only assigned const strings, and only passed to printf()
functions, so add "const" to avoid gcc warnings:
common/sim-fpu.c: In function 'sim_fpu_print_status':
common/sim-fpu.c:2508: warning: initialization discards qualifiers
from pointer target type
common/sim-fpu.c:2566: warning: assignment discards qualifiers
from pointer target type
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The local save_data() function takes a pointer to a buffer and only uses it as
the source to the memcpy() function. Since it is given const strings, GCC
likes to spit out warnings:
common/sim-trace.c: In function 'trace_prefix':
common/sim-trace.c:697: warning: passing argument 5 of 'save_data' discards
qualifiers from pointer target type
So I've committed this as obvious.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The sim-options code assigns a const string to "char *" in decoding the
current environment settings, and only uses it to pass to a printf. GCC
outputs the warnings:
common/sim-options.c: In function 'standard_option_handler':
common/sim-options.c:271: warning: assignment discards qualifiers from pointer
target type
common/sim-options.c:272: warning: assignment discards qualifiers from pointer
target type
common/sim-options.c:273: warning: assignment discards qualifiers from pointer
target type
So I've committed this as "obvious".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The accept() function takes a socklen_t, not an int. Using an int causes:
dv-sockser.c: In function 'connected_p':
dv-sockser.c:273: warning: pointer targets in passing argument 3
of 'accept' differ in signedness
So use the same socklen_t detection code as gdb and convert the accept().
This is the normal "passing a buffer straight to printf makes GCC warn".
While we know this particular case is fine, the trend in this source tree
is to fix this anyways to avoid the warnings.
GCC issues warnings because const strings like "foo" are passed as char*.
sim-watch.c: In function 'watchpoint_type_to_str':
sim-watch.c:120: warning: return discards qualifiers from pointer target type
The trace_option_handler() function only uses cpu_nr when the
SIM_HAVE_ADDR_RANGE define is enabled. So move the decl down
to where the code exists. Otherwise GCC warns:
sim-trace.c: In function 'trace_option_handler':
sim-trace.c:236: warning: unused variable 'cpu_nr'
The device_error() takes a printf style string, so update the prototype
accordingly. The message should be const and it should use an attribute.
This fixes gcc warnings like:
sim-core.c: In function 'sim_core_map_attach':
sim-core.c:200: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
sim-core.c:237: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
sim-core.c: In function 'sim_core_attach':
sim-core.c:304: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
sim-core.c:314: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
sim-core.c:335: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
sim-core.c:348: warning: passing argument 2 of 'device_error' discards qualifiers from pointer target type
The gdb code always passes down -E <little|big> to the sim core when using
the sim target. But the sim core only recognizes this option when the sim
supports big endian systems. So for little endian simulators, any attempt
to use the sim target fails with:
(gdb) target sim
gdbsim: invalid option -- 'E'
unable to create simulator instance
Since always respecting the option doesn't cause any problems, do just
that. If someone tries to use an invalid endian, they'll get an error
anyways.
The common code sets up an autoconf option --enable-sim-trace which adds
-DTRACE= to CPPFLAGS. This causes warnings in the building of some files
that declare a local TRACE() helper macro. So punt it from hw-ports.c
(since it isn't actually used) and convert hw-properties.c to HW_TRACE().
Including stdbool.h before hw-properties.h results in a build error due
to the hw_add_boolean_property function having an argument named "bool"
in its prototype. The source file has already be renamed to not use
this ("boolean" instead), so match the header to the source.
* configure: Regenerate.
* config.in: Regenerate.
* main.c: Include config.h.
Use HAVE_STDLIB_H, HAVE_UNISTD_H, HAVE_GETOPT_H.
Include getopt.h in case HAVE_GETOPT_H is defined.
* compile.c(fetch_1): Fix pre-dec, pre-inc, post-dec and post-inc.
Index registers not masked memory areas.
Only simply increment or decrement.
* compile.c(store_1): Ditto.
netinet/in.h, and netinet/tcp.h.
* configure: Regenerate.
* config.in: Add those headers.
* main.c: Check for them.
(setup_tcp_console): Disable if no networking.
(main): Note missing networking or termios.
* mem.c: Check for those headers.
(stdin_ready): Disable if no termios.
(m32c_sim_restore_console): Disable if no termios.
(mem_get_byte): Disable console input if no termios.
identifiers for file types rather than encoding internal
implementation details of cgen.sh.
(CGEN_CPU_WRITE,CGEN_CPU_SEM,CGEN_CPU_SEMSW): Ditto.
* cgen.sh: Add support for parallel makes.
Rewrite cpu/decode handling to avoid generating "extrafiles" twice.
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add lm32 target.
* Makefile.in: Add lm32 dependencies.
* NEWS: Indicate lm32 is a new target.
* configure.tgt: Add lm32 targets.
* lm32-tdep.c: New file.
gdb/testsuite
2009-05-18 Jon Beniston <jon@beniston.com>
* gdb.asm/asm-source.exp: Add lm32 target.
include/gdb/
2009-05-18 Jon Beniston <jon@beniston.com>
* sim-lm32.h: New file.
sim/
2009-05-18 Jon Beniston <jon@beniston.com>
* MAINTAINERS: Add Jon Beniston as maintainer of lm32 sim.
* configure.ac: Add lm32 target.
* lm32: New directory.
sim/common
2009-05-18 Jon Beniston <jon@beniston.com>
* gennltvals.sh: Add lm32 target.
* nltvals.def: Add lm32 syscall definitions.
sim/lm32/
2009-05-18 Jon Beniston <jon@beniston.com>
* Makefile.in: New file.
* arch.c: New file.
* arch.h: New file.
* config.in: New file.
* configure: New file.
* configure.ac: New file.
* cpu.c: New file.
* cpu.h: New file.
* cpuall.h: New file.
* decode.c: New file.
* decode.h: New file.
* dv-lm32cpu.c: New file.
* dv-lm32timer.c: New file.
* dv-lm32uart.c: New file.
* lm32.c: New file.
* lm32-sim.h: New file.
* mloop.in: New file.
* model.c: New file.
* sem.c: New file.
* sem-switch.c: New file.
* sim-if.c: New file.
* sim-main.c: New file.
* tconfig.in: New file.
* traps.c: New file.
* user.c: New file.
m32c_signal_to_target. Change signal return values from SIGILL,
SIGTRAP, SIGSEGV, etc. to TARGET_SIGNAL_ILL, TARGET_SIGNAL_TRAP,
TARGET_SIGNAL_SEGV, etc. Fix all callers.
(cris_start_address, cris_program_offset): New variables.
(OPTION_CRIS_PROGRAM_OFFSET, OPTION_CRIS_STARTADDR): New option
enums.
(cris_options): New options --cris-program-offset and
--cris-start-address.
(cris_option_handler): Handle new options.
(cris_program_offset_write, cris_set_section_offset_iterator)
(cris_offset_sections, cris_offset_sections): New functions.
(sim_load): Use cris_program_offset_write as function argument to
cris_load_elf_file, not sim_write.
(struct offsetinfo): New struct.
(cris_handle_interpreter): Fix typo in comment.
(sim_open): Call cris_offset_sections as soon as the bfd of the
infile is available. Gate bfd validity checks on abfd non-NULL.
(sim_create_inferior): Let cris_start_address when != -1 override
other start-address choices.
(MULHI, NEGHI, ABSHI, ADDSI, SUBSI, MULSI, NEGSI, ABSSI, ADDDI)
(SUBDI, MULDI, NEGDI, ABSDI): Cast arguments to the unsigned type
variant; UQI, UHI, USI, UDI, and cast the result to the signed
type, QI, HI, SI, DI.
(MULHI, NEGHI, ABSHI, ADDSI, SUBSI, MULSI, NEGSI, ABSSI, ADDDI)
(SUBDI, MULDI, NEGDI, ABSDI): Cast arguments to the unsigned type
variant; UQI, UHI, USI, UDI, and cast the result to the signed
type, QI, HI, SI, DI.
(create_map): Make -1 imply a non-fixed address, not 0. All
callers changed. Only prefer the next higher unmapped address if
the last mapped address is no less than 0x40000000. Check that
the address to be mapped is not already mapped. Update head
comment.
(unmap_pages): Don't call abort when recursive call fails, just
note and return an error if a page in the range couldn't be unmapped.
(cris_bmod_handler, h_supr_set_handler, h_supr_get_handler)
(schedule, make_first_thread, cris_pipe_empty): New local variable sd.
(cris_break_13_handler) <case TARGET_SYS_mmap2>: Handle
non-MAP_FIXED argument overlapping existing map. For MAP_FIXED,
don't abort on page not being mapped. Handle non-anon filemap
with length padded to pagesize.
set_target_thread_data.
* cris/crisv32f.c (CRIS_TLS_REGISTER): Define.
* cris/crisv10f.c: Ditto.
* cris/cris-tmpl.c (MY (set_target_thread_data)): New function.
(MY (f_specific_init)): Set new _sim_cpu member to new function.
* cris/traps.c (TARGET_SYS_set_thread_area): Define.
(cris_break_13_handler) <case TARGET_SYS_set_thread_area>: New
case.
(TARGET_EPOCH): Update to match TARGET_UTSNAME. Correct comment.
(cris_break_13_handler) <case TARGET_SYS_uname>: Update to
2.6.27. Set machine field to the BFD printable name of the
machine.
sim/cris/c/badldso2.c, sim/cris/c/badldso3.c,
sim/cris/c/helloaout.c, sim/cris/c/hellodyn.c,
sim/cris/c/hellodyn2.c, sim/cris/c/writev1.c,
sim/cris/c/writev2.c: New tests.
* sim/cris/c/c.exp: If compiler links libc.so when attempting to
link dynamically, create symlink named "lib" to the directory
where it is found. Handle new test-case option "dynamic".
(is_mapped_only, cris_dump_map): New functions.
(cris_break_13_handler) <case TARGET_SYS_mmap2>: Handle more flags
and prot combinations and a non-zero page-offset. If
TARGET_MAP_FIXED, unmap pages before mapping them.
<case TARGET_SYS_mprotect>: When checking, allow any length
argument. Don't actually do anything.
<case TARGET_SYS_writev>: New case.
* cris/sim-if.c: Include elf-bfd.h.
(struct progbounds): New members end_loadmem, start_nonloadmem.
(xprintf, eprintf): New functions, copied from common/sim-load.c.
(cris_load_elf_file, sim_load, cris_get_progbounds): New functions.
(get_progbounds_iterator): Renamed from get_progbounds. Make
static. Update head comment. Set new struct progbounds members.
(exec_load_addr, interp_load_addr, interp_start_addr): New static
variables.
(aux_ent_phdr, aux_ent_phent, aux_ent_phnum, aux_ent_base)
(aux_ent_entry, cris_write_interp, cris_handle_interpreter): New
functions.
(sim_open): New constant array auxv_entries. Rewrite AUX_ENT
handling to use auxv_entries. Improve error message and checking
for invalid programs. Use new variable abfd for the program
instead of for each access reaching into sd to get it.
(sim_create_inferior): If non-zero, use interp_start_addr instead
of the program start address.
(cris_disassemble_insn): Remove incorrect and unclear, supposedly
stale comment. Always specify little-endian.
* configure: Regenerated.
* configure.ac: Add test for System V shared memory and semaphore.
* debug.c, debug.h: Add trace support for new devices.
* hw_sem.c, hw_shm.c: New files.
* Makefile.in: Add hw_sem.c and hw_shm.c.
command interpreter to use to run the input file. This is
necessary because otherwise SHELL is taken from the user's
environment, and not from the makefile that invoked this script
and the user might not be running an sh-like shell.
* cris/Makefile.in: Pass -shell parameter to genmloop.sh.
* fr30/Makefile.in: Likewise.
* frv/Makefile.in: Likewise.
* i960/Makefile.in: Likewise.
* iq2000/Makefile.in: Likewise.
* m32r/Makefile.in: Likewise.
* frv/mloop.in: Add missing start of line comment marker.
* main.c (main): Add option to set raw console.
* mem.h (m32c_use_raw_console): Declare.
* mem.c (m32c_sim_restore_console): Only restore console if it's
been previously set.
(m32c_use_raw_console): Define.
(mem_get_byte): Set raw console if m32c_use_raw_console is set.
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* cris/configure: Regenerate.
sim/common:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* aclocal.m4: Include ../../config/acx.m4.
* common.m4: Use ACX_PKGVERSION and ACX_BUGURL.
* configure, config.in: Regenerate.
* Make-common.in (LIB_OBJS): Add version.o.
(version.c, version.o): New rules.
* run.c: Include version.h.
(usage): Add help parameter. Print output either to stdout or
stderr depending on that parameter.
(print_version): New.
(main): Check for --help and --version.
* run-sim.h (sim_target_display_usage): Add help parameter.
* version.h: New.
sim/arm:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
* wrapper.c (sim_target_display_usage): Add help parameter.
sim/cr16:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/d10v:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/erc32:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/frv:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/h8300:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/iq2000:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m32c:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m32r:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m68hc11:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mcore:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mips:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mn10300:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/ppc:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure.ac: Use ACX_PKGVERSION and ACX_BUGURL.
* configure, config.in: Regenerated.
* Makefile.in (LIB_OBJ): Add version.o.
(version.c, version.o): New rules.
* psim.c (psim_usage): Add help parameter. Print the bug URL.
Exit with code 0 for help.
(psim_options): Update calls to psim_usage. Handle --help and
--version.
* psim.h (psim_usage): Update prototype.
* main.c (main): Update psim_usage call.
sim/sh:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/sh64:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/v850:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
* cpu.h (m32c_opcode_pc): New.
(in_gdb): New.
* gdb-if.c (sim_open): Add Timer A support. Support unbuffered
console.
* int.c (trigger_interrupt): Manage the U flag properly.
(trigger_based_interrupt): Likewise.
(trigger_fixed_interrupt): New.
(trigger_peripheral_interrupt): New.
* int.h (trigger_peripheral_interrupt): New.
* m32c.opc: Use m32c_opcode_pc throughout, as needed.
(decode_m32c): Detect jump-to-zero with traceback.
(BRK): Try to do the right thing, keeping track of whether we're
in gdb or not, and if the user has provided a handler or not.
(GBRK): Alternate break opcode for gdb, in case the user's app
needs to use BRK for itself.
(BRK2): Implement.
* main.c: Add Timer A support. Support TCP-based console.
(setup_tcp_console): New.
(main): Add Timer A support. Support TCP-based console.
* mem.c: Add Timer A support. Support TCP-based console.
(mem_ptr): Enhance NULL pointer detection.
(stdin_ready): New.
(m32c_sim_restore_console): New.
(mem_get_byte): Check for console input ready.
(update_timer_a): New.
* r8c.opc (SSTR): Use r0l, not r0h.
(REIT): Fix return frame logic.
* reg.c (print_flags): New.
(trace_register_changes): Use it.
(m32c_dump_all_registers): New.
* timer_a.h: New.
* load.c: Fix indentation.
* trace.c: Fix indentation.
* trace.h: Fix indentation.
ChangeLog:
Add simulator for National cr16 processor.
* cr16: New directory with cr16 simulator files.
* configure.ac: Add an entry for National cr16 target.
* configure: Regenerate.
* mips.igen (check_fmt_p): Provide a separate mips32r2 definition
that unconditionally allows fmt_ps.
(ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
(FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
(PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
filter from 64,f to 32,f.
(PREFX): Change filter from 64 to 32.
(LDXC1, LUXC1): Provide separate mips32r2 implementations
that use do_load_double instead of do_load. Make both LUXC1
versions unpredictable if SizeFGR () != 64.
(SDXC1, SUXC1): Extend to mips32r2, using do_store_double
instead of do_store. Remove unused variable. Make both SUXC1
versions unpredictable if SizeFGR () != 64.
(display_mem_info): New static variable.
(mips_option_handler): Handle OPTION_INFO_MEMORY.
(mips_options): Add info-memory and memory-info.
(sim_open): After processing the command line and board specification, check display_mem_info.
If it is set then call the real handler for the --memory-info command line switch.
(parse_size): Handle a suffix on the size value.
* sim-options.c (standard_options): Mention that the mem-size switch accepts suffixes.
(standard_option_handler): Handle a suffix on the size value.
* configure.ac (sim_mipsisa3264_configs): New variable.
(mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
every configuration support all four targets, using the triplet to
determine the default.
* configure: Regenerate.
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
uninterpreted formats. If fmt is one of the uninterpreted types
don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
fmt_word, and fmt_uninterpreted_64 like fmt_long.
(store_fpr): When writing an invalid odd register, set the
matching even register to fmt_unknown, not the following register.
* interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
the the memory window at offset 0 set by --memory-size command
line option.
(sim_store_register): Handle storing 4 bytes to an 8 byte floating
point register.
(sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
register.
(sim_monitor): When returning the memory size to the MIPS
application, use the value in STATE_MEM_SIZE, not an arbitrary
hardcoded value.
(cop_lw): Don' mess around with FPR_STATE, just pass
fmt_uninterpreted_32 to StoreFPR.
(cop_sw): Similarly.
(cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
(cop_sd): Similarly.
* mips.igen (not_word_value): Single version for mips32, mips64
and mips16.
* gdb/target.c (target_flash_erase): Do not return void value.
(target_flash_done): Likewise.
* gdb/cli/cli-cmds.c (source_command): Likewise.
Reported by timeless@gmail.com:
* wrapper.c (sim_target_parse_arg_array): Do not return void value.
(cris_unknown_syscall_action): Declare.
* cris/sim-if.c (cris_unknown_syscall_action): Define.
(cris_options): Add cris-unknown-syscall option.
(cris_option_handler): Correct comment about and error message for
invalid --cris-cycles argument. Handle --cris-unknown-syscall.
* cris/traps.c: Include stdarg.h
(cris_unknown_syscall): New function.
(cris_break_13_handler): Instead of sim_io_eprintf and
sim_engine_halt, call cris_unknown_syscall to handle more or less
unknown syscalls. Adjust code as necessary to handle return
value.
(process): Don't write as much to the pipe as to trig the
inordinate-amount test in the sim pipe machinery. Correct test of
write return-value; check only that pipemax bytes were
successfully written. For error-case, emit strerror as well.
(main): Add a second read.
* cris/Makefile.in (CONFIG_DEVICES): Remove redundant setting.
(dv-cris.o, dv-rv.o rvdummy$(EXEEXT), rvdummy.o): New rules.
(all): Depend on rvdummy$(EXEEXT).
* cris/configure.ac: Call SIM_AC_OPTION_WARNINGS. Check for
sys/socket.h and sys/select.h. Call SIM_AC_OPTION_HARDWARE,
default off.
* cris/configure: Regenerate.
* cris/cris-sim.h (cris_have_900000xxif): Declare here.
(enum cris_interrupt_type, crisv10deliver_interrupt)
(crisv32deliver_interrupt: New declarations.
* cris/cris-tmpl.c [WITH_HW] (MY (f_model_insn_after)): Call
sim_events_tickn and set state-events member work_pending when it's
time for the next event.
[WITH_HW] (MY (f_specific_init)): Set CPU-model-specific
interrupt-delivery function.
* cris/crisv10f.c (MY (deliver_interrupt)): New function.
* cris/crisv32f.c (MY (deliver_interrupt)): New function.
* cris/devices.c: Include hw-device.h.
(device_io_read_buffer) [WITH_HW]: Call hw_io_read_buffer.
(device_io_write_buffer): Only perform 0x900000xx-functions if
cris_have_900000xxif is nonzero. Else if WITH_HW defined,
call hw_io_write_buffer. Add return 0 last in function.
* cris/sim-if.c (cris_have_900000xxif): Now global.
(sim_open) [WITH_HW]: Clear deliver_interrupt cpu member.
Force "-model" option, effectively.
* cris/sim-main.h (cris_interrupt_delivery_fn): New type.
(struct _sim_cpu) [WITH_HW]: New member deliver_interrupt.
(mem_put_hi): Hook in simulated trace port.
(mem_get_byte): Hook in simulated uart control port.
* opc2c: Be more picky about matching special comments.
* r8c.opc (shift_op): Limit shift counts to -16..16.
(BMcnd): Map conditional codes.
* reg.c (condition_true): Mask condition code to 4 bits.
* syscalls.c: Include local syscall.h.
* syscall.h: New, copied from libgloss.
sim_resume. Expect target signal numbers from sim_stop_reason.
* wrapper.c (gdb/signals.h): Include it.
(SIGTRAP): Don't define.
(SIGBUS): Likewise.
(sim_stop_reason): Use TARGET_SIGNAL_* instead of SIG*.
* sim-reason.c (sim_stop_reason): Use
sim_signal_to_target, not sim_signal_to_host.
* sim-signal.c (sim_signal_to_host): Fix typo.
(sim_signal_to_target): New function.
* interp.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* interf.c: (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* sim_calls.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* psim.c (cntrl_c_simulation): Use TARGET_SIGNAL_*.
(open_map): Use TARGET_O_ACCMODE, TARGET_O_RDONLY and
TARGET_O_WRONLY.
(cris_break_13_handler) <case TARGET_SYS_fcntl>: Add support for
F_GETFL on fd 0, 1 and 2.
last_open_fd, last_open_flags.
* cris/traps.c: Don't include targ-vals.h.
(TARGET_O_ACCMODE): Define.
(cris_break_13_handler): Set new _sim_cpu members.
<case TARGET_SYS_fcntl>: Support special case of F_GETFL.
Rearrange code as switch. Emit "unimplemented" abort for
unimplemented fcntl calls.
* sim/arm/armos.c: Include limits.h
(unlink): Remove this macro. It is unused in this file and
conflicts with sim_callback->unlink.
(PATH_MAX): Define as 1024 if not already defined.
(ReadFileName): New function.
(SWIopen): Fix a potential buffer overflow.
(SWIremove): New function.
(SWIrename): Ditto.
(ARMul_OSHandleSWI): Handle the RDP calls SWI_IsTTY,
SWI_Remove, and SWI_Rename, as well as the RDI calls
AngelSWI_Reason_IsTTY, AngelSWI_Reason_Remove, and
AngelSWI_Reason_Rename.
* cpu.c,cpu.h,decode.c,decode.h,model.c,sem.c: Regenerate.
Contribute the following changes:
2003-09-29 Dave Brolley <brolley@redhat.com>
* frv-sim.h: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
CGEN_ATTR_VALUE_TYPE.
* mloop.in: Ditto.
* pipeline.c: Ditto.
* traps.c: Ditto.
* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
available.
* armemu.c: Use them.
* armvirt.c (ARMul_MemoryInit): Use correct type for size.
* configure.ac: Check for stdint.h.
* config.in: Regenerate.
* configure: Regenerate.
* mips.igen (mips32r2, mips64r2): New ISA models. Add new model
tags to all instructions which are applicable to the new ISAs.
(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
vr.igen.
* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
instructions.
* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
to mips.igen.
* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
* configure: Regenerate.
* common/callback.c (PIPE_BUF): Provide default refinition.
(os_lstat): Use stat if lstat is not available on the host.
(os_ftruncate): Return EINVAL if not available on the host.
(os_truncate): Ditto.
* common/configure.ac: Check for lstat, truncate and ftruncate.
* common/configure: Regenerate.
* common/config.in: Regenerate.
(ARMulEmulate32): Call handle_v6_insn when a possible v6 insn is found.
* armdefs.h (struct ARMul_State): Add new field: is_v6.#
(ARM_v6_Prop): Define.
* arminit.c (ARMul_NewState): Initialise the v6 flag.
(ARMul_SelectProcessor): Determine if the v6 flag should be set.
* wrapper.c (sim_create_inferior): For unknown architectures, default to allowing the v6 instructions.
2005-02-28 Jim Blandy <jimb@redhat.com>
* aclocal.m4 (SIM_AC_OPTION_WARNINGS): Don't include
-Wuninitialized in the default list of build warnings if CFLAGS is
set, and doesn't include -O. (Using -Wuninitialized without
optimization produces a warning, which interferes with compilation
with -Werror.)
sim/ChangeLog:
2005-02-28 Jim Blandy <jimb@redhat.com>
* d10v/configure.ac, igen/configure.ac, m68hc11/configure.ac,
mips/configure.ac, mn10300/configure.ac, v850/configure.ac:
Regenerated, after change to common/aclocal.m4.
* sim/erc32/float.c (set_fsr): Do not use deprecated multi-line
strings.
(clear_accex): Ditto.
* sim/erc32/interf.c: Remove the redeclaration of fprintf.
* sim/erc32/sis.c: Ditto.
* sim/erc32/exec.c: Add missing semicolon.
* sim/erc32/func.c: Remove definitions of generic_print_address,
generic_symbol_at_address, buffer_read_memory and perror_memory, as
they are already defined in opcodes/dis-buf.c.
2005-02-09 Jim Blandy <jimb@redhat.com>
* cgen-sim.scm (load-files): Don't load fixup.scm. (See
corresponding change in the sim/common directory.)
sim/common/ChangeLog:
2005-02-09 Jim Blandy <jimb@redhat.com>
* Make-common.in (CGEN): Load guile.scm, and include a trailing
'-s' argument.
(CGEN_FLAGS_TO_PASS): Include single quotes around the reference
to $(CGEN), to ensure that the command substitution happens where
the variable is referenced in the submake, not when the submake's
arguments are expanded.
(cgen.sh): Be prepared for the 'cgen' argument to contain spaces.
(arch, cpu, decode, cpu-decode, defs, desc): Place the name of the
application Scheme script directly after ${cgen}; don't precede it
with a -s.
* callback.c [HAVE_LIMITS_H]: Include limits.h.
Include libiberty.h.
(os_close, os_read, os_write, os_fstat, os_ftruncate): Support fd
being either end of a pipe.
(os_pipe, os_pipe_empty, os_pipe_nonempty): New functions.
(os_shutdown): Clear pipe state.
(default_callback): Initialize new members.
(cb_store_target_endian): Renamed from store, new first parameter
host_callback *cb, drop last parameter big_p. Take endianness
from cb.
(cb_host_to_target_stat): Change to use cb_store_target_endian.
Remove variable big_p.
* nrun.c (main): Initialize default_callback.target_endian.
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mn10300/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: d10v/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: erc32/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: frv/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: h8300/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: m32r/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mcore/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: mips/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: v850/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Index: common/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* common.m4: New file, based on of aclocal.m4.
Index: arm/ChangeLog
2005-01-12 Andrew Cagney <cagney@gnu.org>
* configure.ac: Update to use ../common/common.m4.
* configure: Re-generate.
Committed by Kei Sakamoto.
* traps-linux.c (m32r_trap): Add entries of the following dummy system
calls: __NR_mmap2, __NR_lchown32, __NR_getuid32, __NR_getgid32,
__NR_geteuid32, __NR_getegid32, __NR_getgroups32, __NR_fchown32,
__NR_setfsuid32, __NR_setfsgid32, __NR_getresuid32,
__NR_getresgid32 and __NR_chown32.
* syscall.h: Add new definitions of system call number.
* sim-options.c (STANDARD_OPTIONS): New member OPTION_SYSROOT.
(standard_options): Support --sysroot=<path>.
(standard_option_handler): Handle OPTION_SYSROOT.
* syscall.c (simulator_sysroot): Define, initialized empty.
(get_path): Prepend simulator_sysroot to absolute file path.
[HAVE_STRING_H]: Include string.h.
[!HAVE_STRING_H && HAVE_STRINGS_H]: Include strings.h.
* nrun.c [HAVE_UNISTD_H]: Include unistd.h.
(main): If simulator_sysroot is not empty, chdir there.
* sim-config.h (simulator_sysroot): Declare.
st_dev, st_ino, st_mode, st_nlink, st_uid, st_gid, st_rdev,
st_size, st_blksize, st_blocks, st_atime, st_mtime and st_ctime.
* aclocal.m4 (SIM_CHECK_MEMBER, SIM_CHECK_MEMBERS_1)
(SIM_CHECK_MEMBERS): New macros.
* callback.c (cb_host_to_target_stat): Use temporary macro ST_x
for struct stat member test and write. Add ST_x calls for each
struct stat member tested in configure.in. Wrap each ST_x call in
#ifdef of configure macro for that member.
* configure, config.in: Regenerate.
add sub-dependencies for other sim files that they include.
(sim_main_headers): Use sim-*_h rules.
(sim-load.o): Depend on sim-basics_h, not sim_main_headers.
Committed by Andrew Cagney.
* traps-linux.c: Don't include linux/module.h.
(m32r_trap): Remove dummy systemcall's entry of __NR_ustat and
__NR_get_kernel_syms.
Committed by Andrew Cagney.
* configure.in: Check for sys/mount.h, sys/vfs.h, sys/statfs.h.
Check for struct statfs.
* emul_netbsd.c: If not HAVE_STRUCT_STATFS, #undef HAVE_FSTATFS.
* configure, config.in: Regenerate.
* bandor.s: New file.
* bandornot.s: New file.
* bclr.s: New file.
* bld.s: New file.
* bldnot.s: New file.
* bset.s: New file.
* bst.s: New file.
* bxor.s: New file.
* clip.s: New file.
* div.s: New file.
* fail.s: New file, make sure fail works.
* fsca.s: New file.
* fsrra.s: New file.
* mov.s: New file.
* mulr.s: New file.
* pass.s: New file, make sure pass works.
* pushpop.s: New file.
* resbank.s: New file.
* testutils.inc (bf8k, bt8k, assertmem): New macros.
* interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro.
(in_delay_slot): New flag variable.
(Delay_Slot): Set in_delay_slot.
(sim_resume): Reset in_delay_slot after leaving code switch.
* gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all
instructions not allowed in delay slots.
Commited by Corinna Vinschen <vinschen@redhat.com>
Introduce SH2a support.
* interp.c: Change type of jump table to short. Add various macros.
(sim_load): Save the bfd machine code.
(sim_create_inferior): Ditto.
(union saved_state_type): Add tbr, ibnr and ibcr registers.
Move bfd_mach to end of struct. Add regstack pointer.
(init_dsp): Don't swap contents of sh_dsp_table any more. Instead
use it directly in its own switch statement. Allocate space for 512
register banks.
(do_long_move_insn): New function.
(do_blog_insn): Ditto.
(trap): Use trap #13 and trap #14 to set ibnr and ibcr.
* gencode.c: Move movx/movy insns into separate switch statement.
(op tab): Add sh2a insns. Reject instructions that are disabled
on that chip.
(gensim_caselist): Generate default case here instead of in caller.
(gensim): Generate two separate switch statements. Call
gensim_caselist once for each (for movsxy_tab and for tab).
Add tokens for r15 and multiple regs.
(conflict_warn, warn_conflicts): Add for debugging.
2004-07-20 Jim Blandy <jimb@redhat.com>
Use a fixed register numbering when communicating with the PowerPC
simulator.
* ppc-tdep.h (struct gdbarch_tdep): New member: 'sim_regno'.
* rs6000-tdep.c: #include "sim-regno.h" and "gdb/sim-ppc.h".
(set_sim_regno, init_sim_regno_table, rs6000_register_sim_regno):
New functions.
(rs6000_gdbarch_init): Register rs6000_register_sim_regno. Call
init_sim_regno_table.
* Makefile.in (gdb_sim_ppc_h): New variable.
(rs6000-tdep.o): Update dependencies.
include/gdb/ChangeLog:
2004-07-20 Jim Blandy <jimb@redhat.com>
* sim-ppc.h: New file.
sim/ppc/ChangeLog:
2004-07-20 Jim Blandy <jimb@redhat.com>
Use a fixed register numbering when communicating with the PowerPC
simulator.
* sim_calls.c: #include "registers.h" and "gdb/sim-ppc.h"; do not
include GDB's "defs.h".
(gdb_register_name_table): New variable.
(gdb_register_name_table_size): New enum constant.
(gdb_register_name): New function.
(sim_fetch_register, sim_store_register): Use gdb_register_name,
instead of calling gdbarch_register_name.
* Makefile.in (GDB_SIM_PPC_H): New variable.
(DEFS_H): Delete variable.
(sim_calls.o): Update dependencies.
2004-07-26 Andrew Cagney <cagney@gnu.org>
Problem from Olaf Hering <olh@suse.de>.
* Makefile.in (install-man, installdirs): Add DESTDIR prefix.
Index: ppc/ChangeLog
2004-07-26 Andrew Cagney <cagney@gnu.org>
Problem from Olaf Hering <olh@suse.de>.
* Makefile.in (install, installdirs): Add DESTDIR.
2003-07-23 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Make sure that dst.reg refers to the
right register byte in mova/sz.l @(dd,RnL),ERn.
2003-07-21 Richard Sandiford <rsandifo@redhat.com>
* compile.c (sim_resume): Zero-extend immediate to muls, mulsu,
mulxs, divs and divxs.
sim/testsuite/sim/h8300/ChangeLog:
2003-07-22 Michael Snyder <msnyder@redhat.com>
* mul.s: Don't try to use negative immediate (it's always
unsigned).
* div.s: Ditto.
* utils-fpu.inc (enable_fpu, ckm_fp_cc): New macros.
(clrset_fp_cc): Fix mask used for upper 7 condition codes.
* utils-mdmx.inc: Include utils-fpu.inc.
(enable_mdmx): Use enable_fpu.
* utils-fpu.inc: New file.
* utils-mdmx.inc: New file.
* mdmx-ob.s: New file.
* mdmx-ob-sb1.s: New file.
* basic.exp: Run new mdmx-ob and mdmx-ob-sb1 tests.
* sim/mips/basic.exp (run_hilo_test): New procedure.
(models): Only list models that are included in the configuration.
(submodels): New variable, set to submodels of the above.
(mips64vr-*-elf, mips64vrel-*-elf): New configuration stanza.
Run hilo-hazard-[123].s.
(MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
* mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
separate implementations for mipsIV and mipsV. Use new macros to
determine whether the restrictions apply.
* frv.c (frvbf_iacc_cut): Rework, taking rounding into account.
testsuite/
* sim/frv/fr400/scutss.cgs: Fix tests to account for rounding.
Add some new ones.
* gencode.c (table): Change from char to short.
(dumptable): Change generated table from char to short.
* interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
(init_dsp): Compute size of sh_dsp_table.
(sim_resume): Change jump_table from char to short.
Committed by Andrew Cagney.
* mloopx.in: Update copyright.
(xextract-pbb): Fixed trap for system calls operation in parallel.
* mloop2.in (xextract-pbb): Ditto.
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* configure.in (mips*-*-*): Configure in testsuite.
* configure: Regenerate.
[ sim/testsuite/ChangeLog ]
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* sim/mips: New directory. Tests for the MIPS simulator.
[ sim/testsuite/sim/mips/ChangeLog ]
2004-01-26 Chris Demetriou <cgd@broadcom.com>
* basic.exp: New file.
* testutils.inc: New file.
* sanity.s: New file.
* mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
(check_mult_hilo): Improve comments.
(check_div_hilo): Likewise. Also, fork off a new version
to handle mips32/mips64 (since there are no hazards to check
in MIPS32/MIPS64).
* gencode.c (expand_opcode): Simplify and reorganize.
Eliminate "shift" parameter. Eliminate "4 bits at a time"
assumption. Flatten switch statement to a single level.
Add "eeee" token for even-numbered registers.
(bton): Delete.
(fsca): Use "eeee" token.
(ppi_moves): Rename to "expand_ppi_movxy". Do the ddt
[movx/movy] expansion here, as well as the ppi expansion.
(gensim_caselist): Accept 'eeee' along with 'nnnn'.
(O_RDONLY): Do not define.
(O_WRONLY): Likewise.
(O_RDWR): Likewise.
(targ-vals.h): Include it.
(translate_open_mode): Use TARGET_O_* instead of O_*.
(SWIopen): Likewise.
* Makefile.in (armos.o): Depend on targ-vals.h.
(SPR_REGNUM_MAX): Delete.
* frv.c (gdb/sim-frv.h): Include.
(frvbf_fetch_register, frvbf_store_register): Use register number
constants from gdb/sim-frv.h. Check availability of general
purpose and float registers.
* frv-sim.h (REGNUM_LR): Removed.
(REGNUM_SPR_MIN,REGNUM_SPR_MAX): New macros.
* frv.c (frvbf_fetch_register): Fetch SPR registers based on
REGNUM_SPR_MIN and REGNUM_SPR_MAX. Check whether SPRs are implemented.
Return 0 for an unimplemented register. Return the length of the data
for an implemented register.
(frvbf_store_register): Ditto.
* h8300/compile.c : Addition of extern variable h8300_normal_mode
(SP) : Handle normal mode
(bitfrom) : Use normal mode flag to return suitable value
(lvalue) : Use normal mode flag to return command line location
(decode) : Decode instruction correctly for normal mode
(init_pointers) : Initialise memory correctly for normal mode
(sim_resume) : Handle cases for normal mode using h8300_normal_mode flag
(sim_store_register) : Handle 2 byte PC for normal mode
(sim_fetch_register) : Handle 2 byte PC for normal mode
(set_h8300h) : Set normal mode flag as per architechture
(sim_load) : Allocate 64K for normal mode instead of bigger memory
* callback.h (struct host_callback_struct): New members ftruncate
and truncate.
gdb:
sim/common:
* callback.c (os_ftruncate, os_truncate): New functions.
(default_callback): Initialize ftruncate and truncate members.
sim/sh:
* syscall.h (SYS_truncate, SYS_ftruncate): Define.
* interp.c (trap): Add support for SYS_ftruncate and SYS_truncate.
* sim/frv/testutils.inc (or_gr_immed): New macro.
* sim/frv/fp_exception-fr550.cgs: Write insns using
unaligned registers into the program in order to
cause the required exceptions.
* sim/frv/fp_exception.cgs: Ditto.
* sim/frv/regalign.cgs: Ditto.
* sim/frv/fr550: New subdirectory.
* sim/frv/fr400/*.cgs: Add fr550 as appropriate.
* sim/frv/fr500/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
* sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
* profile.h (update_FR_ptime): New prototype.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): Ditto.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(post_wait_for_SPR): Ditto.
* profile.c (update_FR_ptime): Moved here from profile-fr500.c.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): New function.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(vliw_wait_for_fdiv_resource): Correct resource name.
(vliw_wait_for_fsqrt_resource): Ditto.
(post_wait_for_SPR): New function.
* profile-fr500.c (frvbf_model_fr500_u_commit): New function.
(frvbf_model_fr500_u_gr2fr): Pass out_FRk as output register to
adjust_float_register_busy.
(frvbf_model_fr500_u_gr_load): Record latency of SPR registers.
(frvbf_model_fr500_u_fr_load): Wait for and record latency of SPR
registers.
(frvbf_model_fr500_u_float_arith): Ditto.
(frvbf_model_fr500_u_float_dual_arith): Ditto.
(frvbf_model_fr500_u_float_div): Ditto.
(frvbf_model_fr500_u_float_sqrt): Ditto.
(frvbf_model_fr500_u_float_convert): Ditto.
(update_FR_ptime): Moved to profile.c
(update_FRdouble_ptime): Moved to profile.c
* profile-fr400.c (update_FR_ptime): Removed. Identical to functions
for other machines.
(update_FRdouble_ptime): Ditto.
* arch.h,cpu.h,sem.c,decode.[ch],model.c,sem.c: Regenerated.
* registers.c (frv_check_spr_read_access): Check for access to
ACC4-ACC63 and ACCG4-ACCG63.
* profile.h (frv-desc.h): #include it.
(spr_busy): New member of FRV_PROFILE_STATE.
(spr_latency): Ditto.
(GNER_FOR_GR): New macro.
(FNER_FOR_FR): New maccro.
(update_SPR_latency): New function.
(vliw_wait_for_SPR): New function.
* profile.c (profile-fr550.h): #include it.
(update_latencies): Update SPR latencies.
(update_target_latencies): Ditto.
(update_SPR_latency): New function.
(vliw_wait_for_SPR): New function.
* profile-fr500.c (frvbf_model_fr500_u_idiv): Record GNER latency.
(frvbf_model_fr500_u_trap): Removed unused variable, ps.
(frvbf_model_fr500_u_check): Ditto.
(frvbf_model_fr500_u_clrgr): New unit modeller for fr500.
(frvbf_model_fr500_u_clrfr): Ditto.
(frvbf_model_fr500_u_spr2gr): Wait for SPR.
(frvbf_model_fr500_u_gr2spr): Ditto.
* frv-sim.h (H_SPR_ACC4): New macro.
(H_SPR_ACCG4): New macro;
(H_SPR_ACC0): Removed.
(H_SPR_ACCG0): Removed.
* arch.h,model.c,sem[ch],decode.[ch]: Regenerated.
* profile.c (slot_names): FM1 was listed twice. Changed first
instance to FM0. Added IALL, FMALL and FMLOW.
(print_parallel): Don't examine slots with no insns.
On behalf of Doug Evans <dje@sebabeach.org>
* Makefile.in (stamp-arch,stamp-cpu): Pass archfile to cgen.
Remove copying of .cpu file to cgen/cpu, no longer needed.
On behalf of Doug Evans <dje@sebabeach.org>
* cgen.sh: New arg archfile.
* Make-common.in (cgen-arch,cgen-cpu,cgen-defs,cgen-decode,
cgen-cpu-decode,cgen-desc): Update call to cgen.sh.
* sim/frv/interrupts/Ipipe-fr400.cgs: New file.
* sim/frv/interrupts/Ipipe-fr500.cgs: New file.
* sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
Dave Brolley <brolley@redhat.com>
* frv/: New directory, simulator for the Fujitsu FR-V.
* testsuite/frv-elf/: New directory.
* testsuite/sim/frv/: New directory.
* configure.in: Add frv configury.
* configure: Regenerate.
2003-08-28 Andrew Cagney <cagney@redhat.com>
* dv-glue.c (hw_glue_finish): Change %d to %ld to match sizeof.
* sim-options.c (print_help): Cast the format with specifier to
"int".
Index: mn10300/ChangeLog
2003-08-28 Andrew Cagney <cagney@redhat.com>
* dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to
"long".
(read_status_reg): Cast "serial_reg" to "long".
* dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to
"long".
(do_counter6_event, write_mode_reg, write_tm6md): Ditto.
* sim/sh/gencode.c ( tab[] ): Addition of MAC.L handler and
correction for MAC.W handler
* sim/sh/interp.c ( macl ): New Function. Implementation of
MAC.L handler.
* MAINTAINERS: Andrew Cagney (mips) and Geoff Keating (ppc) drop
maintenance. List igen and sh maintainers. Mention that target
and global maintainers pick up the slack.
the physical address in virtual address.
(struct _sim_cpu): Add memory bank members.
* m68hc11_sim.c (cpu_initialize): Clear memory bank parameters.
* interp.c (sim_hw_configure): Create memory bank according to memory
bank parameters.
(sim_get_bank_parameters): New function to obtain memory bank config
from the symbol table.
(sim_prepare_for_program): Call it to obtain the memory bank parameters.
(sim_open): Call sim_prepare_for_program.
* dv-m68hc11.c (m68hc11cpu_io_write_buffer): Use memory bank parameters
to check if address is within bank window.
(m68hc11cpu_io_read_buffer): Likewise.
(attach_m68hc11_regs): Map the memory bank according to memory bank
parameters.
* cmpw.s: Add test for less-than-zero immediate.
* shll.s: Test for shll reg, reg.
* shlr.s: Test for shlr reg, reg.
* mova.s: Add dozens of new mova tests.
* compile.c (decode): Enhancements for mova.
Initialize cst, reg, and rdisp inside the loop, for each
new instruction. Defer correction of the disp2 values until
later, and then adjust them by the size of the first operand,
rather than the size of the instruction.
(sim_resume): For mova, adjust the size of the second operand
according to the type of the first operand (INDEXB vs. INDEXW).
In cases where there is only one operand, the other two must
both be composed on the fly.
* gencode.c (pshl): Change < to <= (shift by 16 is allowed).
Cast argument of >> to unsigned to prevent sign extension.
(psha): Change < to <= (shift by 32 is allowed).
* gencode.c: A few more fix-ups of refs and defs.
(frchg): Raise SIGILL if in double-precision mode.
(ldtlb): We don't simulate cache, so this is a no-op.
(movsxy_tab): Correct a few bit pattern errors.
* gencode.c (ppi_gensim): For a conditional ppi insn, if the
condition is false, we want to return (not break). A break
will take us to the end of the function where registers will
be updated, whereas the desired outcome is for nothing to change.
* gencode.c (op tab): Some fix-ups of refs and defs.
(ocbi, ocbp): Cache not simulated, but may cause memory fault.
(gensym_caselist): Add default case to switch statement.
(expand_ppi_code): Add default case to switch statement.
Written by matthew green <mrg@redhat.com>, with fixes from Aldy
Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
Nick Clifton <nickc@redhat.com>.
* ppc-instructions: Include altivec.igen and e500.igen.
(model_busy, model_data): Add vr_busy and vscr_busy.
(model_trace_release): Trace vr_busy and vscr_busy.
(model_new_cycle): Update vr_busy and vscr_busy.
(model_make_busy): Update vr_busy and vscr_busy.
* registers.c (register_description): Add Altivec and e500
registers.
* psim.c (psim_read_register, psim_read_register): Handle Altivec
and e500 registers.
* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
* configure.in (sim_filter): When *altivec* add "av". When *spe*
or *simd* add e500.
(sim_float): When *altivec* define WITH_ALTIVEC. When *spe* add
WITH_E500.
* configure: Re-generate.
* e500.igen, altivec.igen: New files.
* e500_expression.h, altivec_expression.h: New files.
* idecode_expression.h: Update copyright. Include
"e500_expression.h" and "altivec_expression.h".
* e500_registers.h, altivec_registers.h: New files.
* registers.h: Update copyright. Include "e500_registers.h" and
"altivec_registers.h".
(registers): Add Altivec and e500 specific registers.
* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
"idecode_altivec.h".
(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
(tmp-igen): Add dependencies on altivec.igen and e500.igen .
From matthew green <mrg@redhat.com>:
* sim-fpu.h: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New prototypes.
* sim-fpu.c: Update copyright.
(sim_fpu_fraction, sim_fpu_guard): New inline functions.
* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
with disassemble_info:read_memory_func.
* cgen-trace.c (sim_disasm_read_memory): Ditto.
* compile.c: Replace "Hitachi" with "Renesas".
(decode): Distinguish AV_H8S from AV_H8H.
(sim_resume): H8SX can use any register for TAS.
(decode): Add support for VECIND.
(sim_resume): Implement rte/l and rts/l.
(GETSR): New macro (actually old macro reincarnated).
(decode): Add handling for IMM2.
(sim_resume): Drop extra block around jmp, jsr, rts.
Add handling for trapa and rte.
For divxu.b, change 0xffff mask to 0xff.
(set_h8300h): Add bfd_mach_h8300sxn machine.
* compile.c (sim_info): Fix typo in output.
* h8300/compile.c (set_h8300h): Replace 'flag' arguments
with a bfd_machine argument, and decode it inline.
Check for bfd_mach_h8300hn and bfd_mach_h8300sn.
2003-03-20 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* compile.c (cmdline_location): Added function to
return the location of 8-bit (256 locations) where the
Command Line arguments would be stored.
(decode): Added a TRAP to 0xcc for Commandline
processing using pseudo opcode O_SYS_CMDLINE.
(sim_resume): Added handling of O_SYS_CMDLINE Trap.
(sim_create_inferior): Setting a pointer to
Commandline Args array.
* inst.h: Added a new variable ptr_command_line for
storing pointer to Commandline array.
2003-03-14 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* compile.c (decode): Added code for some more magic traps.
* compile.c (sim_resume): Added support for File I/O system
calls through callback to host_system.
System calls provided support for :
open, read, write, lseek, close, stat, fstat
Only basic support for stat and fstat.
