Commit Graph

1439 Commits

Author SHA1 Message Date
Frank Ch. Eigler
2ebb2a6855 * R5900 COP2 is now ready for testing. Let loose the dogs!
Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.
1998-04-07 00:01:31 +00:00
Jillian Ye
0eebcbd7ab c_gen.pl: Added sub-routine perform_test64 to read and verify 64bit register. 1998-04-06 20:49:47 +00:00
Frank Ch. Eigler
ebcfd86a2e * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF
masking facility for PATH3 transfers.

[ChangeLog.sky]

Sun Apr  5 12:11:45 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
 	instruction.

	* sky-pke.c (pke_check_stall): Added more assertions.
	(pke_code_mskpath3): Use new GPUIF M3P control register.

	* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
 	pseudo-register addresses.

	* sky-vu.h (vu_device, VectorUnitState): Merged structs.
	(VectorUnitState.mflag): New field.
	(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.

	* sky-vu.c (vu0_busy): New function.
	(vu0_q_busy): New function.
	(vu0_macro_issue): New function.
	(vu0_micro_interlock_released): New function.
	(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
	(vu0_macro_hazard_check): Deleted stubs.
	(vu_attach): Adapted code to merged device & state struct.
	(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.

[ChangeLog]
start-sanitize-sky
Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (*): Adapt code to merged VU device & state structs.
	(decode_coproc): Execute COP2 each macroinstruction without
 	pipelining, by stepping VU to completion state.  Adapted to
	read_vu_*_reg style of register access.

	* mips.igen ([SL]QC2): Removed these COP2 instructions.

	* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.

	* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.

end-sanitize-sky
1998-04-05 16:40:03 +00:00
Frank Ch. Eigler
d61cc1d4b1 * Test case patch for more functional GPUIF implementation
Sun Apr  5 12:34:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* t-pke3.trc: Modified to confirm parts of GPUIF PATH3-masking
 	functionality.
1998-04-05 16:37:04 +00:00
Andrew Cagney
64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney
278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Jillian Ye
f6f81e4a92 c_gen.pl: Added sub-routine process_data_reg64 to handle 64bit register
writes.
1998-04-03 19:59:11 +00:00
Andrew Cagney
72a08ce565 Don't bother generating trace prefix string when not tracing. 1998-04-03 17:13:40 +00:00
Ron Unrau
c567d0b941 * sim-main.h: add vif registers
* interp.c: incorporate vif register load/store
        * sky-pke.[ch]: add register load/store routines
        * sku-vu.c: P register is float
1998-04-02 21:02:38 +00:00
Andrew Cagney
69d5a56645 Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
1998-04-02 19:35:39 +00:00
Andrew Cagney
725fc5d927 For mips get_mem_size call. Force the return of a 32 bit value
regardless of the target's word bitsize.
1998-04-02 03:27:24 +00:00
Ron Unrau
2151467d63 sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
1998-04-01 17:31:24 +00:00
Frank Ch. Eigler
6b0c51c929 * You bop one on the head ... another one appears.
Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
1998-04-01 13:19:07 +00:00
Andrew Cagney
e1fe7a7966 * configure.in (SIM_AC_OPTION_WARNINGS): Add.
configure: Re-generate.
1998-04-01 02:56:05 +00:00
James Lemke
1ff39ecb10 * sky-dma.c: Clarify text in warning msg.
* interp.c: Add global option "float-type".
	* sky-vu.h: Add SIM_DESC sd; to VectorUnitState for accessing
	global options.
1998-03-31 21:46:31 +00:00
Frank Ch. Eigler
6ed00b0607 * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide
128-bit MIPS part.

[ChangeLog]

Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Continuing COP2 work.
  	(cop_[ls]q): Hide 128-bit COP2 more.

	* sim-main.h (COP_[LS]Q): Hide 128-bit COP2 more.

[ChangeLog.sky]

Mon Mar 30 18:44:15 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c: Code too wide - ran indent on SCEI code.

	* sky-vu.h (vu0_busy*, vu0_macro*): New entry points for COP2
 	interface.

	* sky-vu.c (vu0_busy*, vu0_macro*): Stub functions for above.
1998-03-30 23:56:52 +00:00
Gavin Romig-Koch
34f51d8723 * configure.in (mipstx39*-*-*): Use gencode simulator rather
than igen one.
	* configure : Rebuild.
1998-03-30 19:54:15 +00:00
Andrew Cagney
a1e4dc0db4 * run.c (main): Handle all alternatives of enum sim_stop.
(main): Delete unused `asection *s'.
1998-03-30 13:30:10 +00:00
Frank Ch. Eigler
7dd4a46650 * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton. 1998-03-29 22:53:31 +00:00
Frank Ch. Eigler
1d33e94615 * Updated test cases to confirm PKE behavior according to new SCEI specs. 1998-03-28 00:36:59 +00:00
Frank Ch. Eigler
b59e0b6815 * Modified sky PKE behavior according to new SCEI specs. 1998-03-28 00:35:43 +00:00
Frank Ch. Eigler
15232df4a3 * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code
into single PKE-style vu.[ch].


[ChangeLog]

Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>

start-sanitize-sky
	* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.

	* interp.c (sim_{load,store}_register): Use new vu[01]_device
 	static to access VU registers.
	(decode_coproc): Added skeleton of sky COP2 (VU) instruction
 	decoding.  Work in progress.

	* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 	overlapping/redundant bit pattern.
	(LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
	progress.

	* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 	status register.

end-sanitize-sky

	* interp.c (cop_lq, cop_sq): New functions for future 128-bit
 	access to coprocessor registers.

	* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.

[ChangeLog.sky]

	* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.

	* sky-hardware.c (register_devices): Ditto

	* sky-pke.c (pke_fifo_*): Made these functions private again, now
 	that the GPUIF code does not use them.

	* sky-pke.h (pke_fifo_*): Removed newly private declarations.

	* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
 	sky-vu1.c.  Management of two VU devices parallels two PKEs.
	Work in progress.

	* sky-vu.h (*): Other half of merge.
	(vu_device): New struct, parallel to pke_device.
1998-03-27 22:00:56 +00:00
Patrick Macdonald
76969284c3 sky-gs.c: initial drop of GS control registers (outstanding questions)
sky-gs.h: initial drop of GS control registers
Makefile.in: added sky-gs.o to sanitized list
sky-gpuif.c (gif_io_write_buffer): correct memset length error, renamed
trace file for gif
1998-03-27 18:36:33 +00:00
Ron Unrau
d44859a2d8 * sky-vu.c: new file to read/write VU registers
* Makefile.in .Sanitize: add sky-vu.c
	* sky-vu.h: define registers as enum, export read/write routines
        * sky-vu[01].[ch]: use register read/write routines in sky-vu.c
        * interp.c: use register read/write routines in sky-vu.c
1998-03-27 14:44:39 +00:00
Andrew Cagney
d8f5304972 Do top level sim-hw module for device tree.
Add to aclocal.m4, update all configure files.
1998-03-27 11:42:16 +00:00
Andrew Cagney
bd85beb90c Clean up m32rx sanitization 1998-03-27 11:33:16 +00:00
Andrew Cagney
82ea14fd9d Define CPU_INDEX. Initialize.
For mips_options, iterate over MAX_NR_PROCESSORS when setting options.
1998-03-27 04:25:45 +00:00
Andrew Cagney
6d133cc9df Add sanitize-am30 markers. Keep details of AM30 implementation of
mn10300 out of the public eye.
Do something with top-level cgen directory.
1998-03-27 03:10:53 +00:00
Andrew Cagney
1b756ba6d5 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of succeeding
interrupts, clear pending_handler when the handler isn't re-scheduled.
1998-03-26 14:00:18 +00:00
Stu Grossman
abf6ba256a * Makefile.in (tmp-igen): Prefix all usage of move-if-change
script with $(SHELL) to make NT native builds happy.
	* configure:  Regenerate because of change to ../common/aclocal.m4.
1998-03-26 10:18:35 +00:00
Andrew Cagney
51ccd82f7f * configure.in: Make --enable-sim-common the default.
* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.
1998-03-26 01:13:38 +00:00
Andrew Cagney
98f1f62cb4 * dv-pal.c (enum hw_pal_address_mask): From Stu Grossman, was 0x2f
needs to be 0x3f.
1998-03-25 23:48:14 +00:00
Joyce Janczyn
d1607ed316 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. 1998-03-25 22:43:19 +00:00
Andrew Cagney
04cdafa7a4 * hw-tree.c (hw_tree_find_property): Return NULL when device is not found.
(hw_tree_find_*_property): Clean up error message when property is not found.
* dv-pal.c (hw_pal_io_read_buffer): Check the smp property is present before
looking for it.
1998-03-25 22:37:33 +00:00
Ian Carmichael
8d0bd9889c * Added HAVE_FPU_CONTROL_H and HAVE___SETFPUCW to fix non-linux builds. 1998-03-25 21:54:06 +00:00
Joyce Janczyn
52ef605e6d * simops.c (OP_F0FD): Initialise variable 'sp' for rti instruction. 1998-03-25 17:10:01 +00:00
Andrew Cagney
c357e16ac8 * dv-mn103int.c (decode_group): A group register every 4 bytes not 8.
(write_icr): Rewrite equation updating request field.
(read_iagr): Fix check that interrupt is still pending.
1998-03-25 14:52:44 +00:00
Andrew Cagney
8077fed51e * interp.c (sim_open): Tidy up device creation.
* dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero value.
(mn103int_io_read_buffer): Convert absolute address to register block offsets.
(read_icr, write_icr): Convert block offset into group offset.
1998-03-25 05:37:42 +00:00
Andrew Cagney
6100784a60 * interp.c (sim_open): Create second 1mb memory region at 0x40000000.
(sim_open): Create a device tree.
(sim-hw.h): Include.
(do_interrupt): Delete, needs to use dv-mn103cpu.c
* dv-mn103int.c, dv-mn103cpu.c: New files.
1998-03-25 04:15:38 +00:00
Andrew Cagney
8388c9a564 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): Define.
(SP): Define.
1998-03-25 04:07:31 +00:00
Andrew Cagney
05d7918e53 * dv-pal.c (hw_pal_countdown, hw_pal_countdown_value,
hw_pal_timer, hw_pal_timer_value): Define.
(hw_pal_io_read_buffer, hw_pal_io_write_buffer): Add timer support
(do_counter_event, do_counter_read, do_counter_value,
do_counter_write): new functions.

* hw-tree.c (hw_printf): Send tree dump to stderr, same as other
trace output.
* hw-base.c (hw_create): Stop searching for a device when one is
found.
1998-03-25 03:44:37 +00:00
Andrew Cagney
d89fa2d80a Re-do --enable-sim-hardware so that each simulator can specify the devices
it wants built.
Generate hw-config.h.
1998-03-25 01:41:33 +00:00
Andrew Cagney
e855e57637 Pacify GCC. 1998-03-25 00:08:52 +00:00
Andrew Cagney
612a649eee * interp.c (Max, Min): Comment out functions. Not yet used.
* vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
1998-03-24 23:16:57 +00:00
Ian Carmichael
9fa5e700c0 * Several fixes and performance enhancements from my 2 weeks working in Japan. 1998-03-24 22:23:33 +00:00
Andrew Cagney
d797f46f3c * gen-engine.c (print_run_body): Re-extract the CIA after
processing any events.  Events may not restart the simulator.
1998-03-24 21:30:00 +00:00
Joyce Janczyn
8dcf23d28b Add new files: mn10300.igen, mn10300.dc, sim-main.h, op_utils.c 1998-03-24 21:23:29 +00:00
Joyce Janczyn
55045e7b32 Port mn10300 simulator to build with the common simulator framework
under the configure option --enable-sim-common.
1998-03-24 20:30:03 +00:00
Joyce Janczyn
6274d39b87 Add code to support building mn10300 simulator with the common simulator
framework.
1998-03-24 20:26:06 +00:00
Joyce Janczyn
5abdc30591 Add support for building simulator based on common simulator framework.
Separate out files which get compiled depending on --enable-sim-common
configuration.
1998-03-24 20:19:55 +00:00