MatCat.OpenSource/8sa1-binutils-gdb
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2942 Commits

Author SHA1 Message Date
Igor Tsimbalist
c48935d75f Enable Intel CLDEMOTE instruction. 
gas/
	* config/tc-i386.c (cpu_arch): Add .cldemote.
	* doc/c-i386.texi: Document cldemote/.cldemote.
	* testsuite/gas/i386/cldemote-intel.d: New.
	* testsuite/gas/i386/cldemote.d: Likewise.
	* testsuite/gas/i386/cldemote.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run new tests.
	* testsuite/gas/i386/x86-64-cldemote-intel.d: New.
	* testsuite/gas/i386/x86-64-cldemote.d: Likewise.
	* testsuite/gas/i386/x86-64-cldemote.s: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-nops.d: Remove 0x0f1c
	NOP encoding that maps to cldemote.
	* testsuite/gas/i386/nops.d: Likewise.
	* testsuite/gas/i386/nops.s: Likewise.
	* testsuite/gas/i386/x86-64-nops.d: Likewise.
	* testsuite/gas/i386/x86-64-nops.s: Likewise.

opcode/
	* i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
	PREFIX_0F1C.
	* i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
	(cpu_flags): Add CpuCLDEMOTE.
	* i386-init.h: Regenerate.
	* i386-opc.h (enum): Add CpuCLDEMOTE,
	(i386_cpu_flags): Add cpucldemote.
	* i386-opc.tbl: Add cldemote.
	* i386-tbl.h: Regenerate.
 2018-04-17 11:56:34 +02:00
Alan Modra
211dc24b87 Remove sh5 and sh64 support 
include/
	* dis-asm.h: Remove sh5 and sh64 support.
bfd/
	* Makefile.am: Remove sh5 and sh64 support.
	* archures.c: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* cpu-sh.c: Likewise.
	* elf32-sh-relocs.h: Likewise.
	* elf32-sh.c: Likewise.
	* targets.c: Likewise.
	* elf32-sh64-com.c: Delete.
	* elf32-sh64.c: Delete.
	* elf32-sh64.h: Delete.
	* elf64-sh64.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove sh5 and sh64 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* sh-dis.c: Likewise.
	* sh64-dis.c: Delete.
	* sh64-opc.c: Delete.
	* sh64-opc.h: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
bintuils/
	* testsuite/binutils-all/objcopy.exp: Remove sh5 and sh64 support.
gas/
	* Makefile.am: Remove sh5 and sh64 support.
	* config/tc-sh.c: Likewise.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/cfi/cfi.exp: Likewise.
	* testsuite/gas/sh/basic.exp: Likewise.
	* config/tc-sh64.c: Delete.
	* config/tc-sh64.h: Delete.
	* doc/c-sh64.texi: Delete.
	* testsuite/gas/sh/sh64/abi-32.d: Delete.
	* testsuite/gas/sh/sh64/abi-32.s: Delete.
	* testsuite/gas/sh/sh64/abi-64.d: Delete.
	* testsuite/gas/sh/sh64/abi-64.s: Delete.
	* testsuite/gas/sh/sh64/basic-1.d: Delete.
	* testsuite/gas/sh/sh64/basic-1.s: Delete.
	* testsuite/gas/sh/sh64/case-1.d: Delete.
	* testsuite/gas/sh/sh64/case-1.s: Delete.
	* testsuite/gas/sh/sh64/case-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/crange1-1.d: Delete.
	* testsuite/gas/sh/sh64/crange1-2.d: Delete.
	* testsuite/gas/sh/sh64/crange1.s: Delete.
	* testsuite/gas/sh/sh64/crange2-1.d: Delete.
	* testsuite/gas/sh/sh64/crange2-2.d: Delete.
	* testsuite/gas/sh/sh64/crange2-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/crange2.s: Delete.
	* testsuite/gas/sh/sh64/crange3-1.d: Delete.
	* testsuite/gas/sh/sh64/crange3.s: Delete.
	* testsuite/gas/sh/sh64/crange4-1.d: Delete.
	* testsuite/gas/sh/sh64/crange4.s: Delete.
	* testsuite/gas/sh/sh64/crange5-1.d: Delete.
	* testsuite/gas/sh/sh64/crange5.s: Delete.
	* testsuite/gas/sh/sh64/creg-1.d: Delete.
	* testsuite/gas/sh/sh64/creg-1.s: Delete.
	* testsuite/gas/sh/sh64/creg-2.d: Delete.
	* testsuite/gas/sh/sh64/creg-2.s: Delete.
	* testsuite/gas/sh/sh64/datal-1.s: Delete.
	* testsuite/gas/sh/sh64/datal-2.d: Delete.
	* testsuite/gas/sh/sh64/datal-2.s: Delete.
	* testsuite/gas/sh/sh64/datal-3.s: Delete.
	* testsuite/gas/sh/sh64/datal32-1.d: Delete.
	* testsuite/gas/sh/sh64/datal32-3.d: Delete.
	* testsuite/gas/sh/sh64/datal64-1.d: Delete.
	* testsuite/gas/sh/sh64/datal64-3.d: Delete.
	* testsuite/gas/sh/sh64/eh-1.d: Delete.
	* testsuite/gas/sh/sh64/eh-1.s: Delete.
	* testsuite/gas/sh/sh64/endian-1.d: Delete.
	* testsuite/gas/sh/sh64/endian-1.s: Delete.
	* testsuite/gas/sh/sh64/endian-2.d: Delete.
	* testsuite/gas/sh/sh64/endian-2.s: Delete.
	* testsuite/gas/sh/sh64/err-1.s: Delete.
	* testsuite/gas/sh/sh64/err-2.s: Delete.
	* testsuite/gas/sh/sh64/err-3.s: Delete.
	* testsuite/gas/sh/sh64/err-4.s: Delete.
	* testsuite/gas/sh/sh64/err-abi-32.s: Delete.
	* testsuite/gas/sh/sh64/err-abi-64.s: Delete.
	* testsuite/gas/sh/sh64/err-dsp.s: Delete.
	* testsuite/gas/sh/sh64/err-movi-noexp-1.s: Delete.
	* testsuite/gas/sh/sh64/err-noexp-cmd1.s: Delete.
	* testsuite/gas/sh/sh64/err-pt-1.s: Delete.
	* testsuite/gas/sh/sh64/err-pt32-cmd1.s: Delete.
	* testsuite/gas/sh/sh64/err-pt32-cmd2.s: Delete.
	* testsuite/gas/sh/sh64/err-pt32-cmd3.s: Delete.
	* testsuite/gas/sh/sh64/err-ptb-1.s: Delete.
	* testsuite/gas/sh/sh64/err-ptb-2.s: Delete.
	* testsuite/gas/sh/sh64/err.exp: Delete.
	* testsuite/gas/sh/sh64/immexpr1.s: Delete.
	* testsuite/gas/sh/sh64/immexpr2.s: Delete.
	* testsuite/gas/sh/sh64/immexpr32-1.d: Delete.
	* testsuite/gas/sh/sh64/immexpr32-2.d: Delete.
	* testsuite/gas/sh/sh64/immexpr64-1.d: Delete.
	* testsuite/gas/sh/sh64/immexpr64-2.d: Delete.
	* testsuite/gas/sh/sh64/lineno.d: Delete.
	* testsuite/gas/sh/sh64/lineno.s: Delete.
	* testsuite/gas/sh/sh64/localcom-1.d: Delete.
	* testsuite/gas/sh/sh64/localcom-1.s: Delete.
	* testsuite/gas/sh/sh64/mix-1.d: Delete.
	* testsuite/gas/sh/sh64/mix-1.s: Delete.
	* testsuite/gas/sh/sh64/mix-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/movi-1.s: Delete.
	* testsuite/gas/sh/sh64/movi-2.s: Delete.
	* testsuite/gas/sh/sh64/movi-3.d: Delete.
	* testsuite/gas/sh/sh64/movi-3.s: Delete.
	* testsuite/gas/sh/sh64/movi32-1.d: Delete.
	* testsuite/gas/sh/sh64/movi32-2.d: Delete.
	* testsuite/gas/sh/sh64/movi32-noexp-2.d: Delete.
	* testsuite/gas/sh/sh64/movi64-1.d: Delete.
	* testsuite/gas/sh/sh64/movi64-2.d: Delete.
	* testsuite/gas/sh/sh64/movi64-2.s: Delete.
	* testsuite/gas/sh/sh64/movi64-3.d: Delete.
	* testsuite/gas/sh/sh64/movi64-noexp-2.d: Delete.
	* testsuite/gas/sh/sh64/pt-1.d: Delete.
	* testsuite/gas/sh/sh64/pt-1.s: Delete.
	* testsuite/gas/sh/sh64/pt-2.s: Delete.
	* testsuite/gas/sh/sh64/pt-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/pt32-1.d: Delete.
	* testsuite/gas/sh/sh64/pt32-noexp-2.d: Delete.
	* testsuite/gas/sh/sh64/pt64-1.d: Delete.
	* testsuite/gas/sh/sh64/pt64-32-1.d: Delete.
	* testsuite/gas/sh/sh64/pt64-32-2.d: Delete.
	* testsuite/gas/sh/sh64/pt64-noexp-2.d: Delete.
	* testsuite/gas/sh/sh64/ptc-1.s: Delete.
	* testsuite/gas/sh/sh64/ptc32-1.d: Delete.
	* testsuite/gas/sh/sh64/ptc32-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/ptc64-1.d: Delete.
	* testsuite/gas/sh/sh64/ptc64-32-1.d: Delete.
	* testsuite/gas/sh/sh64/ptc64-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/ptext-1.s: Delete.
	* testsuite/gas/sh/sh64/ptext32-1.d: Delete.
	* testsuite/gas/sh/sh64/ptext32-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/ptext64-1.d: Delete.
	* testsuite/gas/sh/sh64/ptext64-32-1.d: Delete.
	* testsuite/gas/sh/sh64/ptext64-noexp-1.d: Delete.
	* testsuite/gas/sh/sh64/rel-1.s: Delete.
	* testsuite/gas/sh/sh64/rel-2.s: Delete.
	* testsuite/gas/sh/sh64/rel-3.s: Delete.
	* testsuite/gas/sh/sh64/rel-4.s: Delete.
	* testsuite/gas/sh/sh64/rel-5.s: Delete.
	* testsuite/gas/sh/sh64/rel32-1.d: Delete.
	* testsuite/gas/sh/sh64/rel32-2.d: Delete.
	* testsuite/gas/sh/sh64/rel32-3.d: Delete.
	* testsuite/gas/sh/sh64/rel32-4.d: Delete.
	* testsuite/gas/sh/sh64/rel32-5.d: Delete.
	* testsuite/gas/sh/sh64/rel64-1.d: Delete.
	* testsuite/gas/sh/sh64/rel64-2.d: Delete.
	* testsuite/gas/sh/sh64/rel64-3.d: Delete.
	* testsuite/gas/sh/sh64/rel64-4.d: Delete.
	* testsuite/gas/sh/sh64/rel64-5.d: Delete.
	* testsuite/gas/sh/sh64/relax-1.d: Delete.
	* testsuite/gas/sh/sh64/relax-1.s: Delete.
	* testsuite/gas/sh/sh64/relax-2.d: Delete.
	* testsuite/gas/sh/sh64/relax-2.s: Delete.
	* testsuite/gas/sh/sh64/relax-3.d: Delete.
	* testsuite/gas/sh/sh64/relax-3.s: Delete.
	* testsuite/gas/sh/sh64/sh64.exp: Delete.
	* testsuite/gas/sh/sh64/shift-1.s: Delete.
	* testsuite/gas/sh/sh64/shift-2.s: Delete.
	* testsuite/gas/sh/sh64/shift-3.s: Delete.
	* testsuite/gas/sh/sh64/shift32-1.d: Delete.
	* testsuite/gas/sh/sh64/shift32-3.d: Delete.
	* testsuite/gas/sh/sh64/shift32-noexp-3.d: Delete.
	* testsuite/gas/sh/sh64/shift64-1.d: Delete.
	* testsuite/gas/sh/sh64/shift64-2.d: Delete.
	* testsuite/gas/sh/sh64/shift64-3.d: Delete.
	* testsuite/gas/sh/sh64/shift64-noexp-3.d: Delete.
	* testsuite/gas/sh/sh64/syntax-1.d: Delete.
	* testsuite/gas/sh/sh64/syntax-1.s: Delete.
	* testsuite/gas/sh/sh64/syntax-2.d: Delete.
	* testsuite/gas/sh/sh64/syntax-2.s: Delete.
	* testsuite/gas/sh/sh64/ua-1.s: Delete.
	* testsuite/gas/sh/sh64/ua32-1.d: Delete.
	* testsuite/gas/sh/sh64/ua64-1.d: Delete.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* Makefile.am: Remove sh5 and sh64 support.
	* configure.tgt: Likewise.
	* ldlang.c: Likewise.
	* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
	* testsuite/ld-gc/gc.exp: Likewise.
	* testsuite/ld-gc/pr13683.d: Likewise.
	* testsuite/ld-scripts/crossref.exp: Likewise.
	* testsuite/ld-selective/selective.exp: Likewise.
	* testsuite/ld-sh/ld-r-1.d: Likewise.
	* testsuite/ld-sh/rd-sh.exp: Likewise.
	* testsuite/ld-sh/sh.exp: Likewise.
	* testsuite/ld-srec/srec.exp: Likewise.
	* testsuite/ld-undefined/undefined.exp: Likewise.
	* emulparams/shelf32.sh: Delete.
	* emulparams/shelf32_linux.sh: Delete.
	* emulparams/shelf32_nbsd.sh: Delete.
	* emulparams/shelf64.sh: Delete.
	* emulparams/shelf64_nbsd.sh: Delete.
	* emulparams/shlelf32.sh: Delete.
	* emulparams/shlelf32_linux.sh: Delete.
	* emulparams/shlelf32_nbsd.sh: Delete.
	* emulparams/shlelf64.sh: Delete.
	* emulparams/shlelf64_nbsd.sh: Delete.
	* emultempl/sh64elf.em: Delete.
	* testsuite/ld-sh/sh64/abi32.sd: Delete.
	* testsuite/ld-sh/sh64/abi32.xd: Delete.
	* testsuite/ld-sh/sh64/abi64.sd: Delete.
	* testsuite/ld-sh/sh64/abi64.xd: Delete.
	* testsuite/ld-sh/sh64/abixx-noexp.sd: Delete.
	* testsuite/ld-sh/sh64/cmpct1.sd: Delete.
	* testsuite/ld-sh/sh64/cmpct1.xd: Delete.
	* testsuite/ld-sh/sh64/crange-1.s: Delete.
	* testsuite/ld-sh/sh64/crange-2a.s: Delete.
	* testsuite/ld-sh/sh64/crange-2b.s: Delete.
	* testsuite/ld-sh/sh64/crange-2c.s: Delete.
	* testsuite/ld-sh/sh64/crange-2d.s: Delete.
	* testsuite/ld-sh/sh64/crange-2e.s: Delete.
	* testsuite/ld-sh/sh64/crange-2f.s: Delete.
	* testsuite/ld-sh/sh64/crange-2g.s: Delete.
	* testsuite/ld-sh/sh64/crange-2h.s: Delete.
	* testsuite/ld-sh/sh64/crange-2i.s: Delete.
	* testsuite/ld-sh/sh64/crange1.rd: Delete.
	* testsuite/ld-sh/sh64/crange2.rd: Delete.
	* testsuite/ld-sh/sh64/crange3-cmpct.rd: Delete.
	* testsuite/ld-sh/sh64/crange3-media.rd: Delete.
	* testsuite/ld-sh/sh64/crange3.dd: Delete.
	* testsuite/ld-sh/sh64/crange3.rd: Delete.
	* testsuite/ld-sh/sh64/crangerel1.rd: Delete.
	* testsuite/ld-sh/sh64/crangerel2.rd: Delete.
	* testsuite/ld-sh/sh64/dlsection-1.s: Delete.
	* testsuite/ld-sh/sh64/dlsection.sd: Delete.
	* testsuite/ld-sh/sh64/endian.dbd: Delete.
	* testsuite/ld-sh/sh64/endian.dld: Delete.
	* testsuite/ld-sh/sh64/endian.ld: Delete.
	* testsuite/ld-sh/sh64/endian.s: Delete.
	* testsuite/ld-sh/sh64/endian.sbd: Delete.
	* testsuite/ld-sh/sh64/endian.sld: Delete.
	* testsuite/ld-sh/sh64/gotplt.d: Delete.
	* testsuite/ld-sh/sh64/gotplt.map: Delete.
	* testsuite/ld-sh/sh64/gotplt.s: Delete.
	* testsuite/ld-sh/sh64/init-cmpct.d: Delete.
	* testsuite/ld-sh/sh64/init-media.d: Delete.
	* testsuite/ld-sh/sh64/init.s: Delete.
	* testsuite/ld-sh/sh64/init64.d: Delete.
	* testsuite/ld-sh/sh64/mix1-noexp.sd: Delete.
	* testsuite/ld-sh/sh64/mix1.sd: Delete.
	* testsuite/ld-sh/sh64/mix1.xd: Delete.
	* testsuite/ld-sh/sh64/mix2-noexp.sd: Delete.
	* testsuite/ld-sh/sh64/mix2.sd: Delete.
	* testsuite/ld-sh/sh64/mix2.xd: Delete.
	* testsuite/ld-sh/sh64/rd-sh64.exp: Delete.
	* testsuite/ld-sh/sh64/rel-1.s: Delete.
	* testsuite/ld-sh/sh64/rel-2.s: Delete.
	* testsuite/ld-sh/sh64/rel32.xd: Delete.
	* testsuite/ld-sh/sh64/rel64.xd: Delete.
	* testsuite/ld-sh/sh64/relax.exp: Delete.
	* testsuite/ld-sh/sh64/relax1.s: Delete.
	* testsuite/ld-sh/sh64/relax2.s: Delete.
	* testsuite/ld-sh/sh64/relax3.s: Delete.
	* testsuite/ld-sh/sh64/relax4.s: Delete.
	* testsuite/ld-sh/sh64/reldl-1.s: Delete.
	* testsuite/ld-sh/sh64/reldl-2.s: Delete.
	* testsuite/ld-sh/sh64/reldl32.rd: Delete.
	* testsuite/ld-sh/sh64/reldl64.rd: Delete.
	* testsuite/ld-sh/sh64/relfail.exp: Delete.
	* testsuite/ld-sh/sh64/relfail.s: Delete.
	* testsuite/ld-sh/sh64/sh64-1.s: Delete.
	* testsuite/ld-sh/sh64/sh64-2.s: Delete.
	* testsuite/ld-sh/sh64/sh64.exp: Delete.
	* testsuite/ld-sh/sh64/shcmp-1.s: Delete.
	* testsuite/ld-sh/sh64/shdl-1.s: Delete.
	* testsuite/ld-sh/sh64/shdl-2.s: Delete.
	* testsuite/ld-sh/sh64/shdl32.xd: Delete.
	* testsuite/ld-sh/sh64/shdl64.sd: Delete.
	* testsuite/ld-sh/sh64/shdl64.xd: Delete.
	* testsuite/ld-sh/sh64/shmix-1.s: Delete.
	* testsuite/ld-sh/sh64/shmix-2.s: Delete.
	* testsuite/ld-sh/sh64/shmix-3.s: Delete.
	* testsuite/ld-sh/sh64/stobin-0-dso.d: Delete.
	* testsuite/ld-sh/sh64/stobin-1.d: Delete.
	* testsuite/ld-sh/sh64/stobin.s: Delete.
	* testsuite/ld-sh/sh64/stolib.s: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:29:39 +09:30
Alan Modra
a9a4b30244 Remove w65 support 
include/
	* coff/internal.h: Remove w65 support.
	* coff/w65.h: Delete.
bfd/
	* Makefile.am: Remove w65 support.
	* archures.c: Likewise.
	* coffcode.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* coff-w65.c: Delete.
	* cpu-w65.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove w65 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* w65-dis.c: Delete.
	* w65-opc.h: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* testsuite/binutils-all/objcopy.exp: Remove w65 support.
ld/
	* Makefile.am: Remove w65 support.
	* configure.tgt: Likewise.
	* emulparams/w65.sh: Delete.
	* scripttempl/w65.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:26:05 +09:30
Alan Modra
04cb01fd5a Remove we32k support 
include/
	* coff/we32k.h: Delete.
bfd/
	* Makefile.am: Remove we32k support.
	* archures.c: Likewise.
	* coffcode.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* coff-we32k.c: Delete.
	* cpu-we32k.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* configure.ac: Remove we32k support.
	* configure: Regenerate.
bintuils/
	* testsuite/binutils-all/objdump.exp: Remove we32k support.
 2018-04-16 15:24:43 +09:30
Alan Modra
c2bf1eecf9 Remove m88k support 
include/
	* coff/internal.h: Remove m88k support.
	* coff/m88k.h: Delete.
	* opcode/m88k.h: Delete.
bfd/
	* Makefile.am: Remove m88k support.
	* aoutx.h: Likewise.
	* archures.c: Likewise.
	* coffcode.h: Likewise.
	* coffswap.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* cpu-ns32k.c: Likewise.
	* elf32-nds32.c: Likewise.
	* mach-o.c: Likewise.
	* netbsd-core.c: Likewise.
	* reloc.c: Likewise.
	* targets.c: Likewise.
	* coff-m88k.c: Delete.
	* cpu-m88k.c: Delete.
	* elf32-m88k.c: Delete.
	* hosts/m88kmach3.h: Delete.
	* m88kmach3.c: Delete.
	* m88kopenbsd.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove m88k support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* m88k-dis.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* MAINTAINERS (Mark Kettenis): Move to past maintainers.
	* testsuite/binutils-all/objdump.exp: Remove m88k support.
gas/
	* configure.ac: Remove m88k support.
	* config.in: Regenerate.
	* configure: Regenerate.
ld/
	* Makefile.am: Remove m88k support.
	* configure.host: Likewise.
	* configure.tgt: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* emulparams/m88kbcs.sh: Delete.
	* scripttempl/m88kbcs.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:23:38 +09:30
Alan Modra
6793974daa Remove i370 support 
include/
	* elf/i370.h: Delete.
	* opcode/i370.h: Delete.
bfd/
	* Makefile.am: Remove i370 support.
	* archures.c: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* cpu-i370.c: Delete.
	* elf32-i370.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove i370 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* i370-dis.c: Delete.
	* i370-opc.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* readelf.c: Remove i370 support.
	* testsuite/binutils-all/objdump.exp: Likewise.
gas/
	* Makefile.am: Remove i370 support.
	* app.c: Likewise.
	* config/obj-elf.c: Likewise.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/all/gas.exp: Likewise.
	* testsuite/gas/elf/warn-2.s: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* config/tc-i370.c: Delete.
	* config/tc-i370.h: Delete.
	* doc/c-i370.texi: Delete.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* Makefile.am: Remove i370 support.
	* configure.tgt: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* emulparams/elf32i370.sh: Delete.
	* scripttempl/elfi370.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:21:56 +09:30
Alan Modra
e82aa7944d Remove h8500 support 
include/
	* coff/h8500.h: Delete.
	* coff/internal.h: Remove h8500 support.
bfd/
	* Makefile.am: Remove h8500 support.
	* archures.c: Likewise.
	* coffcode.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* coff-h8500.c: Delete.
	* cpu-h8500.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove h8500 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* h8500-dis.c: Delete.
	* h8500-opc.h: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* testsuite/binutils-all/objcopy.exp: Remove h8500 support.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/obj-coff.h: Remove h8500 support.
ld/
	* Makefile.am: Remove h8500 support.
	* configure.tgt: Likewise.
	* emulparams/h8500.sh: Delete.
	* emulparams/h8500b.sh: Delete.
	* emulparams/h8500c.sh: Delete.
	* emulparams/h8500m.sh: Delete.
	* emulparams/h8500s.sh: Delete.
	* scripttempl/h8500.sc: Delete.
	* scripttempl/h8500b.sc: Delete.
	* scripttempl/h8500c.sc: Delete.
	* scripttempl/h8500m.sc: Delete.
	* scripttempl/h8500s.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:19:52 +09:30
Alan Modra
fceadf0951 Remove tahoe support 
include/
	* opcode/tahoe.h: Delete.
bfd/
	* archures.c: Remove tahoe support.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* hosts/tahoe.h: Delete.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
opcodes/
	* configure.ac: Remove tahoe support.
	* configure: Regenerate.
binutils/
	* testsuite/binutils-all/objdump.exp: Remove tahoe support.
gprof/
	* Makefile.am: Remove tahoe support.
	* corefile.c: Likewise.
	* tahoe.c: Delete.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2018-04-16 15:08:40 +09:30
H.J. Lu
ae1d384372 x86: Allow 32-bit registers for tpause and umwait 
Since only the first 32 bits of input operand are used for tpause and
umwait, the REX.W bit is skipped.  Both 32-bit registers and 64-bit
registers are allowed.

gas/

	* testsuite/gas/i386/x86-64-waitpkg.s: Add 32-bit registers
	tests for tpause and umwait.
	* testsuite/gas/i386/x86-64-waitpkg-intel.d: Updated.
	* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.

opcodes/

	* i386-dis.c (prefix_table): Replace Em with Edq on tpause and
	umwait.
	* i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
	64-bit mode.
	* i386-tbl.h: Regenerated.
 2018-04-15 08:38:36 -07:00
Igor Tsimbalist
de89d0a34d Enable Intel WAITPKG instructions. 
Intel has disclosed a set of new instructions for Tremont processor.
The spec is
https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
This patch enables Intel WAITPKG instructions.

gas/
	* config/tc-i386.c (cpu_arch): Add WAITPKG.
	(cpu_noarch): Likewise.
	* doc/c-i386.texi: Document WAITPKG.
	* i386/i386.exp: Run WAITPKG tests.
	* testsuite/gas/i386/waitpkg-intel.d: New test.
	* testsuite/gas/i386/waitpkg.d: Likewise.
	* testsuite/gas/i386/waitpkg.s: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg.s: Likewise.

opcodes/
	* i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
	PREFIX_MOD_1_0FAE_REG_6.
	(va_mode): New.
	(OP_E_register): Use va_mode.
	* i386-dis-evex.h (prefix_table):
	New instructions (see prefixes above).
	* i386-gen.c (cpu_flag_init): Add WAITPKG.
	(cpu_flags): Likewise.
	* i386-opc.h (enum): Likewise.
	(i386_cpu_flags): Likewise.
	* i386-opc.tbl: Add umonitor, umwait, tpause.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
 2018-04-11 21:37:12 +02:00
Alan Modra
a8eb42a8b7 Remove i860, i960, bout and aout-adobe targets 
Plus remove a few leftovers from the 29k support.

include/
	* aout/adobe.h: Delete.
	* aout/reloc.h: Delete.
	* coff/i860.h: Delete.
	* coff/i960.h: Delete.
	* elf/i860.h: Delete.
	* elf/i960.h: Delete.
	* opcode/i860.h: Delete.
	* opcode/i960.h: Delete.
	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
	* aout/ar.h (ARMAGB): Remove.
	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
	union internal_auxent): Remove i960 support.
bfd/
	* aout-adobe.c: Delete.
	* bout.c: Delete.
	* coff-i860.c: Delete.
	* coff-i960.c: Delete.
	* cpu-i860.c: Delete.
	* cpu-i960.c: Delete.
	* elf32-i860.c: Delete.
	* elf32-i960.c: Delete.
	* hosts/i860mach3.h: Delete.
	* Makefile.am: Remove i860, i960, bout, and adobe support.
	* archures.c: Remove i860 and i960 support.
	* coffcode.h: Likewise.
	* reloc.c: Likewise.
	* aoutx.h: Comment updates.
	* archive.c: Remove BOUT and i960 support.
	* bfd.c: Remove BOUT support.
	* coffswap.h: Remove i960 support.
	* config.bfd: Remove i860, i960 and adobe targets.
	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
	* targets.c: Likewise.
	* ieee.c: Remove i960 support.
	* mach-o.c: Remove i860 support.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* opcodes/i860-dis.c: Delete.
	* opcodes/i960-dis.c: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* ieee.c: Remove i960 support.
	* od-macho.c: Remove i860 support.
	* readelf.c: Remove i860 and i960 support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/binutils-all/objdump.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/aout_gnu.h: Delete.
	* config/tc-i860.c: Delete.
	* config/tc-i860.h: Delete.
	* config/tc-i960.c: Delete.
	* config/tc-i960.h: Delete.
	* doc/c-i860.texi: Delete.
	* doc/c-i960.texi: Delete.
	* testsuite/gas/i860/README.i860: Delete.
	* testsuite/gas/i860/bitwise.d: Delete.
	* testsuite/gas/i860/bitwise.s: Delete.
	* testsuite/gas/i860/branch.d: Delete.
	* testsuite/gas/i860/branch.s: Delete.
	* testsuite/gas/i860/bte.d: Delete.
	* testsuite/gas/i860/bte.s: Delete.
	* testsuite/gas/i860/dir-align01.d: Delete.
	* testsuite/gas/i860/dir-align01.s: Delete.
	* testsuite/gas/i860/dir-intel01.d: Delete.
	* testsuite/gas/i860/dir-intel01.s: Delete.
	* testsuite/gas/i860/dir-intel02.d: Delete.
	* testsuite/gas/i860/dir-intel02.s: Delete.
	* testsuite/gas/i860/dir-intel03-err.l: Delete.
	* testsuite/gas/i860/dir-intel03-err.s: Delete.
	* testsuite/gas/i860/dual01.d: Delete.
	* testsuite/gas/i860/dual01.s: Delete.
	* testsuite/gas/i860/dual02-err.l: Delete.
	* testsuite/gas/i860/dual02-err.s: Delete.
	* testsuite/gas/i860/dual03.d: Delete.
	* testsuite/gas/i860/dual03.s: Delete.
	* testsuite/gas/i860/fldst01.d: Delete.
	* testsuite/gas/i860/fldst01.s: Delete.
	* testsuite/gas/i860/fldst02.d: Delete.
	* testsuite/gas/i860/fldst02.s: Delete.
	* testsuite/gas/i860/fldst03.d: Delete.
	* testsuite/gas/i860/fldst03.s: Delete.
	* testsuite/gas/i860/fldst04.d: Delete.
	* testsuite/gas/i860/fldst04.s: Delete.
	* testsuite/gas/i860/fldst05.d: Delete.
	* testsuite/gas/i860/fldst05.s: Delete.
	* testsuite/gas/i860/fldst06.d: Delete.
	* testsuite/gas/i860/fldst06.s: Delete.
	* testsuite/gas/i860/fldst07.d: Delete.
	* testsuite/gas/i860/fldst07.s: Delete.
	* testsuite/gas/i860/fldst08.d: Delete.
	* testsuite/gas/i860/fldst08.s: Delete.
	* testsuite/gas/i860/float01.d: Delete.
	* testsuite/gas/i860/float01.s: Delete.
	* testsuite/gas/i860/float02.d: Delete.
	* testsuite/gas/i860/float02.s: Delete.
	* testsuite/gas/i860/float03.d: Delete.
	* testsuite/gas/i860/float03.s: Delete.
	* testsuite/gas/i860/float04.d: Delete.
	* testsuite/gas/i860/float04.s: Delete.
	* testsuite/gas/i860/form.d: Delete.
	* testsuite/gas/i860/form.s: Delete.
	* testsuite/gas/i860/i860.exp: Delete.
	* testsuite/gas/i860/iarith.d: Delete.
	* testsuite/gas/i860/iarith.s: Delete.
	* testsuite/gas/i860/ldst01.d: Delete.
	* testsuite/gas/i860/ldst01.s: Delete.
	* testsuite/gas/i860/ldst02.d: Delete.
	* testsuite/gas/i860/ldst02.s: Delete.
	* testsuite/gas/i860/ldst03.d: Delete.
	* testsuite/gas/i860/ldst03.s: Delete.
	* testsuite/gas/i860/ldst04.d: Delete.
	* testsuite/gas/i860/ldst04.s: Delete.
	* testsuite/gas/i860/ldst05.d: Delete.
	* testsuite/gas/i860/ldst05.s: Delete.
	* testsuite/gas/i860/ldst06.d: Delete.
	* testsuite/gas/i860/ldst06.s: Delete.
	* testsuite/gas/i860/pfam.d: Delete.
	* testsuite/gas/i860/pfam.s: Delete.
	* testsuite/gas/i860/pfmam.d: Delete.
	* testsuite/gas/i860/pfmam.s: Delete.
	* testsuite/gas/i860/pfmsm.d: Delete.
	* testsuite/gas/i860/pfmsm.s: Delete.
	* testsuite/gas/i860/pfsm.d: Delete.
	* testsuite/gas/i860/pfsm.s: Delete.
	* testsuite/gas/i860/pseudo-ops01.d: Delete.
	* testsuite/gas/i860/pseudo-ops01.s: Delete.
	* testsuite/gas/i860/regress01.d: Delete.
	* testsuite/gas/i860/regress01.s: Delete.
	* testsuite/gas/i860/shift.d: Delete.
	* testsuite/gas/i860/shift.s: Delete.
	* testsuite/gas/i860/simd.d: Delete.
	* testsuite/gas/i860/simd.s: Delete.
	* testsuite/gas/i860/system.d: Delete.
	* testsuite/gas/i860/system.s: Delete.
	* testsuite/gas/i860/xp.d: Delete.
	* testsuite/gas/i860/xp.s: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/all.texi: Likewise.
	* testsuite/gas/all/gas.exp
	* config/obj-coff.h: Remove i960 support.
	* doc/internals.texi: Likewise.
	* expr.c: Likewise.
	* read.c: Likewise.
	* write.c: Likewise.
	* write.h: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* testsuite/gas/symver/symver.exp: Likewise.
	* config/tc-m68k.c: Remove BOUT support.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* symbols.c: Likewise.
	* doc/h8.texi: Likewise.
	* configure.ac: Remove BOUT and i860 support.
	* doc/as.texinfo: Remove BOUT, i860 and i960 support
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* emulparams/coff_i860.sh: Delete.
	* emulparams/elf32_i860.sh: Delete.
	* emulparams/elf32_i960.sh: Delete.
	* emulparams/gld960.sh: Delete.
	* emulparams/gld960coff.sh: Delete.
	* emulparams/lnk960.sh: Delete.
	* emultempl/gld960.em: Delete.
	* emultempl/gld960c.em: Delete.
	* emultempl/lnk960.em: Delete.
	* scripttempl/i860coff.sc: Delete.
	* scripttempl/i960.sc: Delete.
	* ld.texinfo: Remove i960 support.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* testsuite/ld-discard/extern.d: Likewise.
	* testsuite/ld-discard/start.d: Likewise.
	* testsuite/ld-discard/static.d: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group1.d: Likewise.
	* testsuite/ld-elf/group3b.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/linkonce2.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
	* testsuite/ld-elf/orphan-10.d: Likewise.
	* testsuite/ld-elf/orphan-11.d: Likewise.
	* testsuite/ld-elf/orphan-12.d: Likewise.
	* testsuite/ld-elf/orphan-9.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/orphan.d: Likewise.
	* testsuite/ld-elf/orphan3.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr20528a.d: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/ld-elf/pr22836-1a.d: Likewise.
	* testsuite/ld-elf/pr22836-1b.d: Likewise.
	* testsuite/ld-elf/pr349.d: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-elf/warn1.d: Likewise.
	* testsuite/ld-elf/warn2.d: Likewise.
	* testsuite/ld-elf/warn3.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-11 21:49:30 +09:30
H.J. Lu
caf0678c84 i386: Clear vex instead of vex.evex 
"vex" has many fields to control how to decode an instruction.  Clear
all fields in "vex" before decoding an instruction to avoid using values
left from the previous instruction.

gas/

	PR binutils/23025
	* testsuite/gas/i386/prefix.s: Add tests for vcvtpd2dq with
	VEX and EVEX prefixes.
	* testsuite/gas/i386/prefix.d: Updated.

opcodes/

	PR binutils/23025
	* i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
	to 0.
	(print_insn): Clear vex instead of vex.evex.
 2018-04-04 04:36:44 -07:00
Nick Clifton
4fb0d2b912 Update Spanish translations for ld/ opcodes/ and gold/ sub-directories 2018-04-04 09:00:18 +01:00
Jan Beulich
c39e5b2671 x86: drop VecESize 
It again can be inferred from other information.

The vpopcntd templates all need to have Dword added to their memory
operands; the lack thereof was actually a bug preventing certain Intel
syntax code to assemble, so test cases get extended.
 2018-03-28 14:25:07 +02:00
Jan Beulich
8e6e0792d1 x86: convert broadcast insn attribute to boolean 
The (only) valid broadcast type for an insn can be inferred from other
information.
 2018-03-28 14:24:05 +02:00
Jan Beulich
9f123b911e x86: fold to-scalar-int conversion insns 2018-03-28 14:22:56 +02:00
Jan Beulich
9646c87b5a x86: don't show suffixes for to-scalar-int conversion insns 
In the course of folding their patterns (possible now that the pointless
and partly even bogus VecESize are no longer in the way) I've noticed
that vcvt*2usi, other than their vcvt*2si counterparts, don't allow for
any suffixes. As that is supposedly intentional, make the disassembler
consistently omit suffixes for all to-scalar-int conversion insns.
 2018-03-28 14:22:00 +02:00
Nick Clifton
c8d59609b1 Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+REG addressing with an assumed offset register. 
PR 22988
opcode	* opcode/aarch64.h (enum aarch64_opnd): Add
	AARCH64_OPND_SVE_ADDR_R.

opcodes	* aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
	instructions with only a base address register.
	* aarch64-opc.c (operand_general_constraint_met_p): Add code to
	handle AARHC64_OPND_SVE_ADDR_R.
	(aarch64_print_operand): Likewise.
	* aarch64-asm-2.c: Regenerate.
	* aarch64_dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas	* config/tc-aarch64.c (parse_operands): Add code to handle
	AARCH64_OPN_SVE_ADDR_R.
	* testsuite/gas/aarch64/sve.s: Add tests for LDFF1xx instructions
	with an assumed XZR offset address register.
	* testsuite/gas/aarch64/sve.d: Update expected disassembly.
 2018-03-28 09:44:45 +01:00
Jan Beulich
b8c169f359 x86: drop pointless VecESize 
The attribute is meaningful only in templates allowing embedded
broadcast. Drop them everywhere else.
 2018-03-22 08:46:25 +01:00
Jan Beulich
96bc132a73 x86: drop remaining redundant DispN 
A few of them were missed in commit 7ac2002247 ("x86: derive DispN
from BaseIndex") and also couldn't be removed by subsequent commits
touching certain templates anyway.
 2018-03-22 08:34:24 +01:00
Jan Beulich
9f79e88693 x86: fix swapped operand handling for BNDMOV 
The wrong placement of the Load attribute in the templates prevented
this from working. The disassembler also didn't handle this consistently
with other similar dual-encoding insns.
 2018-03-22 08:32:50 +01:00
Jan Beulich
d6793fa1ac x86/Intel: fix fallout from earlier template folding 
While many templates allowing multiple suitably matching XMM/YMM/ZMM
operand sizes can be folded, a few need to be split in order to not
wrongly accept "xmmword ptr" operands when only XMM registers are
permitted (and memory operands are more narrow). Add a test case
validating this.
 2018-03-22 08:31:43 +01:00
Jan Beulich
f776822506 x86: fold a few XOP templates 
Also add a new test case verifying that mixed operands of SIMD insns
with a size-less memory operand in the middle are properly rejected.
 2018-03-22 08:29:45 +01:00
Jim Wilson
0e35537d75 RISC-V: Add .insn support. 
gas/ChangeLog
	2018-03-07  Kito Cheng  <kito.cheng@gmail.com>
	* config/tc-riscv.c (opcode_name_list): New.
	(opcode_names_hash): Likewise.
	(init_opcode_names_hash): Likewise.
	(opcode_name_lookup): Likewise.
	(validate_riscv_insn): New argument length, and add new format
	which used in .insn directive.
	(md_begin): Refine hash table initialization logic into
	init_opcode_hash.
	(init_opcode_hash): New.
	(my_getOpcodeExpression): Parse opcode name for .insn.
	(riscv_ip): New argument hash, able to handle .insn directive.
	(s_riscv_insn): Handler for .insn directive.
	(riscv_pseudo_table): New entry for .insn.
	* doc/c-riscv.texi: Add documentation for .insn directive.
	* testsuite/gas/riscv/insn.d: Add testcase for .insn directive.
	* testsuite/gas/riscv/insn.s: Likewise.

	include/ChangeLog
	2018-03-07  Kito Cheng  <kito.cheng@gmail.com>
	* opcode/riscv.h (OP_MASK_FUNCT3): New.
	(OP_SH_FUNCT3): Likewise.
	(OP_MASK_FUNCT7): Likewise.
	(OP_SH_FUNCT7): Likewise.
	(OP_MASK_OP2): Likewise.
	(OP_SH_OP2): Likewise.
	(OP_MASK_CFUNCT4): Likewise.
	(OP_SH_CFUNCT4): Likewise.
	(OP_MASK_CFUNCT3): Likewise.
	(OP_SH_CFUNCT3): Likewise.
	(riscv_insn_types): Likewise.

	opcodes/ChangeLog
	2018-03-07  Kito Cheng  <kito.cheng@gmail.com>
	* riscv-opc.c (riscv_insn_types): New.
 2018-03-14 16:04:03 -07:00
Nick Clifton
b4a3689a68 Updated Russian and Brazilian Portuguese translations. 
ld	* po/pt_BR.po: Updated Brazilian Portuguese translation.
opcodes	* po/pt_BR.po: Updated Brazilian Portuguese translation.
gas	* po/ru.po: Updated Russian translation.
 2018-03-13 16:57:29 +00:00
H.J. Lu
d3d50934a9 x86-64: Also optimize "clr reg64" 
"clr reg" is an alias of "xor reg, reg".  We can encode "clr reg64" as
"xor reg32, reg32".

gas/

	* config/tc-i386.c (optimize_encoding): Also encode "clr reg64"
	as "xor reg32, reg32".
	* testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests.
	* testsuite/gas/i386/x86-64-optimize-1.d: Updated.

opcodes/

	* i386-opc.tbl: Add Optimize to clr.
	* i386-tbl.h: Regenerated.
 2018-03-08 06:41:34 -08:00
H.J. Lu
bd5dea8822 x86: Remove support for old (<= 2.8.1) versions of gcc 
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and
fdivrp instructions.  Assembler translates them to correct ones with a
warning:

[hjl@gnu-cfl-1 gas]$ cat x.s
	fsubp %st(3),%st
[hjl@gnu-cfl-1 gas]$ gcc -c x.s
x.s: Assembler messages:
x.s:1: Warning: translating to `fsubp %st,%st(3)'
[hjl@gnu-cfl-1 gas]$

This patch removes support for old (<= 2.8.1) versions of gcc:

[hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s
x.s: Assembler messages:
x.s:1: Error: operand type mismatch for `fsubp'
[hjl@gnu-cfl-1 gas]$

gas/

	* NEWS: Mention -mold-gcc removal.
	* config/tc-i386.c (i386_error): Remove old_gcc_only.
	(old_gcc): Removed.
	(match_template): Remove old gcc support.
	(OPTION_MOLD_GCC): Removed.
	(OPTION_MRELAX_RELOCATIONS): Updated.
	(md_longopts): Remove OPTION_MOLD_GCC.
	(md_parse_option): Likewise.
	(md_show_usage): Remove -mold-gcc.
	* testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old
	(<= 2.8.1) versions of gcc.
	* testsuite/gas/i386/intel.s: Likewise.
	* testsuite/gas/i386/general.l: Updated.
	* testsuite/gas/i386/intel-intel.d: Likewise.
	* testsuite/gas/i386/intel.d: Likewise.
	* testsuite/gas/i386/intel.e: Likewise.
	* testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general.

include/

	* opcode/i386 (OLDGCC_COMPAT): Removed.

opcodes/

	* i386-gen.c (opcode_modifiers): Remove OldGcc.
	* i386-opc.h (OldGcc): Removed.
	(i386_opcode_modifier): Remove oldgcc.
	* i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
	instructions for old (<= 2.8.1) versions of gcc.
	* i386-tbl.h: Regenerated.
 2018-03-08 06:31:52 -08:00
Jan Beulich
e771e7c9fb x86: fold several AVX512VL templates 
The differences between some of the register and memory forms of the
same insn often don't really require the templates to be separate. For
example, Disp8MemShift is simply irrelevant to register forms. Fold
these as far as possible, and also fold register-only forms. Further
folding is possible, but needs other prereq work done first.

A note regarding EVEXDYN: This is intended to be used only when no other
properties of the template would make is_evex_encoding() return true. In
all "normal" cases I think it is preferable to omit this indicator, to
keep the table half way readable.
 2018-03-08 08:58:55 +01:00
Jan Beulich
ed438a93f1 x86: fold certain AVX512 rotate and shift templates 
Their memory forms were bogusly using VexLWP instead of VexNDD. Adjust
VexNDD handling to cope with these, allowing their register and memory
forms to be folded.
 2018-03-08 08:58:05 +01:00
Jan Beulich
454172a99e x86: fold VEX-encoded GFNI templates 2018-03-08 08:57:19 +01:00
Jan Beulich
3682415023 x86: fold a few AVX512F templates 
The differences between some of the register and memory forms of the
same insn often don't really require the templates to be separate. For
example, Disp8MemShift is simply irrelevant to register forms. Fold them
as far as possible. Further folding is possible, but needs other prereq
work done first.
 2018-03-08 08:56:47 +01:00
Jan Beulich
e7f5c0a99e x86: fold LWP templates 
Also drop the no longer necessary explicit Disp<N> from them.
 2018-03-08 08:56:08 +01:00
Jan Beulich
25a4277fec x86: fold FMA and FMA4 templates 2018-03-08 08:55:37 +01:00
Jan Beulich
d2224064f1 x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX 
They aren't really useful (anymore?): The conflicting operand size check
isn't applicable to any insn validly using respective memory operand
sizes (and if they're used wrongly, another error would result), and the
logic in process_suffix() can be easily changed to work without them.

While re-structuring conditionals in process_suffix() also drop the
CMPXCHG8B special case in favor of a NoRex64 attribute in the opcode
table.
 2018-03-08 08:52:27 +01:00
Jan Beulich
1b193f0b12 x86: drop bogus NoAVX 
These are meaningful only for insns with CpuSSE* (and a few other Cpu*)
attribute.
 2018-03-08 08:36:41 +01:00
Jan Beulich
f2f6a710f4 x86: avoid SSE check for LDMXCSR/STMXCSR 
Neither touches any XMM register, so the check is pointless. It is imo
even questionable whether in SSE2AVX mode the two should be converted to
their AVX counterparts.
 2018-03-08 08:35:48 +01:00
Jan Beulich
38e314eb06 x86: drop FloatD 
It can be expressed by D, when making the consumer look at operand size
to tell apart both uses.
 2018-03-08 08:34:09 +01:00
Jan Beulich
d53e6b98a2 x86/Intel: correct disassembly of fsub*/fdiv* 
fsub/fsubr/fsubp/fsubrp as well as fdiv/fdivr/fdivp/fdivrp disassembly
should match (a) the Intel SDM and (b) respective input fed to gas (both
of course with the exception of when we intentionally convert bogus
insns, accompanied by a warning).
 2018-03-08 08:33:06 +01:00
Jan Beulich
2907c2f555 x86: bogus VMOVD with 64-bit operands should only allow for registers 
These templates exist solely to satisfy gcc's needs, and gcc only
produces these with register operands.
 2018-03-08 08:26:35 +01:00
Jan Beulich
73053c1fc4 x86: fold AVX vcvtpd2ps memory forms 
This requires a change to ModR/M handling: Recording of displacement
types must not discard operand size information. Change the respective
code to alter only .disp<N>.
 2018-03-08 08:25:31 +01:00
Alan Modra
52fe4420b7 XCOFF disassembler 
xcoff (32-bit) objdump accepted but ignored -M options unless
-mpowerpc was also given.  This patch fixes that, leaving the default
as -Mpwr for xcoff.  I've also enabled more tests for xcoff targets.

binutils/
	* configure.ac: Add objdump_private_desc_xcoff for rs6000.
	* configure: Regenerate.
gas/
	* testsuite/gas/ppc/aix.exp: Run for rs6000 too.
	* testsuite/gas/ppc/ppc.exp: Run more tests for non-ELF targets.
	* testsuite/gas/ppc/machine.d: Don't run for PE targets.
opcodes/
	* disassemble.c (disassembler): Use bfd_arch_powerpc entry for
	bfd_arch_rs6000.
	* disassemble.h (print_insn_rs6000): Delete.
	* ppc-dis.c (powerpc_init_dialect): Handle rs6000.
	(disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
	(print_insn_rs6000): Delete.
 2018-03-07 16:56:39 +10:30
Alan Modra
a6743a5420 opcodes error messages 
Another patch aimed at making binutils comply with the GNU coding
standard.  The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html

cpu/
	* frv.opc: Include opintl.h.
	(add_next_to_vliw): Use opcodes_error_handler to print error.
	Standardize error message.
	(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
	* sysdep.h (opcodes_error_handler): Define.
	(_bfd_error_handler): Declare.
	* Makefile.am: Remove stray #.
	* opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
	EDIT" comment.
	* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
	* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
	* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
	opcodes_error_handler to print errors.  Standardize error messages.
	* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
	and include opintl.h.
	* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
	* i386-gen.c: Standardize error messages.
	* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
	* Makefile.in: Regenerate.
	* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
	* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
	* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
	* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
	* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
	* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
	* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
	* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
	* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
	* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
	* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
 2018-03-03 11:34:26 +10:30
H.J. Lu
8305403a1f x86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128 
When 2 source registers are identical, AVX256 and AVX512 vpsub[bwdq]
instructions can be encoded with VEX128 or EVEX128 encodings.

gas/

	* config/tc-i386.c (optimize_encoding): Optimize AVX256 and
	AVX512 vpsub[bwdq] instructions.
	* testsuite/gas/i386/optimize-1.s: Add tests for AVX256 and
	AVX512 vpsub[bwdq] instructions.
	* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
	* testsuite/gas/i386/optimize-1.d: Updated.
	* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.

opcodes/

	* * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
	vpsub[bwdq] instructions.
	* i386-tbl.h: Regenerated.
 2018-03-01 06:08:31 -08:00
Alan Modra
e184813fdb Add missing translations to ALL_LINGUAS 
binutils/
	* configure.ac (ALL_LINGUAS): Add sr.  Sort.
	* configure: Regenerate.
gas/
	* configure.ac (ALL_LINGUAS): Add uk.  Sort.
	* configure: Regenerate.
gprof/
	* configure.ac (ALL_LINGUAS): Add it, ro, ru, uk.  Sort.
	* configure: Regenerate.
ld/
	* configure.ac (ALL_LINGUAS): Add ja.  Sort.
	* configure: Regenerate.
opcodes/
	* configure.ac (ALL_LINGUAS): Sort.
	* configure: Regenerate.
 2018-03-01 09:17:02 +10:30
Thomas Preud'homme
5b616beff4 [ARM] Remove ARM_FEATURE_COPY macro 
Among the macros to manipulate an arm_feature_set structure is the
ARM_FEATURE_COPY which copy the value of a feature set into another.
This can be achieved with a simple assignement which most of the
existing code does. This patch removes the last 2 uses of that macro and
remove the macro altogether.

2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>

include/
	* opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.

2018-02-27  Thomas Preud'homme  <thomas.preudhomme@arm.com>

opcodes/
	* arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
	macro by assignements.
 2018-02-27 16:40:45 +00:00
H.J. Lu
b6f8c7c452 x86: Add -O[2|s] assembler command-line options 
On x86, some instructions have alternate shorter encodings:

1. When the upper 32 bits of destination registers of

andq $imm31, %r64
testq $imm31, %r64
xorq %r64, %r64
subq %r64, %r64

known to be zero, we can encode them without the REX_W bit:

andl $imm31, %r32
testl $imm31, %r32
xorl %r32, %r32
subl %r32, %r32

This optimization is enabled with -O, -O2 and -Os.
2. Since 0xb0 mov with 32-bit destination registers zero-extends 32-bit
immediate to 64-bit destination register, we can use it to encode 64-bit
mov with 32-bit immediates.  This optimization is enabled with -O, -O2
and -Os.
3. Since the upper bits of destination registers of VEX128 and EVEX128
instructions are extended to zero, if all bits of destination registers
of AVX256 or AVX512 instructions are zero, we can use VEX128 or EVEX128
encoding to encode AVX256 or AVX512 instructions.  When 2 source
registers are identical, AVX256 and AVX512 andn and xor instructions:

VOP %reg, %reg, %dest_reg

can be encoded with

VOP128 %reg, %reg, %dest_reg

This optimization is enabled with -O2 and -Os.
4. 16-bit, 32-bit and 64-bit register tests with immediate may be
encoded as 8-bit register test with immediate.  This optimization is
enabled with -Os.

This patch does:

1. Add {nooptimize} pseudo prefix to disable instruction size
optimization.
2. Add optimize to i386_opcode_modifier to tell assembler that encoding
of an instruction may be optimized.

gas/

	PR gas/22871
	* NEWS: Mention -O[2|s].
	* config/tc-i386.c (_i386_insn): Add no_optimize.
	(optimize): New.
	(optimize_for_space): Likewise.
	(fits_in_imm7): New function.
	(fits_in_imm31): Likewise.
	(optimize_encoding): Likewise.
	(md_assemble): Call optimize_encoding to optimize encoding.
	(parse_insn): Handle {nooptimize}.
	(md_shortopts): Append "O::".
	(md_parse_option): Handle -On.
	* doc/c-i386.texi: Document -O0, -O, -O1, -O2 and -Os as well
	as {nooptimize}.
	* testsuite/gas/cfi/cfi-x86_64.d: Pass -O0 to assembler.
	* testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run optimize-1, optimize-2,
	optimize-3, x86-64-optimize-1, x86-64-optimize-2,
	x86-64-optimize-3 and x86-64-optimize-4.
	* testsuite/gas/i386/optimize-1.d: New file.
	* testsuite/gas/i386/optimize-1.s: Likewise.
	* testsuite/gas/i386/optimize-2.d: Likewise.
	* testsuite/gas/i386/optimize-2.s: Likewise.
	* testsuite/gas/i386/optimize-3.d: Likewise.
	* testsuite/gas/i386/optimize-3.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-1.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-1.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-3.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-4.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-4.s: Likewise.

opcodes/

	PR gas/22871
	* i386-gen.c (opcode_modifiers): Add Optimize.
	* i386-opc.h (Optimize): New enum.
	(i386_opcode_modifier): Add optimize.
	* i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
	"sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
	"and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
	"movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
	vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
	vpxord and vpxorq.
	* i386-tbl.h: Regenerated.
 2018-02-27 07:36:43 -08:00
Alan Modra
e95b887f85 crx string overflow warning 
gcc8 complains wrongly about the buffer not being large enough, at
least at -Og optimization.

	* crx-dis.c (getregliststring): Allocate a large enough buffer
	to silence false positive gcc8 warning.
 2018-02-26 10:51:12 +10:30
Jim Wilson
0bccfb2994 RISC-V: Make disassebler work for --enable-targets=all config. 
opcodes/
	* disassemble.c (ARCH_riscv): Define if ARCH_all.
 2018-02-22 11:28:51 -08:00
H.J. Lu
6b6b680700 x86: Add {rex} pseudo prefix 
Add {rex} pseudo prefix to generate a REX byte for integer and legacy
vector instructions if possible.  Note that this differs from the rex
prefix which generates REX prefix unconditionally.

gas/

	* config/tc-i386.c (_i386_insn): Add rex_encoding.
	(md_assemble): When i.rex_encoding is true, generate a REX byte
	if possible.
	(parse_insn): Set i.rex_encoding for {rex}.
	* doc/c-i386.texi: Document {rex}.
	* testsuite/gas/i386/x86-64-pseudos.s: Add {rex} tests.
	* testsuite/gas/i386/x86-64-pseudos.d: Updated.

opcodes/

	* i386-opc.tbl: Add {rex},
	* i386-tbl.h: Regenerated.
 2018-02-22 06:18:39 -08:00
Maciej W. Rozycki
75f3166520 MIPS16/opcodes: Free up `M' operand code 
The `M' and `m' MIPS16 operand codes are functionally the same, denoting
a 7-bit register list that is encoded the same way for both SAVE and
RESTORE.  Use `m' for both instructions then, making `M' available for a
different use.

	opcodes/
	* mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
	(mips16_opcodes): Replace `M' with `m' for "restore".

	include/
	* opcode/mips.h: Remove `M' operand code.
 2018-02-20 20:51:36 +00:00