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cpu/or1k: Document no branch delay slot architectures and l.adrp

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The 'nd' architectures did not mention what the 'nd' stands for.
Document that these mean 'no brach delay slot'.

cpu/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
	(l-adrp): Improve comment.
This commit is contained in:
Stafford Horne 2019-06-13 06:16:19 +09:00
parent d3ad6278d6
commit eb212c84a1
3 changed files with 9 additions and 4 deletions
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5
cpu/ChangeLog
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@ -1,3 +1,8 @@
2019-06-13 Stafford Horne <shorne@gmail.com>
* or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
(l-adrp): Improve comment.
2019-06-13 Stafford Horne <shorne@gmail.com> 2019-06-13 Stafford Horne <shorne@gmail.com>
* or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S, * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,

6
cpu/or1k.cpu
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@ -77,7 +77,7 @@
(define-mach (define-mach
(name or32nd) (name or32nd)
(comment "Generic OpenRISC 1000 32-bit CPU") (comment "Generic OpenRISC 1000 32-bit CPU with no branch delay slot")
(cpu or1k32bf) (cpu or1k32bf)
(bfd-name "or1knd") (bfd-name "or1knd")
) )
@ -92,7 +92,7 @@
; OpenRISC 1200 - 32-bit or1k CPU implementation ; OpenRISC 1200 - 32-bit or1k CPU implementation
(define-model (define-model
(name or1200nd) (comment "OpenRISC 1200 model") (name or1200nd) (comment "OpenRISC 1200 model with no branch delay slot")
(attrs NO-DELAY-SLOT) (attrs NO-DELAY-SLOT)
(mach or32nd) (mach or32nd)
(unit u-exec "Execution Unit" () 1 1 () () () ()) (unit u-exec "Execution Unit" () 1 1 () () () ())
@ -120,7 +120,7 @@
(define-mach (define-mach
(name or64nd) (name or64nd)
(comment "Generic OpenRISC 1000 ND 64-bit CPU") (comment "Generic OpenRISC 1000 ND 64-bit CPU with no branch delay slot")
(cpu or1k64bf) (cpu or1k64bf)
(bfd-name "or1k64nd") (bfd-name "or1k64nd")
) )

2
cpu/or1korbis.cpu
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@ -433,7 +433,7 @@
) )
) )
(dni l-adrp "adrp reg/disp21" (dni l-adrp "load pc-relative page address"
((MACH ORBIS-MACHS)) ((MACH ORBIS-MACHS))
"l.adrp $rD,${disp21}" "l.adrp $rD,${disp21}"
(+ OPC_ADRP rD disp21) (+ OPC_ADRP rD disp21)