MatCat.OpenSource/8sa1-binutils-gdb
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x86-64: don't hide an empty but meaningless REX prefix

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Unlike for non-zero values passed to USED_REX(), where rex_used gets
updated only when the respective bit was actually set in the encoding,
zero getting passed in is not further guarded, yet such a (potentially
"empty") REX prefix takes effect only when there are registers numbered
4 and up.
This commit is contained in:
Jan Beulich 2020-07-14 10:24:26 +02:00
parent e8b5d5f971
commit e184e6110e
7 changed files with 36 additions and 13 deletions
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8
gas/ChangeLog
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@ -1,3 +1,11 @@
2020-07-14 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for
ModR/M-encoded byte register cases.
* testsuite/gas/i386/x86-64-pseudos.d,
testsuite/gas/i386/x86-64-reg-intel.d,
testsuite/gas/i386/x86-64-reg.d: Adjust expectations.
2020-07-14 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/x86-64-pseudos.s: Add empty-REX tests for

3
gas/testsuite/gas/i386/x86-64-pseudos.d
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@ -303,6 +303,9 @@ Disassembly of section .text:
+[a-f0-9]+: 88 c4 mov %al,%ah
+[a-f0-9]+: 40 d3 e0 rex shl %cl,%eax
+[a-f0-9]+: 40 a0 01 00 00 00 00 00 00 00 rex movabs 0x1,%al
+[a-f0-9]+: 40 38 ca rex cmp %cl,%dl
+[a-f0-9]+: 40 b3 01 rex mov \$(0x)?1,%bl
+[a-f0-9]+: f2 40 0f 38 f0 c1 rex crc32b? %cl,%eax
+[a-f0-9]+: 40 89 c3 rex mov %eax,%ebx
+[a-f0-9]+: 41 89 c6 mov %eax,%r14d
+[a-f0-9]+: 41 89 00 mov %eax,\(%r8\)

3
gas/testsuite/gas/i386/x86-64-pseudos.s
View File

@ -307,6 +307,9 @@ _start:
{rex} mov %al,%ah
{rex} shl %cl, %eax
{rex} movabs 1, %al
{rex} cmp %cl, %dl
{rex} mov $1, %bl
{rex} crc32 %cl, %eax
{rex} movl %eax,%ebx
{rex} movl %eax,%r14d
{rex} movl %eax,(%r8)

8
gas/testsuite/gas/i386/x86-64-reg-intel.d
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@ -26,10 +26,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 73 f6 02 psllq mm6,0x2
[ ]*[a-f0-9]+: 66 41 0f 73 f2 02 psllq xmm10,0x2
[ ]*[a-f0-9]+: 66 41 0f 73 fa 02 pslldq xmm10,0x2
[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add al,0x1
[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add cl,0x1
[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add dl,0x1
[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add bl,0x1
[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add al,0x1
[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add cl,0x1
[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add dl,0x1
[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add bl,0x1
[ ]*[a-f0-9]+: 40 80 c4 01[ ]+add spl,0x1
[ ]*[a-f0-9]+: 40 80 c5 01[ ]+add bpl,0x1
[ ]*[a-f0-9]+: 40 80 c6 01[ ]+add sil,0x1

8
gas/testsuite/gas/i386/x86-64-reg.d
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@ -25,10 +25,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 73 f6 02 psllq \$0x2,%mm6
[ ]*[a-f0-9]+: 66 41 0f 73 f2 02 psllq \$0x2,%xmm10
[ ]*[a-f0-9]+: 66 41 0f 73 fa 02 pslldq \$0x2,%xmm10
[ ]*[a-f0-9]+: 40 80 c0 01[ ]+add \$0x1,%al
[ ]*[a-f0-9]+: 40 80 c1 01[ ]+add \$0x1,%cl
[ ]*[a-f0-9]+: 40 80 c2 01[ ]+add \$0x1,%dl
[ ]*[a-f0-9]+: 40 80 c3 01[ ]+add \$0x1,%bl
[ ]*[a-f0-9]+: 40 80 c0 01[ ]+rex add \$0x1,%al
[ ]*[a-f0-9]+: 40 80 c1 01[ ]+rex add \$0x1,%cl
[ ]*[a-f0-9]+: 40 80 c2 01[ ]+rex add \$0x1,%dl
[ ]*[a-f0-9]+: 40 80 c3 01[ ]+rex add \$0x1,%bl
[ ]*[a-f0-9]+: 40 80 c4 01[ ]+add \$0x1,%spl
[ ]*[a-f0-9]+: 40 80 c5 01[ ]+add \$0x1,%bpl
[ ]*[a-f0-9]+: 40 80 c6 01[ ]+add \$0x1,%sil

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2020-07-14 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
Conditionalize invocations of "USED_REX (0)".
2020-07-14 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,

14
opcodes/i386-dis.c
View File

@ -14398,7 +14398,8 @@ OP_E_register (int bytemode, int sizeflag)
{
case b_mode:
case b_swap_mode:
USED_REX (0);
if (reg & 4)
USED_REX (0);
if (rex)
names = names8rex;
else
@ -15027,7 +15028,8 @@ OP_G (int bytemode, int sizeflag)
switch (bytemode)
{
case b_mode:
USED_REX (0);
if (modrm.reg & 4)
USED_REX (0);
if (rex)
oappend (names8rex[modrm.reg + add]);
else
@ -15218,9 +15220,10 @@ OP_REG (int code, int sizeflag)
case sp_reg: case bp_reg: case si_reg: case di_reg:
s = names16[code - ax_reg + add];
break;
case al_reg: case ah_reg: case cl_reg: case ch_reg:
case dl_reg: case dh_reg: case bl_reg: case bh_reg:
case ah_reg: case ch_reg: case dh_reg: case bh_reg:
USED_REX (0);
/* Fall through. */
case al_reg: case cl_reg: case dl_reg: case bl_reg:
if (rex)
s = names8rex[code - al_reg + add];
else
@ -16416,7 +16419,8 @@ CRC32_Fixup (int bytemode, int sizeflag)
add = (rex & REX_B) ? 8 : 0;
if (bytemode == b_mode)
{
USED_REX (0);
if (modrm.rm & 4)
USED_REX (0);
if (rex)
oappend (names8rex[modrm.rm + add]);
else